ASM-HEMT GaN RF Extraction Demo Guide
ASM-HEMT GaN RF Extraction Demo Guide
Specialist Training
• asm-hemt/ASM-HEMT_Modeling.mdl
• mvsg/MVSG_Modeling.mdl
In this topic, the ASM-HEMT example is used as a reference. However, the content of this section
applies to both ASM-HEMT and MVSG examples.
Once the example file is loaded, the ASM_HEMT_MODELING or MVSG_MODELING project will be
visible in the IC-CAP Main Window (see Fig.1).
Double-click to open the example. The Model File window opens (see Fig. 2).
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Fig. 2: Partial view of the Model Window.
Save the example to a local directory. For the directory structure that will include the measured data
and other information details, refer Measured Data Requirements.
Once the file is opened, you'll notice that another project called ASM_HEMT_GaN_UTILITIES has
been automatically loaded as shown in Figure 3. This file includes some utilities and tools that are used
by the main project file. The content of the ASM-HEMT and MVSG Utilities projects is maintained by
Keysigth.
Fig. 3: The UTILITIES project is loaded when opening the main ASM or MVSG projects.
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Navigating the User Interface
In the DUT/Setup main tree, the DUTs are grouped and some DUTs are just used to visualize
separator lines.
The flow is executed top/down starting with tools included in INITIALIZE executed first, followed by
DUTs representing the extraction steps, down to the FINISH_MDLG DUT.
• Group 0 includes the INITIALIZE DUT. Setups in this group are used to initialize the Project.
• Group 1 to 5 include the core Extraction flow (the number of groups may vary depending on the
model)
• The FINISH_MDLG DUT includes functions that can be used to save the extracted data.
The Circuit Page implements the netlist in ADS format. It defines a subcircuit that includes the
GaN transistor along with some external R, L, C elements to represent the parasitics.
The Model Parameters table lists the name and values of all the intrinsic device parameters and
external parasitics to be extracted.
The Model Variable Table includes service variables. Most variables should not be edited; however,
some level of customization is possible if you are familiar with IC-CAP. For example, the Model
Parameter are grouped into different lists, these can be customized by using the variables starting with
the prefix PARAMGROUP_.
At any point, you can save the project. Measured data used for modeling in the project are usually a
subset of the overall available data and can be saved in a separate directory so that they can be
automatically imported.
GaN RF Measured Data Requirements provides details to import data into the toolkit.
For a quick Getting Started, see GaN RF Toolkit - Getting Started.
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2. STEP - Copy the data from the examples into a local directory
Project/Data Directory Structure
The data directory structure to save and manage project related files is:
<deviceName>/Avail_Meas_Data/Data_For_Modeling
A set of available measured data should be saved in the Avail_Meas_Data directory. Once a subset of
measured data is loaded into the project, it can be saved in the Data_For_Modeling directory along
with other project information such as results. Select Data_For_Modeling as the Project working
directory.
An example of the data directory structure:
/GaN_HEMT/
• DeviceA/
o Avail_Meas_Data/
▪ Data_for_Modeling
• DeviceB/
o Avail_Meas_Data/
▪ Data_for_Modeling
• ...
Copy the data directory into a local folder dedicated to this project in your home directory, for example:
C:\Data\users\icuser\asm-training
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3. STEP – SET WORKING DIRECTORY
The working directory is the default directory for saving and loading MDM and parameter sets files.
At the end of the project, it includes all the necessary information so that one can start from the master
copy of the Toolkit and reload the available data and the latest parameter set.
It is recommended to set the working directory to the Data_for_Modeling directory.
2. Type the character * and click OK. The directory browser is displayed.
3. Use the directory browser to update the working directory to point to your
local Data_for_Modeling directory.
The first time the measured data is loaded for a new device, go through the process manually in
each setup and make sure the Inputs field values are correct and import the data from the Available
Data repository. For this example, we already have a set of MDM files representing data used for the
extraction in Data_for_Modeling repository, therefore we select option 1 and proceed to the next
step.
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2. Click Change Dir button to navigate to your local
data/DeviceA_8x100um/Avail_Meas_Data/Data_for_Modeling directory. You should see a long
list of available MDM files listed on the right side of the dialog.
This dialog can also be used to manually load single files. To do so, start on the left side, select
a destination DUT, select a destination Setup and then select the MDM file to load. When the
MDM file is selected, data is imported and the status is shown in the status column. This is
useful if you receive new measurement data and just want to update a single setup.
Click the Load Automatically button. It will take several seconds to load all the data.
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6. STEP – EXPLORING THE MODEL FIT
Before resetting and initializing the model parameters, let us review the fit of the factory extracted
model.
One way to do this is to simply go through each setup, run the Simulation and display the relevant
plots. This can be rather tedious. An efficient way to do, is select INITIALIZE DUT and run
the INIT_MODELING/Compare_with_Previous transform.
This opens a Multiplot GUI Window (Fig. 2) and a Control Dialog (Fig. 3). In the background,
simulations are run for all the displayed plots to make sure simulated data displays the currently loaded
Parameter set. If you are familiar with PEL, the plots and the appearance of this window can be
customized.
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Fig. 2: Multiplot Window showing several DC and S-Parameters plots
The control dialog below allows comparison of different Model Parameter Set (MPS) files. There are 2
files provided, each with slightly different parameter values. You can select them and see the resulting
fit in the plots. Sometimes, one decides to experiment with different extraction strategies and for each
one save an MPS file. This tool is very useful to compare results.
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7. STEP – MEET THE MODELING GUI
Before initializing the parameters, use the General Modeling GUI tool to execute each step of the extraction
flow.
Let’s use the Modeling GUI with a familiar example, the extraction of the Threshold or Cut-off voltage
from the transfer curve at low Vd, that is, in the linear region. Navigate to
the DC_MODELING_vt_u0/id_vgs_Transfer_lin setup and execute
the Mdlg__VOFF_NFACTOR transform. The following GUI is displayed:
This is a Multiplot Window with custom UI widgets added. This GUI dialog executes a modeling step, that is,
it allows us to focus on specific data to extract a subset of parameters.
The selected plots are displayed in the main area. In the lower-right Select Plots table, if required, other
available plots can be selected.
The top comment area (light orange background) displays the guidelines and tips on how to execute the
modeling step.
Use the Tune/Optimize Parameters to select the parameters to extract via tuning or optimization. When
opening the Modeling GUI, a set of parameters is already pre-populated, however, you can use
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the Add button to add any parameters from the Parameters Table. Also, you can replace the parameters in
the table with the ones selected in the predefined Parameter Groups.
Once you have a set of the parameters in the table, use the mouse to select some or all the parameters for
tuning or optimization.
Finally, the Tuning/Optimization control is on the top-right side of the UI.
To tune the Parameters, click the Tune button. Since, we are using ADS, you can leave the Tune
Fast button checked for faster performance. The Tuning dialog with be displayed, tune one or two
parameters to see how the fit changes. Change the fitting by varying VOFF and click OK to exit the Tuner
dialog.
Each Setup includes a Mdlg__All transform at the end of the local flow. This Modeling GUI provides a final
step meant to tune any parameter before proceeding to the next step.
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STUDENT NOTES:
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PART 2: EXTRACT THE MODEL
In this section, we’ll go through 13 extraction steps
In the examples, results at each step are saved in the ExtractionSteps directory under the
Data_for_Modeling directory:
If you run into issues during the extraction of any step, you can load the step results and just move on
to the next step.
To load a Parameter Set .mps file, follow the normal IC-CAP procedure: go to the Model Parameter
Tab and hit the “File Load …” button in the Tool Bar. Browse to the desired MPS in the file browser and
click Load.
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0. INIT FLAGS, PARAMETERS and SERIES RESISTANCES
In this initial section, we prepare the project prior to running the extraction.
This consists of two main tasks:
2. Process and Layout Parameters are set along with the model switches or flags. Since, we are
working on the DeviceA, do not modify these values.
3. TEMP is used in the simulations, TNOM is the temperature at which the model is extracted, that
is, the temperature at which the measurements were done. TEMP and TNOM should be the
same.
4. To start the extraction from a clean state, click Reset Model Parameters. This resets all the
parameters (excluding the ones in the above table) to their default settings. For most
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parameters, this is equivalent to turn-off a specific effect. As we go through the extraction, we
will extract and re-activate each parameter based on the measured data.
5. If you are resuming a project and/or load a new parameter set, you can run Clear Simulated
Data.
6. Click OK, Done to exit the dialog.
Since, all the parameters have been reset, we no longer have a good fitting. As an example, let's open
the id_vds_Output and display the output characteristics plots:
For GaN power devices, the thermal resistance, RTH0 value has a strong influence on steady-state IV
and S-parameters. It is important to initialize RTH0 to a reasonable value. In our case, RTH0 = 24 was
extracted by using pulsed measurements at various temperatures.
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DUT/Setup: CONTACT_RESISTANCES/ DC_Meas__R_Port1 and
DC_Meas__R_Port2
This is to characterize DC losses in measurements (resistances at the probe contact and that in the
path through bias tees).
A small voltage is applied when probes are shorted (connected to short pads). By measuring the
current, we can calculate the resistance path.
Run the Mdlg__R_Port1 transform. Tune/Optimize the resistance to match the IV and Resistance
traces. In this example, the extracted resistance is 0.4 Ohms.
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1. XSTEP - VOFF AND MOBILITY
Initial Values of Series Resistances and Inductances
Before extracting parameters from transistor measured data, we set initial values for the serial
resistance. These values are based on similar devices extracted in the past. If you do not have any
experience with the device, then we at least recommend setting initial values for the RDC and RSC
model parameters. We will be able to tune these later based on measured data. Since, we are using
the internal resistance model for the contact resistances RG and RD, make sure that the external
resistances are set to 1m (not used).
To set the values, open the Parameter Table, search for the RDC, RSC, RS.R, RD.R, RG.R
parameters and set their values as per Table. Alternatively, run the transform
INITIALIZE/INIT_MODELING/Init_DeviceA_8x100.
DUT/Setup: DC_MODELING_vt_uo/id_vgs_Transfer_lin
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Transform Mdlg_VOFF_NFACTOR
Run the transform. The initial fitting is quite off as we are simulating with mostly default parameters:
Use the Tune dialog to tune VOFF and NFACTOR. Since mobility is not tuned, focus on the threshold
area and mainly on VOFF. If needed, NFACTOR controls the sub-threshold slope of the device. For
this device, the data are noisy in the threshold region. VOFF=-2.05 and NFACTOR=0.66 gives the fit
below:
Transform Mdlg_U0_UA_UB
The rising part of the Id(vg) curve will be fit in the next step by optimizing the mobility parameters.
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Parameters UA and UB are preselected for tuning. Unselect the 2 plots on the right side log(id) and
gm2 in the Plot Optimizer by clicking on their blue button. This means the data on these plots will not be
used in the optimizer. Select 2 PO regions as shown in the figure below:
Run the optimizer a few times to achieve the fit below. Each time you run the Optimizer it will
automatically adjust the parameters' ranges and improve the fit. You should obtain the following fit:
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You may open the Tuner to see the extracted values:
Transform Mdlg_All
Finally, you may run this Modeling GUI step to fine-tuning the extracted parameters.
In the "Select Param. Group", select the DC_idvg_lin. Since we are still extracting initial values, it
makes no much send to fine-tune things at this point, however, define the boxes as in the previous
steps (only in the two plots on the left side and run the optimizer a few times).
You should obtain the following fit:
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Fig. 1: Extracted Fit for this step
Figure 1 shows a screen-shot showing the fit after this initial extraction step. Table 3 summarizes the
extracted parameters.
Parameter Value
VOFF -1.965
NFACTOR 1.769
U0 80.78m
UA 39.69n
UB 4e-20
Table 3: Extracted Parameters (also saved to 2_DC_Linear.mps)
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2. XSTEP – CV MODELING INIT
This topic lists the next setup, in the CV_Modeling_init DUT. Before proceeding with the remaining DC
extraction, it is important to tune the TBAR parameter. In this step, we will also extract the initial values
for the overlap, fringing, and depletion capacitances.
Transform Mdlg_CGS
Launch the Tuner and tune CGSO to match around Voff. You will need to adjust the max in the
optimizer window.
Transform Mdlg_CGD
Launch the tuner and adjust CGDO and CGDL to match the capacitance level and the slope in the sub-
VOFF region.
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Transform Mdlg_CGS_CGD_TBAR
Select all the parameters and use the tuner to split the CGSO and CGDO capacitances between
overlap and fringing (CFG and CFGD). We do not have dedicated capacitance structures so in this
example we attributed 10% of the overall capacitances to the fringe portion.
The overall fit should not change.
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Next, click the Add button to select and add the TBAR, RDC, and RSC parameters. Open the Tuner
and tune the parameters to fit the above-VOFF part of the CGS curve. Here we cannot really use the
optimizer since our goal is to fit the trace without decreasing the value of TBAR. A very low value
makes it more difficult to fit the high-current/low-voltage part of the Output Characteristics. Increasing
the RDC and lowering the RSC allows us to keep TBAR=11.40n.
Also, note that decreasing the TBAR does not help the fit of the Gate-Drain capacitance. The model is
not able to fit both curves. Also, the slope of the transition around VOFF of the Gate-Drain capacitance
is not well modeled.
Transform: Mdlg_CDS_RDS
Tune the parameters CDSO, CFD, and CJO to fit the sub-Voff region of the CDS curve.
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Results for this modeling steps are saved to the 2_CV_Modeling_init_spar_cap_vg_vd1.mps file.
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3. XSTEP - R, L, Sub Circuit
DUT/Setup: R_L_Subcircuit/Spar_bias
Transform Mdlg__ext_L_R
Select the Inductances only and open the Tuner. Tune LS and LG.
DUT/Setup:R_L_Subcircuit/Spar_sub
Transform Mdlg__ext_L_R
In this step, we mainly look at S11 and S22, which seems to be well modeled, meaning that the internal Cgs
and Cds capacitances are well modeled in the threshold region. The capacitance Vds bias dependence has
not been modeled yet. We do not take any action.
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4. XSTEP - DC – BODY DIODE
DC Modeling is perhaps the most challenging part of the modeling process. As currents and voltages
increase many parameters are involved. It is important to note that, while some principles are general,
what works for a specific device may not work well for other device and process.
DUT/Setup: DC_MODELING/ig_vgs_Input
Transform Mdlg__IGSDIO_NJGS_RSHG
Turn off the Plot Optimizer (PO) in all the plots but the logig(vg) in the upper left. Draw two PO boxes,
one box before VOFF excluding voltages too low causing leaking, the other in the forward region.
The resulting fit is quite good in the Ig(Vg) trace but it fails at high Id current. Perhaps an indication that RDC
is too low.
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Results are saved to 4_DC_id_vgs_input.mps
Transform Mdlg_All
This repeats a previous step but since we have modified the RDC and RSC contact resistances to fit
Cgd we extract the mobility parameters again. Define PO blue boxes in the left plots id(vg) and gm(vg).
Select the DC_idvg_lin group of parameters and optimize VOFF, NFACTOR, UO, UA, UB.
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Here is the resulting fit. Note that at high Vg, the model overestimates the forward diode current and
that results in a drop of the drain current.
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6. XSTEP – DC – TRANSFER SUB-THRESHOLD
DUT/Setup: DC_MODELING/id_vgs_Transfer_subVOFF
Transforms Mdlg__sub_VOFF
1. The default value for ETA0 is too low so before we run the optimize, we need to increase it.
Open the tuner and set ETA0 = 80m and VDSCALE = 5. Close the tuner and save the
parameters by clicking “OK”
2. Deactivate gm(vg) and gm2(vg) and define boxes around VOFF in the remaining plots. First,
optimize ETA0, VDSCALE and CDSCD. If necessary, add VOFF and optimize again. Here are
the resulting parameters:
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7. XSTEP - DC – TRANSFER ABOVE VOFF 1
DUT/Setup: DC_MODELING/id_vgs_Transfer
Transform Mdlg_above_VOFF_1
Tune RSC, RDC, U0, UA and UTE to adjust id(vg) and id(vd). The negative slope of the Id current in
the Id(Vd) is obtained by increasing the mobility temperature coefficient UTE. UA and UB both
increase.
If necessary, select and tune VDSCALE, VOFF and ETA0. In this example, there was no need for
further optimization at this point. Here are the values for these parameters extracted so far:
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Let us now look at the Output characteristics:
To improve the fit of the output characteristics, the temperature coefficients need to be turned on.
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8. XSTEP - DC – TRANSFER/OUTPUT ABOVE VOFF
TEMPERATURE
DUT/Setup: DC_MODELING/id_vgs_Transfer
Transform Mdlg_above_VOFF_T
1. Select the Temp_int_resist parameter group. Select and use the tuner to set the initial values of the
following parameters:
2. Disable the PO in the Id(vg) plot. We'll optimize the two id(vd) plots, including the full output
characteristics. Close the Tuner and run the optimization. You should be getting these coefficients:
3. Next, select the Temp_DC group. Select all the parameters: UTE, KT1, AT, and KTGS. Run the
optimization.
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Here are the output characteristics:
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9. XSTEP - DC – TRANSFER ABOVE VOFF 2
DUT/Setup: DC_MODELING/id_vgs_Transfer
Transform Mdlg_above_VOFF_2
Select the appropriate parameter group to access the parameters. Here are the values and the
resulting fit.
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10. XSTEP – DC – OUTPUT
DUT/Setup: DC_MODELING/id_vds_Output
Transform Mdlg__Lambda
Transform Mdlg__VOFF
Transform Mdlg_RD
Transform Mdlg_RTHO_UTE
Not necessary for this example as RTHO was set at the beginning of the extraction and UTE was
extracted in previous steps.
Transform Mdlg__All
Let’s perform a first step of fine-tuning. Note that, we do not make significant changes to the values of
the current parameters.
Temp_int_resist Parameter Group:
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DC_idvd Parameter Group:
Notice how in the previous step, the slope in the lowest part of the characteristics does not fit well. The
expected class AB operating point for this device is Vg=-2.4 and Vd=28 V so it is important to achieve a
good DC fit in this area. In this final step, we change the parameters to optimize the low Vg, high Vd
characteristics.
DUT/Setup: DC_MODELING/id_vds_Output
Transform Mdlg__All
1. Select the DC_idvg_sat Parameter Group. The key parameters to fine-tune the threshold region of
the Id-Vd are ETA0 and VDSCALE. Note how VDSCALE has decreased and ETA0 has slightly
increased.
2. Select the DC_idvg_lin Parameter Group. No significant changes on the mobility parameters, only
slight tuning of VOFF and NFACTOR:
3. Select the DC_idvg Parameter Group. Decrease LAMBDA and increase of THESAT to fit the upper
left portion (high-current-low voltage):
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4. Finally, select the Temp_int_resist Parameter Group. A correction on the temperature coefficient of
RSC and RDC:
The resulting fit now perfectly match the Vg=-2.4 V curve while maintaining a good fit on the rest of the
characteristics:
Model Parameters after this final DC final tuning step are saved in the 11_DC_Output_Finetuning.mps
file.
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One final consideration: if we go back and simulate the Id-Vg Transfer Linear characteristics, we find
that the fit is no longer as good as it was initially:
To fit the Output characteristics, we had to change the mobility values extracted at low Vd. Note that this
extraction example does not consider trapping effects that are known to influence the DC steady state
characteristics. Further investigation is required on this topic.
This section provides information about the bias and temperature dependence of capacitances. Our most
important goal is to achieve a good fit S-parameters data at various bias points, it is important to accurately
describe the non-linear behavior of capacitances versus bias.
In Initial Threshold Voltage and Mobility, we considered the capacitance dependency on the Vg, we will now
look at the Vds dependency.
DUT/Setup CV_MODELING/spar_cap_vd_vglow
(Vg = -2.4V bias operating point in class AB Id = 40mA, Vd sweeps from 0 to 60V)
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Transform Mdlg__CGS.
The data display both CGS vs. vd from this setup and Vgs vs. vg (Vd = 0,0.5 and 1V) from a previous setup.
This way we can monitor at the same time both bias dependencies. We have noticed already how the model
is not predicting the shape of Cgs vs. vd.
At Vg = -2.4 V, we expect a good fit around Vds = 0 based on the CGS vs. Vg plot on the left and indeed the
fit of Cgs near Vds=0 is good. As Vds increases, the shape of the curve is not the same but the trend is
correct.
Unselect the PO in the VGS(vg) plot, select the VDSATCV=82.56 and CGDL=8.8f and optimize. The fit
improves slightly but it is not possible to match the curve shape. Below are the extracted parameters and the
resulting fit.
VDSACV also influences the shape of VGD and it will not be possible to achieve a good fit for both curves.
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Transform: Mdlg__CGD.
Also, in the CGD case, we display the local results of CGD(vd) and CGD(vg). Note that CGD with the
current extracted values of VDSATCV and CGDL, CGD becomes negative as Vds increases and this is
not acceptable.
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Open the tuner and manually set some initial values for CGDO, CGDL, and VDSATCV. Select the PO
boxes to cover the most important region, medium to high Vd values. As shown in the plot for low
values of Vds, the CGD capacitance is underestimated by 20%.
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Transform Mdlg__CGS_CGD
Now, showing both previous steps, CGS and CGD. As anticipated, fitting CGD has negatively affected CGS
fitting. We choose to provide a better fit for CGD since CGD is critical to model the gain, however, more
investigation is required.
We perform no action in this case and accept a 20% error in CGS modeling.
Transform: Mdlg__CDS_RDS
Despite the excellent fit of the Id(vd) characteristic, the model does not predict the drop in CDS as Vds
increases as well as the increase of RDS. We can tune the following parameters to model Cgs(vd). In this
case, manual tuning is preferable so that we can monitor CDS(vg) and make sure the parameters does not
go out of range.
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Note that the RDS(vd) is still not modeled correctly as the model predicts a strong increase with Vds.
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DUT/Setup: CV_MODELING/spar_cap_vg_vd1
(Vg = - 9 to 0 V for Vd =0, 0.2, 0.4 V)
Transform Mdlg__All.
This is a final check on Capacitance vs. Vg at low Vd.
Note that so far we have been extracting the capacitance at relatively low temperature (in the previous setup
the temperature increase was actually noticeable due to the high voltage T = RTHO*Id*Vd = 65C above
TNOM). In the next setup, we'll take a look at the temperature dependency of the capacitances.
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DUT/Setup: CV_MODELING/spar_cap_vd_vg_T
(Vg =-2.8 V to 800mV, Vd =5-60 V)
Transform Mdlg__All
Use this setup to adjust the temperature dependency parameters KTVBI, KTCFG, KTCFGD. In this
example, we could not find any appreciable improvement obtained by tuning the parameters.
Note that for some Vg value, the measured CGS capacitance is negative for high Vd. This may be due to
some issue with the measured data.
DUT/Setup: CV_MODELING/spar_cap_vg_vd_high
(Vg=-9 to 200mV, Vd=25V)
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Transform: Mdlg__All
Use this setup to adjust the temperature dependency parameters KTVBI, KTCFG, KTCFGD.
In this example, we could not find any appreciable improvement obtained by tuning the parameters.
Note that for some Vg value, the measured CGS capacitance is negative for high Vd. This may be due to
some issue with the measured data.
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DUT/Setup: CV_MODELING/spar_cap_vg_vd_high
(Vg=-9 to 200mV, Vd=25V)
Transform: Mdlg__All.
A capacitance checking is done at the bias operating point Vd=25 by sweeping Vg from low to high voltage.
Note the inability of the model to correctly predict CGD and CDS in saturation.
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13. XSTEP – SPAR MODELING
This section provides an overview of the setups and tools dedicated to the S-parameters modeling.
Except for the 1st step, which refines the extraction of the parasitic external inductors, the other steps can be
used to investigate and optimize the RF behavior. If the DC fit is acceptable, like in this example, then the S-
parameters are mostly influenced by the capacitance and their bias dependency parameters. These were
extracted in the CV section and they can be further tuned. At this point, there are no new parameters to
extract since capacitances and bias dependences were first extracted in the CV Modeling sections,
however, looking at the overall S-parameters and capacitances/conductances of the inner PI network may
allow for better tuning to cover all possible bias conditions.
Also, in this simple example, we have not investigated the influence of trapping and field plates.
DUT/Setup: SPAR_MODELING/Init_Spar_Modeling
Vg=-3 to -2 V, Vd=10-30V (around the application bias point)
f=100MHz to 25.1GHz
Transform: Mdlg__ext_L
In this modeling step, we tune the external components (inductors) so that the internal PI schematic
components become frequency-independent. Run the Mdlg__ext_L transform and tune the external
inductors (and, if applicable, the external resistors). If you need to make compromises, fit best CGS and
CGD.
In this example, only fine-tuning of LS, LG, and LD is required.
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DUT/Setup: SPAR_MODELING/vg_1stsweep__vd_2nd
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Transform: Mdlg_All
You may also use the other Mdlg__xxx transforms in the setup to focus on individual capacitances. The
Mdlg_All displays the vg dependencies. In this example, we fine-tune VDSATCV and CGDL to optimize
CGD around VOFF.
Tuning the above also allows for a good fit of S12 at the Vg=-2.4, Vd=25. Open the _MP plot in the setup
Spar_bias_point (see below) and look at the S12 plot. We will return to this bias point and look and the
overall fit later.
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Note that the model is not able to predict the CGS and CDS in the saturation region. The model predicts
CGS to be flat vs. Vg, when measurements show a decrease in value. We can tune CJ0 looking at the CDS
plot near VOFF.
DUT/Setup: SPAR_MODELING/vd_1stsweep__vg_2nd
Transform: Mdlg_All
In this setup, we study the dependencies on Vd with Vg being the 2nd order sweep.
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Two observations:
• The model is not able to predict the internal resistances of the PI circuit, RGS, RGD, and RDS.
This could be because the assumed PI circuit may not be fully representative of the internal
device topology.
• In the saturation region, the model is not able to predict the capacitance variation on Vgs. This
is particularly evident in the CDS and CGD curves, for which there is little or no dependencies
on Vgs.
While we investigated the curve dependencies from various parameters, including bias and
temperature dependency parameters, we take no action in this setup since we were not able to further
improve the fit.
DUT/Setup: SPAR_MODELING/Spar_all_freq_biases
Reduce the number of bias points from those available in the file to speed up the simulation.
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Transform: Mdlg__All
We now do model tuning at all frequencies and all biases. if tuning is necessary, reduce the number of bias
points to increase the simulation speed.
While we have noticed that the fringing capacitances parameters influence the spacing of the CDS and CDG
curves, no specific tuning was done in this setup.
The Spar fitting:
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Note that the model overestimates S21 at high biases. This may be a consequence of the poor fit of the
capacitances at high biases as illustrated in the figure below:
DUT/Setup: SPAR_MODELING/Spar_bias_point
Transform: Mdlg_All
This is the target application bias point in class AB. As illustrated below, the fit at this bias point is good with
the exception of S22. This is likely due to the large discrepancy in the measured vs. simulated rds.
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DUT/Setup: SPAR_MODELING/Model_Quality_Verification
Use all available data in the Spar_All_Bias file
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Transforms
• VERIFY_SETTINGS
• INITIALIZE
• DISPLAY_Spar
• DISPLAY_Y_Matrix
• DISPLAY_Z_Matrix
• DISPLAY_etc._Plots
Run VERIFY_SETTINGS and INITIALIZE first. Then, select the display you would like to view.
Below are the S-parameters and Y-parameters displays. Note the presence of some data outliers in S11 and
S22.
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14. SUMMARY
We have introduced a possible the extraction flow for the ASM-HEMT model. The flow is not entirely
linear and requires iteration between IV and CV modeling steps. Some effects like trapping have not
been considered in this example. We have not used pulsed IV data but rather steady state IV curves.
Measured data for this project were obtained by using DynaFET simulations. The DynaFET model
exhibited a very good match in all DC, S-parameters and large signal conditions, but in some regions
like subthreshold its data or for very low ig and id currents, measured data may not be fully
representative of the actual device data.
Like any flow, this extraction flow example represents a good starting point for other process
technologies, but it needs to be adapted to achieve the best accuracy.
Also, while further investigation is needed, the flow has shown that the model may have some
limitations in its ability to predict the capacitance vs. bias and this ultimately is reflected in the S-
parameters fit across the IV plane.
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