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Problem 4 PN JN Solar Cell

1. In a p+ - n junction, doubling the n-side doping ND will: a. Increase junction capacitance b. Decrease built-in potential c. Decrease breakdown voltage d. Increase ohmic losses e. Increase reverse saturation current 2. For a silicon p+-n junction, the built-in voltage can be calculated from the capacitance-voltage relationship given. The dopant concentration can also be determined. 3. For a silicon p-n junction with given values of Eip - EF and Ein - EF, the built-in voltage and band diagrams at 0 V and 0.5 V forward bias can be drawn.

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51 views4 pages

Problem 4 PN JN Solar Cell

1. In a p+ - n junction, doubling the n-side doping ND will: a. Increase junction capacitance b. Decrease built-in potential c. Decrease breakdown voltage d. Increase ohmic losses e. Increase reverse saturation current 2. For a silicon p+-n junction, the built-in voltage can be calculated from the capacitance-voltage relationship given. The dopant concentration can also be determined. 3. For a silicon p-n junction with given values of Eip - EF and Ein - EF, the built-in voltage and band diagrams at 0 V and 0.5 V forward bias can be drawn.

Uploaded by

sagar
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Problem Set P N Junctions, Solar Cells

Electronic charge q = 1.60x10-19 C


Free space permittivity ε0 = 8.85x10-14 F/cm
Dielectric Constant of Si = 11.7
kT = 0.0259 eV

1. In a p+ - n junction, the doping of the n side ND is doubled. How do the


following change if everything else remains unchanged ? Indicate only
increase or decrease:
a. Junction capacitance
b. Built in potential
c. Breakdown voltage
d. Ohmic losses due to series resistance
e. Reverse saturation current

2. The capacitance of a one sided abrupt silicon p+ - n junction at 300 K


satisfies the equation

1/C2 = 1.74x105 – 2.12 x 105 VR

Where VR is the applied reverse bias in volts and the junction capacitance C
is in microfarads. The diode area is 10-1 cm2. Calculate the built in voltage and
the dopant concentration.

3. A silicon p-n junction diode is such that at temperature 300K


Eip - EF = 0.467 eV and Ein - EF = 0.329 eV

a. What is the built in voltage?


b. Draw the band diagram at zero applied bias
c. Draw the band diagram at 0.5 V forward applied bias.
The band diagrams should show band edges, Fermi levels and quasi Fermi
levels.
4. The current voltage characteristics of
a pn diode is given in the figure.
Sketch the energy band diagram
corresponding to the peak. Show the
band edges, the Fermi levels and the
electron flow direction.

5. At room temperature under the


forward bias of 0.15 V the current
through a p-n junction is 1.66 mA.
What will be the current through the junction under reverse bias?
6. The forward-bias voltage (V) required to maintain a constant current (I) for
P+N diode is a function of the temperature (T).

a. Derive an expression for δV/δT.


b. What is a typical value for a silicon diode around room temperature?

7. a. Define efficiency and fill factor for a solar cell.

b. At room temperature, an ideal solar cell has a short-circuit current of 2 A and


an open-circuit voltage of 0.5 V. How does the open-circuit voltage change if
the short circuit current drops by a factor of 5?

8. When the temperature is increased from room temperature, how do the


following change if all other parameters remain unchanged (increase or
decrease).
c. Built in voltage of a p-n junction
d. Minority carrier lifetime in silicon
e. Open circuit voltage of a n+p Silicon solar cell
f. Breakdown voltage for field ionization breakdown

9. At room temperature, an ideal solar cell has a short-circuit current of 2 A and


an open-circuit voltage of 0.5 V. What is the open-circuit voltage if the short
circuit current drops by a factor of 5?

10. A silicon p-n junction diode is such that at temperature 300K


Eip - EFp = 0.467 eV and Ein - EFn = 0.329 eV

a. What is the built in voltage?


b. Draw the band diagram at zero applied bias
c. Draw the band diagram at 0.5 V forward applied bias.
The band diagrams should show band edges, Fermi levels and quasi Fermi
levels.

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