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1.deld Unit I

Digital Electronics and Logic Design covers minimization techniques for Boolean functions. The document discusses K-maps and Quine McClusky methods for minimizing up to 4 variables. It also covers different representations of signed binary numbers, including sign-magnitude, 1's complement, and 2's complement forms. Examples are provided to represent negative numbers in these forms. Properties of Boolean algebra like DeMorgan's theorem are also defined. Methods to convert between Sum of Products and Product of Sum canonical forms are described.

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0% found this document useful (0 votes)
44 views24 pages

1.deld Unit I

Digital Electronics and Logic Design covers minimization techniques for Boolean functions. The document discusses K-maps and Quine McClusky methods for minimizing up to 4 variables. It also covers different representations of signed binary numbers, including sign-magnitude, 1's complement, and 2's complement forms. Examples are provided to represent negative numbers in these forms. Properties of Boolean algebra like DeMorgan's theorem are also defined. Methods to convert between Sum of Products and Product of Sum canonical forms are described.

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nandini p
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Digital Electronics and

Logic Design

Unit I
Minimization
Technique

Bhagyashri More, Department of Computer Engineering, MESCOE, Pune


Logic Design Minimization Technique-
Minimization of Boolean function using K-
01
Agenda map(up to 4 variables) and Quine Mc-
Clusky Method

Representation of signed number-


02 sign magnitude representation ,1’s
complement and 2’s complement form

03 Sum of product and product of sum

Minimization of SOP and POS using k-


04 map
Representation of signed binary number

Signed Numbers
Signed numbers contain both sign and magnitude of the number. Generally, the sign is placed in front of
number. So, we have to consider the positive sign for positive numbers and negative sign for negative
numbers.

• There are three types of representations for signed binary numbers:


1. Sign-Magnitude form
2. 1’s complement form
3. 2’s complement form
Representation of signed binary number
Representation of signed binary number
1. Signed Magnitude:
Signed numbers contain sign flag, this representation distinguish positive and negative numbers.
This technique contains both sign bit and magnitude of a number. For example, in representation of
negative decimal numbers, we need to put negative symbol in front of given decimal number.

b6 b5 b4 b3 b2 b1 b0

Sign Bit Magnitude

- Positive number is represented with ‘0’ at its most significant bit (MSB).
- Negative number is represented with ‘1’ at its most significant bit (MSB).
Representation of signed binary number

2. One’s Complement of a Signed Binary Number

The 1’s complement of a number is obtained by complementing all the bits of signed binary number.
So, 1’s complement of positive number gives a negative number. Similarly, 1’s complement of negative
number gives a positive number.

1. How to represent (-33)10 in 1’s complement form? 2. How to represent (-1)10 in 1’s complement form?

33 is represented as (100001)2 1 is represented as (001)2


In 8 bit notation, it is represented as (0010 0001)2 In 8 bit notation, it is represented as (0000 0001)2
Now, -33 is represented in one’s compliment as Now, -1 is represented in one’s compliment as
(1101 1110)2 (1111 1110)2
Representation of signed binary number

3. Two’s Complement of a Signed Binary Number

To get 2’s complement of a binary number, simply invert the given number and add 1 to the least
significant bit (LSB) of given result.
Example:
1. Find 2’s complement of binary number 10101110.

Simply invert each bit of given binary number, which will be 01010001. Then add 1 to the LSB of
this result, i.e., 01010001+1=01010010 which is answer.
Direct conversion

1. LSB with 0 2. MSB with 1


10101101000 11001110011

01010011000 00110001101
Signed binary number examples

Examples:

1. Represent (-12) in,


a. 8 bit signed magnitude form
b. 1’s complement form
c. 2’s complement form

2. Find out 2’s complement of.


a. 1110101110101
b. 000101010010
c. 101010101000
Boolean Algebra Terminology

Boolean Algebra: It is mathematical system that defines a series of logical operations (AND, OR, NOT,
etc) perform on set of variables (A,B,C, etc). Only two values(1 for high and 0 for low) are possible for the
variable used in Boolean algebra.

Example:
F(A,B,C) = AB + A’C + B’C’

• Variables
• Constant
• Complement
• Literals
• Boolean Function

Boolean Expression = Variables + Constants + Boolean operations

We use Boolean Expression to describe Boolean Function.


Properties of Boolean algebra
Properties of Boolean algebra- DeMorgan’s Theorem

NAND = Bubbled OR NOR = Bubbled AND


Properties of Boolean algebra- DeMorgan’s Theorem

Verification of De-Morgan’s Theorem


Boolean algebra Examples

Examples:

• Prove the following using e Morgans’s Theorem


1. AB + CD = ((AB)’ + (CD)’)’
2. (A+B) . (C+D) = ((A+B)’ + (C+D)’)’

• Minimize the expression


1. Y = A’BCD’ + BCD’ + BC’D’ + BC’D
2. F = A + A’B + AB’
3. X = A.(A’+B)
Boolean Expression
Based on the structure of Boolean expression, it is classified into two categories.
1. Sum Of Product (SOP)
2. Product Of Sum (POS)

SOP POS
F = AB + BC + AC F = (A+B) *(A + B + C) * (C +D)

product term sum term

Standard / Canonical SOP Standard / Canonical POS

F(A,B,C) = ABC’ + ABC + AB’C F = (A + B’ + C) *(A’ + B + C) * (A + B’ + C)

minterm Maxterm

Each individual product term in standard SOP is Each individual sum term in standard POS is called
called minterm. maxterm.
Conversions of Canonical Forms

Conversion of SOP form to standard SOP form or Canonical SOP form


Step 1:
By multiplying each non-standard product term with the sum of its missing variable and its complement,
which results in 2 product terms
Step 2:
By repeating the step 1, until all resulting product terms contain all variables

Example:
Convert the non standard SOP function F = x y + x z + y z
Sol:
F=xy+xz+yz
= x y (z + z’) + x (y + y’) z + (x + x’) y z
= x y z + x y z’ + x y z + x y’ z + x y z + x’ y z
= x y z + x y z’ + x y’ z + x’ y z

The standard SOP form is F = x y z + x y z’ + x y’ z + x’ y z


Conversions of Canonical Forms

Conversion of POS form to standard POS form or Canonical POS form


Step 1:
By adding each non-standard sum term to the product of its missing variable and its complement, which
results in 2 sum terms
Step 2:
Applying Boolean algebraic law, A + BC = (A + B) * (A + C)
Step 3:
By repeating the step 1, until all resulting sum terms contain all variables
Example:
F = (A’ + B + C) * (B’ + C + D’) * (A + B’ + C’ + D)
In the first term, the variable D or D’ is missing, so we add D*D’ = 1 to it. Then
(A’ + B + C + D*D’) = (A’ + B + C + D) * (A’ + B + C + D’)
Similarly, in the second term, the variable A or A’ is missing, so we add A*A’ = 1 to it. Then
(B’ + C + D’ + A*A’) = (A + B’ + C + D’) * (A’ + B’ + C + D’)
The third term is already in the standard form, as it has all the variables. Now the standard POS form
equation of the function is
F = (A’ + B + C + D) * (A’ + B + C + D’) * (A + B’ + C + D’) * (A’ + B’ + C + D’) * (A + B’ + C’ + D)
Conversions of Canonical Forms

Convert of SOP form to standard SOP form or Canonical SOP form


Y= ABC + AB + BC’ + A
Z= ABC + ABD + BCD’ +AC’D’
X= A + B

Convert of POS form to standard POS form or Canonical POS form


Y= (A+B) (B+C) (A+C)
Z= (A+B+C+D) (A’+C’+D) (B+C’+D’)
M Notations: Minterm and Maxterm

SOP POS
A variable is in complemented form, if its value is In max term, each variable is complimented, if its
assigned to 0, and the variable is un-complimented value is assigned to 1, and each variable is un-
form, if its value is assigned to 1. complimented if its value is assigned to 0.
Standard Notation of SOP and POS

Example:

The SOP function, The POS function,


1. F(A,B,C) = A’B’C’ + A’B’C + AB’C’ + ABC’ 1. F(A,B,C) = (A+B+C)*(A+B’+C)*(A+B’+C’)*(A’+B’+C)
0 1 4 6 0 2 3 6
= mo + m1 + m4 + m6 = M0 * M2 * M3 * M6
F(A,B,C) = ∑ m (0, 1, 4, 6) F(A,B,C) = Π M (0, 2, 3, 6)

2. F(A,B,C) = ∑ m (0, 2, 5, 6, 7) 2. F(A,B,C) = Π M (4,5,6,7)


= mo + m2 + m5 + m6 +m7 = M4 * M5 * M6 * M7
= A’B’C’ + A’BC’ + AB’C + ABC’ + ABC = (A’+B+C) (A’+B+C’) (A’+B’+C) (A’+B’+C’)

Exercise: Exercise:
1. F = ∑ m (1,3,4,6,7) 1. F = Π M (1,3,5,7)
2. F = ∑ m (2,4,5) 2. F = Π M (2,4,6)
3. F = A’B’C + A’BC + AB’C + ABC’ 3. F = (A+B+C) (A+B+C’) (A+B’+C) (A+B’+C’)
Construct SOP and POS From a Truth Table

For SOP Expression,


1. A circuit for a truth table with N input columns can use AND gates with N inputs, and each row in the
truth table with a '1' in the output column requires one N-input AND gate.
2. Inputs to the AND gate are inverted if the input shows a '0' on the row, and not inverted if the input
shows a '1' on the row.
3. All AND terms are connected to an M-input OR gate, where M is the number of '1' output rows.
The output of the OR gate is the function output.
Construct SOP and POS From a Truth Table

For POS Expression,


1. A circuit for a truth table with N input columns can use OR gates with N inputs, and each row in the
truth table with a '0' in the output column requires one N-input OR gate.
2. Inputs to the OR gate are inverted if the input shows a '1' on the row, and not inverted if the input shows
a '0' on the row.
3. All OR terms are connected to an M-input AND gate, where M is the number of '1' output rows.
The output of the AND gate is the function output
Construct SOP and POS From a Truth Table

Min and Max Term for given example


A B C D Y
1. Write down SOP and POS expression from given truth tables
0 0 0 0 0

A B Y A B C Y 0 0 0 1 1

0 0 1 0 0 0 1 0 0 1 0 0

0 1 1 0 0 1 0 0 0 1 1 1

1 0 0 0 1 0 1 0 1 0 0 0

1 1 1 0 1 1 0 0 1 0 1 0

1 0 0 1 0 1 1 0 1

1 0 1 0 0 1 1 1 1

1 1 0 1 1 0 0 0 0

1 1 1 0 1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
2. From following expression draw the truth table,
a. Y= A’B’ + A’B + AB 1 1 0 0 0
b. F= A’B’C’ + A’B’C + ABC 1 1 0 1 1
c. Y = (A+B) (A’+B) 1 1 1 0 0
d. Y= (A+B’+C+D’) (A+B’+C+D) (A+B’+C’+D’) (A+B+C+D’) (A’+B’+C+D’)
(A’+B’+C’+D’) (A+B+C+D) 1 1 1 1 1

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