PIC16F87XA

TABLE 1-2: PIC16F873A/876A PINOUT DESCRIPTION (CONTINUED)

PDIP, SOIC, QFN I/O/P Buffer
Pin Name Description
SSOP Pin# Pin# Type Type
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT 21 18 TTL/ST(1)
RB0 I/O Digital I/O.
INT I External interrupt.
RB1 22 19 I/O TTL Digital I/O.
RB2 23 20 I/O TTL Digital I/O.
RB3/PGM 24 21 TTL
RB3 I/O Digital I/O.
PGM I Low-voltage (single-supply) ICSP programming enable pin.
RB4 25 22 I/O TTL Digital I/O.
RB5 26 23 I/O TTL Digital I/O.
RB6/PGC 27 24 TTL/ST(2)
RB6 I/O Digital I/O.
PGC I In-circuit debugger and ICSP programming clock.
RB7/PGD 28 25 TTL/ST(2)
RB7 I/O Digital I/O.
PGD I/O In-circuit debugger and ICSP programming data.
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI 11 8 ST
RC0 I/O Digital I/O.
T1OSO O Timer1 oscillator output.
T1CKI I Timer1 external clock input.
RC1/T1OSI/CCP2 12 9 ST
RC1 I/O Digital I/O.
T1OSI I Timer1 oscillator input.
CCP2 I/O Capture2 input, Compare2 output, PWM2 output.
RC2/CCP1 13 10 ST
RC2 I/O Digital I/O.
CCP1 I/O Capture1 input, Compare1 output, PWM1 output.
RC3/SCK/SCL 14 11 ST
RC3 I/O Digital I/O.
SCK I/O Synchronous serial clock input/output for SPI mode.
SCL I/O Synchronous serial clock input/output for I2C mode.
RC4/SDI/SDA 15 12 ST
RC4 I/O Digital I/O.
SDI I SPI data in.
SDA I/O I2C data I/O.
RC5/SDO 16 13 ST
RC5 I/O Digital I/O.
SDO O SPI data out.
RC6/TX/CK 17 14 ST
RC6 I/O Digital I/O.
TX O USART asynchronous transmit.
CK I/O USART1 synchronous clock.
RC7/RX/DT 18 15 ST
RC7 I/O Digital I/O.
RX I USART asynchronous receive.
DT I/O USART synchronous data.
VSS 8, 19 5, 6 P — Ground reference for logic and I/O pins.
VDD 20 17 P — Positive supply for logic and I/O pins.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

 2003 Microchip Technology Inc. DS39582B-page 9

PIC16F87XA
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION
PDIP PLCC TQFP QFN I/O/P Buffer
Pin Name Description
Pin# Pin# Pin# Pin# Type Type
OSC1/CLKI 13 14 30 32 ST/CMOS(4) Oscillator crystal or external clock input.
OSC1 I Oscillator crystal input or external clock source
input. ST buffer when configured in RC mode;
otherwise CMOS.
CLKI I External clock source input. Always associated
with pin function OSC1 (see OSC1/CLKI,
OSC2/CLKO pins).
OSC2/CLKO 14 15 31 33 — Oscillator crystal or clock output.
OSC2 O Oscillator crystal output.
Connects to crystal or resonator in Crystal
Oscillator mode.
CLKO O In RC mode, OSC2 pin outputs CLKO, which
has 1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
MCLR/VPP 1 2 18 18 ST Master Clear (input) or programming voltage (output).
MCLR I Master Clear (Reset) input. This pin is an active
low Reset to the device.
VPP P Programming voltage input.
PORTA is a bidirectional I/O port.
RA0/AN0 2 3 19 19 TTL
RA0 I/O Digital I/O.
AN0 I Analog input 0.
RA1/AN1 3 4 20 20 TTL
RA1 I/O Digital I/O.
AN1 I Analog input 1.
RA2/AN2/VREF-/CVREF 4 5 21 21 TTL
RA2 I/O Digital I/O.
AN2 I Analog input 2.
VREF- I A/D reference voltage (Low) input.
CVREF O Comparator VREF output.
RA3/AN3/VREF+ 5 6 22 22 TTL
RA3 I/O Digital I/O.
AN3 I Analog input 3.
VREF+ I A/D reference voltage (High) input.
RA4/T0CKI/C1OUT 6 7 23 23 ST
RA4 I/O Digital I/O – Open-drain when configured as
output.
T0CKI I Timer0 external clock input.
C1OUT O Comparator 1 output.
RA5/AN4/SS/C2OUT 7 8 24 24 TTL
RA5 I/O Digital I/O.
AN4 I Analog input 4.
SS I SPI slave select input.
C2OUT O Comparator 2 output.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

DS39582B-page 10  2003 Microchip Technology Inc.

 PIC16F87XA
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED)
PDIP PLCC TQFP QFN I/O/P Buffer
Pin Name Description
Pin# Pin# Pin# Pin# Type Type
PORTB is a bidirectional I/O port. PORTB can be
software programmed for internal weak pull-up on all
inputs.
RB0/INT 33 36 8 9 TTL/ST(1)
RB0 I/O Digital I/O.
INT I External interrupt.
RB1 34 37 9 10 I/O TTL Digital I/O.
RB2 35 38 10 11 I/O TTL Digital I/O.
RB3/PGM 36 39 11 12 TTL
RB3 I/O Digital I/O.
PGM I Low-voltage ICSP programming enable pin.
RB4 37 41 14 14 I/O TTL Digital I/O.
RB5 38 42 15 15 I/O TTL Digital I/O.
RB6/PGC 39 43 16 16 TTL/ST(2)
RB6 I/O Digital I/O.
PGC I In-circuit debugger and ICSP programming clock.
RB7/PGD 40 44 17 17 TTL/ST(2)
RB7 I/O Digital I/O.
PGD I/O In-circuit debugger and ICSP programming data.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

 2003 Microchip Technology Inc. DS39582B-page 11

PIC16F87XA
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED)
PDIP PLCC TQFP QFN I/O/P Buffer
Pin Name Description
Pin# Pin# Pin# Pin# Type Type
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI 15 16 32 34 ST
RC0 I/O Digital I/O.
T1OSO O Timer1 oscillator output.
T1CKI I Timer1 external clock input.
RC1/T1OSI/CCP2 16 18 35 35 ST
RC1 I/O Digital I/O.
T1OSI I Timer1 oscillator input.
CCP2 I/O Capture2 input, Compare2 output, PWM2 output.
RC2/CCP1 17 19 36 36 ST
RC2 I/O Digital I/O.
CCP1 I/O Capture1 input, Compare1 output, PWM1 output.
RC3/SCK/SCL 18 20 37 37 ST
RC3 I/O Digital I/O.
SCK I/O Synchronous serial clock input/output for SPI
mode.
SCL I/O Synchronous serial clock input/output for I2C
mode.
RC4/SDI/SDA 23 25 42 42 ST
RC4 I/O Digital I/O.
SDI I SPI data in.
SDA I/O I2C data I/O.
RC5/SDO 24 26 43 43 ST
RC5 I/O Digital I/O.
SDO O SPI data out.
RC6/TX/CK 25 27 44 44 ST
RC6 I/O Digital I/O.
TX O USART asynchronous transmit.
CK I/O USART1 synchronous clock.
RC7/RX/DT 26 29 1 1 ST
RC7 I/O Digital I/O.
RX I USART asynchronous receive.
DT I/O USART synchronous data.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

DS39582B-page 12  2003 Microchip Technology Inc.

 PIC16F87XA
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED)
PDIP PLCC TQFP QFN I/O/P Buffer
Pin Name Description
Pin# Pin# Pin# Pin# Type Type
PORTD is a bidirectional I/O port or Parallel Slave
Port when interfacing to a microprocessor bus.
RD0/PSP0 19 21 38 38 ST/TTL(3)
RD0 I/O Digital I/O.
PSP0 I/O Parallel Slave Port data.
RD1/PSP1 20 22 39 39 ST/TTL(3)
RD1 I/O Digital I/O.
PSP1 I/O Parallel Slave Port data.
RD2/PSP2 21 23 40 40 ST/TTL(3)
RD2 I/O Digital I/O.
PSP2 I/O Parallel Slave Port data.
RD3/PSP3 22 24 41 41 ST/TTL(3)
RD3 I/O Digital I/O.
PSP3 I/O Parallel Slave Port data.
RD4/PSP4 27 30 2 2 ST/TTL(3)
RD4 I/O Digital I/O.
PSP4 I/O Parallel Slave Port data.
RD5/PSP5 28 31 3 3 ST/TTL(3)
RD5 I/O Digital I/O.
PSP5 I/O Parallel Slave Port data.
RD6/PSP6 29 32 4 4 ST/TTL(3)
RD6 I/O Digital I/O.
PSP6 I/O Parallel Slave Port data.
RD7/PSP7 30 33 5 5 ST/TTL(3)
RD7 I/O Digital I/O.
PSP7 I/O Parallel Slave Port data.
PORTE is a bidirectional I/O port.
RE0/RD/AN5 8 9 25 25 ST/TTL(3)
RE0 I/O Digital I/O.
RD I Read control for Parallel Slave Port.
AN5 I Analog input 5.
RE1/WR/AN6 9 10 26 26 ST/TTL(3)
RE1 I/O Digital I/O.
WR I Write control for Parallel Slave Port.
AN6 I Analog input 6.
RE2/CS/AN7 10 11 27 27 ST/TTL(3)
RE2 I/O Digital I/O.
CS I Chip select control for Parallel Slave Port.
AN7 I Analog input 7.
VSS 12, 31 13, 34 6, 29 6, 30, P — Ground reference for logic and I/O pins.
31
VDD 11, 32 12, 35 7, 28 7, 8, P — Positive supply for logic and I/O pins.
28, 29
NC — 1, 17, 12,13, 13 — — These pins are not internally connected. These pins
28, 40 33, 34 should be left unconnected.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

 2003 Microchip Technology Inc. DS39582B-page 13