BALLARPUR INSTITUTE OF TECHNOLOGY, BALLARPUR

Add on Course on “Embedded System”

Name of Student: _______________________________________________________________
Branch: ____________________________________________
Year\Semester: _______________ Total Marks: 50
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1. Which of the following is a coprocessor of 80386? 11. What is the clock frequency of 8087?

a) 80387 b) 8087 c) 8089 d) 8088 a) 10 MHz b) 5 MHz c) 6 MHz d) 4 MHz

2. Name the processor which helps in floating point 12. How are negative numbers stored in a
calculations. coprocessor?

a) microprocessor a) 1’s complement b) 2’s complement c) decimal d)

gray
b) microcontroller
13. How many bits are used for storing signed
c) coprocessor
integers?
d) controller
a) 2 b) 4 c) 8 d) 16
3. Which is the coprocessor of 8086?
14. Which of the processor has an internal
a) 8087 b) 8088 c) 8086 d) 8080 coprocessor?

4. Which of the following is a coprocessor of a) 8087 b) 80287 c) 80387 d) 80486DX

Motorola 68000 family?
15. What are the two major sections in a
a) 68001 b) 68011 c) 68881 d) 68010 coprocessor?

5. Which of the following processors can perform a) control unit and numeric control unit
exponential, logarithmic and trigonometric
b) integer unit and control unit
functions?
c) floating point unit and coprocessor unit
a) 8086 b) 8087 c) 8080 d) 8088
d) coprocessor unit and numeric control unit
6. How many stack register does an 8087 have?
16. Which are the processors based on RISC?
a) 4 b) 8 c) 16 d) 32
a) SPARC b) 80386 c) MC68030 d) MC68020
7. Which of the following processor can handle
infinity values? 17. What is 80/20 rule?

a) 8080 b) 8086 c) 8087 d) 8088 a) 80% instruction is generated and 20% instruction
is executed
8. Which coprocessor supports affine closure?
b) 80% instruction is executed and 20% instruction
a) 80187 b) 80287 c) 80387 d) 8088
is generated
9. Which one is the floating point coprocessor of
c) 80%instruction is executed and 20% instruction is
80286? a) 8087 b) 80187 c) 80287 d) 80387
not executed
10. How many pins does 8087 have?
d) 80% instruction is generated and 20%
a) 40 pin DIP b) 20 pin DIP c) 40 pins d) 20 pins instructions are not generated

18. Which of the architecture is more complex?

 a) SPARC b) MC68030 c) MC68030 d) 8086 a) Intel b) Motorola c) university of Berkeley d)
MIPS
19. Which is the first company who defined RISC
architecture?

a) Intel b) IBM c) Motorola d) MIPS 27. Princeton architecture is also known as

20. Which of the following processors execute its a) von Neumann architecture b) Harvard c) RISC d)
instruction in a single cycle?
28. Who coined the term RISC?
a) 8086 b) 8088 c) 8087 d) MIPS R2000
a) David Patterson b) von Neumann c) Michael J
21. How is memory accessed in RISC architecture? Flynn d) Harvard
a) load and store instruction
29. Which of the following is an 8-bit RISC Harvard
b) opcode instruction architecture?

c) memory instruction a) AVR b) Zilog80 c) 8051 d) Motorola 6800

d) bus instruction 30. Which of the following processors has CISC

architecture?
22. Which of the following has a Harvard
architecture? a) AVR b) Atmel c) Blackfin d) Zilog Z80

a) EDSAC b) SSEM c) PIC d) CSIRAC 31. Which is the most basic non-volatile memory?

23. Which of the following statements are true for a) Flash memory b) PROM c) EPROM d) ROM
von Neumann architecture?
32. Who has invented flash memory?
a) shared bus between the program memory and
a) Dr.FujioMasuoka b) John Ellis c) Josh Fisher d)
data memory
John Ruttenberg
b) separate bus between the program memory and
33. Which of the following is serial access memory?
data memory
a) RAM b) Flash memory c) Shifters d) ROM
c) external bus for program memory and data
34. Which is the early form of non-volatile memory?
memory
a) magnetic core memory b) ferrimagnetic memory
d) external bus for data memory only c) anti-magnetic memory d) anti-ferromagnetic

24. What is CAM stands for? 35. Which of the following memories has more
speed in accessing data?
a) content-addressable memory
a) SRAM b) DRAM c) EPROM d) EEPROM
b) complex addressable memory
36. In which memory, the signals are multiplexed?
c) computing addressable memory
a) DRAM b) SRAM c) EPROM d) EEPROM
d) concurrently addressable memory
37. How many main signals are used with memory
25. Which of the following processors uses Harvard chips?
architecture?
a) 2 b) 4 c) 6 d) 8
a) TEXAS TMS320 b) 80386 c) 80286 d) 8086
38. What is the purpose of address bus?
26. Which company further developed the study of
a) to provide data to and from the chip
RISC architecture?
b) to select a specified chip
c) to select a location within the memory chip 45. Which of the following is replaced with the
absolute addressing mode?
d) to select a read/write cycle
a) relative addressing mode
39. Which are the two main types of processor
connection to the motherboard? b) protective addressing mode

a) sockets and slots c) virtual addressing mode

b) sockets and pins d) temporary addressing mode

c) slots and pins 46. What is the main purpose of the memory
management unit?
d) pins and ports
a) address translation
40. Which of the following has programmable
hardware? b) large storage

a) microcontroller c) reduce the size

b) microprocessor d) provides address space

c) coproce 47. Which of the following provides stability to the

multitasking system?
41. Who invented TriMedia processor?
a) memory b) DRAM c) SRAM d) Memory
a) Intel
partitioning
b) IBM
48. Which of the following is used by the M68000
c) Apple family?

d) NXP Semiconductor a) M68000 b) 80386 c) 8086 d) 80286

42. Which of the following have a 16 Mbytes 49. What can be done for the fine grain protection
addressed range? of the processor?

a) PowerPC a) add extra description bit

b) M68000 b) add error signal

c) DSP56000 c) add wait stage

d) TMS 320 d) remains unchanged

43. Which of the following can destroy the accuracy 50. Which of the following technique is used by the
in the algorithms? UNIX operating system?

a) delays a) logical address memory

b) error signal b) physical address memory

c) interrupt c) virtual memory technique

d) mmu d) translational address

44. How many numbers of ways are possible for

allocating the memory to the modular blocks?

a) 1 b) 2 c) 3 d) 4