Chapter 4 and 5: 8086 Instructions

4.0 INTRODUCTION
• An instruction is a binary pattern designed inside a microprocessor to perform a specific
function.
• In 8086, each instruction consumes one byte to six bytes of memory
• The entire group of instructions that a microprocessor support is called Instruction Set.
• 8086 has more than 20,000 instructions.

4.1 INSTRUCTION SET OF 8086

The Instruction set of 8086 microprocessor is classified into 7, they are:
1. Data transfer instructions
2. Arithmetic and logical instructions
3. Shift / rotate instructions
4. Program control transfer instructions
5. Machine Control Instructions
6. Flag manipulation instructions
7. String instructions

4.2 DATA TRANSFER INSTRCUTIONS

Data transfer instruction, as the name suggests is for the transfer of data from memory to
internal register, from internal register to memory, from one register to another register, from
input port to internal register, from internal register to output port etc.

1. MOV instruction
• It is a general-purpose instruction to transfer byte or word from register to
register, memory to register, register to memory or with immediate addressing.
General Form:
o MOV Des, Src
• Here the source and destination need to be of the same size that is either 8 bit or 16 bits.
• MOV instruction does not affect any flags.
• Both Src and Des cannot be memory location at the same time.

Example:
MOV BX, 00F2H ; load the immediate number 00F2H in BX register
MOV CL, [2000H] ; Copy the 8-bit content of the memory location, at a displacement of
2000H from data segment base to the CL register
MOV [589H], BX ; Copy the 16- b i t content of BX register on to the memory
location, which at a displacement of 589H from the data segment base.
MOV DS, CX ; Move the content of CX to DS

2. PUSH instruction
• The PUSH instruction decrements the stack pointer by two and copies the word from
source to the location where stack pointer now points.
• Here the source must be of word size data. Source can be a general-purpose register,
segment register or a memory location.
• The PUSH instruction first pushes the most significant byte to sp-1, then the least
significant to the sp-2.
• Push instruction does not affect any flags

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 Figure 3.1: PUSH operation.
Example:
PUSH CX ; Decrements SP by 2, copy content of CX to the stack (figure shows execution
of this instruction)
PUSH DS ; Decrement SP by 2 and copy DS to stack

3. POP instruction
• The POP instruction copies a word from the stack location pointed by the stack pointer
to the destination.
• The destination can be a general-purpose register, a segment register or a memory
location. Here after the content is copied the stack pointer is automatically incremented
by two.
• The execution pattern is similar to that of the PUSH instruction.

Example:
POP CX ; Copy a word from the top of the stack to CX and increment SP by 2.

4. IN & OUT instructions

• The IN instruction copies data from a port to the accumulator. If the data is 8 bit, it goes
to AL and if it is 16 bit then it goes to AX. General Form:
o IN Accumulator, Port Address
• Similarly, OUT instruction is used to copy data from accumulator to an output port.
General Form:
o OUT Port Address, Accumulator
• Both IN and OUT instructions can be done using direct and indirect addressing modes.

Example:
IN AL, 0F8H ; Copy a byte from the port 0F8H to AL
MOV DX, 30F8H ; Copy port address in DX
IN AL, DX ; Move 8 bit data from 30F8H port
IN AX, DX ; Move 16 bit data from 30F8H port
OUT 047H, AL ; Copy contents of AL to 8 bit port 047H
MOV DX, 30F8H ; Copy port address in DX
OUT DX, AL ; Move 8 bit data to the 30F8H port
OUT DX, AX ; Move 16 bit data to the 30F8H port

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5. XCHG instruction
• The XCHG instruction exchanges contents of the destination and source. General
Format:
o XCHG Des, Src
• Destination and source can be register and register, or register and memory location,
but XCHG cannot interchange the value of two memory locations.
Example:
XCHG BX, CX ; exchange word in CX with the word in BX
XCHG AL, CL ; exchange byte in CL with the byte in AL
XCHG AX, SUM[BX] ; here physical address, which is DS+SUM+[BX]. The content
at physical address and the content of AX are interchanged

4.3 ARITHEMATIC AND LOGIC INSTRCUTIONS

The arithmetic and logic group of instructions include:

1. ADD instruction
• Add instruction is used to add the current contents of destination with that of source
and store the result in destination. General Format:
o ADD Des, Src
• Here we can use register and/or memory locations. AF, CF, OF, PF, SF, and ZF flags
are affected

Example:
ADD AL, 0FH ; Add the immediate content, 0FH to the content of AL and store
the result in AL
ADD AX, BX ; AX <= AX+BX
ADD AX, 0100H ; IMMEDIATE
ADD AX, BX ; REGISTER
ADD AX, [SI] ; REGISTER INDIRECT OR INDEXED
ADD AX, [5000H] ; DIRECT
ADD [5000H], 0100H ; IMMEDIATE
ADD 0100H ; DESTINATION AX (IMPLICT)

2. ADC: ADD WITH CARRY

• This instruction performs the same operation as ADD instruction, but adds the carry
flag bit (which may be set as a result of the previous calculation in CF) to the result.
• All the condition code flags are affected by this instruction.

Example:
ADC AX, BX ; REGISTER
ADC AX, [SI] ; REGISTER INDIRECT OR INDEXED
ADC AX, [5000H] ; DIRECT
ADC [5000H], 0100H ; IMMEDIATE
ADC 0100H ; IMMEDIATE (AX IMPLICT)

3. SUB instruction
• SUB instruction is used to subtract the current contents of destination with that of source
and store the result in destination. General Format:
o SUB Des, Src
• Here we can use register and/or memory locations. AF, CF, OF, PF, SF, and ZF flags
are affected
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Example:
SUB AL, 0FH ; subtract the immediate content, 0FH from the content of AL and store
the result in AL
SUB AX, BX ; AX <= AX-BX
SUB AX, 0100H ; IMMEDIATE (DESTINATION AX)
SUB AX, BX ; REGISTER
SUB AX, [5000H] ; DIRECT
SUB [5000H], 0100H ; IMMEDIATE

4. SBB: SUBTRACT WITH BORROW

• Subtract with borrow instruction subtracts the source operand and the borrow flag (CF)
which may reflect the result of the previous calculations, from the destination operand.
• Subtraction with borrow, here means subtracting 1 from the subtraction obtained by
SUB, if carry (borrow) flag is set.
• The result is stored in the destination operand. All the flags are affected (condition code)
by this instruction.

Example:
SBB AX, 0100H ; IMMEDIATE (DESTINATION AX)
SBB AX, BX ; REGISTER
SBB AX, [5000H] ; DIRECT
SBB [5000H], 0100H ; IMMEDIATE

5. CMP: COMPARE
• The instruction compares the source operand, which may be a register or an immediate
data or a memory location, with a destination operand that may be a register or a
memory location.
• For comparison, it subtracts the source operand from the destination operand but does
not store the result anywhere.
• The flags are affected depending upon the result of the subtraction.
o If both of the operands are equal, zero flag is set.
o If the source operand is greater than the destination operand, carry flag is set or
else, carry flag is reset.

Example:
CMP BX, 0100H ; IMMEDIATE
CMP AX, 0100H ; IMMEDIATE
CMP [5000H], 0100H ; DIRECT
CMP BX, [SI] ; REGISTER INDIRECT OR INDEXED
CMP BX, CX ; REGISTER

6. INC & DEC instructions

• INC and DEC instructions are used to increment and decrement the content of the
specified destination by one.
• AF, CF, OF, PF, SF, and ZF flags are affected.

Example:
INC AL ; AL<= AL + 1
INC AX ; AX<=AX + 1 DEC
AL ; AL<= AL – 1 DEC AX
; AX<=AX – 1
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7. MUL: Unsigned Multiplication
• Unsigned multiplication instruction. It assumes one of the operand is in AL or AX.
General Format:
o MUL Src
• It multiplies two bytes to produce a word or two words to produce a double word. Src
can be a register or memory location.
AX = AL * Src
DX : AX = AX * Src

Example:
MUL Reg/ Mem ; for byte: (AX) <= (AL) x (Reg8/Mem8)
; for word: (DX)(AX) <= (AX) x (Reg16/Mem16)

8. IMUL: Signed Multiplication

• Signed multiplication instruction.

IMUL Reg/ Mem ; for byte: (AX) <= (AL) x (Reg8/Mem8)

; for word: (DX)(AX) <= (AX) x (Reg16/Mem16)

9. DIV: Unsigned Division

• Unsigned division instruction. It divides word by byte or double word by word. General
Format:
o DIV Src
• The operand is stored in AX, divisor is Src and the result is stored as:
o AH = remainder AL = quotient
Example:
DIV Reg/ Mem ; For 16-bit ÷ 8-bit:
(AL) <= (AX) ÷ (Reg8/Mem8) Quotient
(AH) <= (AX) MOD (Reg8/Mem8) Remainder
; For 32-bit ÷ 16-bit:
(AX) <= (DX)(AX) ÷ (Reg16/Mem16) Quotient
(DX) <= (DX)(AX) MOD (Reg16/Mem16) Remainder

10. IDIV: Signed Division

• Signed division instruction.

Example:
IDIV Reg/ Mem ; For 16-bit ÷ 8-bit:
(AL) <= (AX) ÷ (Reg8/Mem8) Quotient
(AH) <= (AX) MOD (Reg8/Mem8) Remainder
; For 32-bit ÷ 16-bit:
(AX) <= (DX)(AX) ÷ (Reg16.Mem16) Quotient
(DX) <= (DX)(AX) MOD (Reg16/Mem16) Remainder

11. AND instruction

• This instruction logically ANDs each bit of the source byte/word with the
corresponding bit in the destination and stores the result in destination. General Format:
o AND Des, Src
• The source can be an immediate number, register or memory location. Destination can
be a register or memory location.

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 • The CF and OF flags are both made zero, PF, ZF, SF are affected by the operation and
AF is undefined.

Example:
AND BL, AL ; suppose BL=1000 0110 and AL = 1100 1010 then after the operation
BL would be BL= 1000 0010.
AND CX, AX ; CX <= CX AND AX
AND CL, 08 ; CL<= CL AND (0000 1000)

12. OR instruction
• This instruction logically ORs each bit of the source byte/word with the corresponding
bit in the destination and stores the result in destination. General Format:
o OR Des, Src
• The source can be an immediate number, register or memory location. Destination can
be a register or memory location.
• The CF and OF flags are both made zero, PF, ZF, SF are affected by the operation and
AF is undefined.

Example:
OR BL, AL ; suppose BL=1000 0110 and AL = 1100 1010 then after the operation
BL would be BL= 1100 1110.
OR CX, AX ; CX <= CX AND AX
OR CL, 08 ; CL<= CL AND (0000 1000)

13. NOT instruction

• The NOT instruction complements (inverts) the contents of an operand register or a
memory location, bit by bit.

Example:
NOT AX ; Before AX= (1011)2= (B)16. After execution AX= (0100)2= (4)16.
NOT [5000H]

14. XOR instruction

• The XOR operation is carried out in a similar way to the AND and OR operation. The
constraints on the operands are also similar.
• The XOR operation gives a high output (1), when the two input bits are dissimilar.
Otherwise, the output is zero.

Example:
XOR AX, 0098H
XOR AX, BX
XOR AX, [5000H]

4.4 SHIFT / ROTATE INSTRCUTIONS

• Shift instructions move the binary data to the left or right by shifting them within the
register or memory location. They also can perform multiplication of powers of 2+n and
division of powers of 2-n.
• There are two type of shifts logical shifting and arithmetic shifting, later is used with
signed numbers while former with unsigned.

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 • Rotate on the other hand rotates the information in a register or memory either from
one end to another or through the carry flag.

1. SHL/SAL instruction
• Both instruction shifts each bit to left, and places the MSB in CF and LSB is made 0.
• The destination can be of byte size or of word size, also it can be a register or a memory
location. General Format:
o SAL/SHL Des, count
• Number of shifts is indicated by the count. All flags are affected.

Example:
MOV BL, B7H ; BL is made B7H
SAL BL, 1 ; shift the content of BL register one place to left.

Before execution:
CY B7 B6 B5 B4 B3 B2 B1 B0
0 1 0 1 1 0 1 1 1

After the execution:

CY B7 B6 B5 B4 B3 B2 B1 B0
1 0 1 1 0 1 1 1 0

2. SHR instruction
• This instruction shifts each bit in the specified destination to the right and 0 is stored in
the MSB position. The LSB is shifted into the carry flag.
• The destination can be of byte size or of word size, also it can be a register or a memory
location. General Format:
o SHR Des, count
• Number of shifts is indicated by the count. All flags are affected

Example:
MOV BL, B7H ; BL is made B7H
SHR BL, 1 ; shift the content of BL register one place to the right.

Before execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
1 0 1 1 0 1 1 1 0

After execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
0 1 0 1 1 0 1 1 1

3. ROL instruction
• This instruction rotates all the bits in a specified byte or word to the left some number
of bit positions. MSB is placed as a new LSB and a new CF.
• The destination can be of byte size or of word size, also it can be a register or a memory
location. General Format:
o ROL Des, count
• Number of shifts is indicated by the count. All flags are affected

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Example:
MOV BL, B7H ; BL is made B7H
ROL BL, 1 ; rotates the content of BL register one place to the left.

Before execution:
CY B7 B6 B5 B4 B3 B2 B1 B0
0 1 0 1 1 0 1 1 1

After the execution:

CY B7 B6 B5 B4 B3 B2 B1 B0
1 0 1 1 0 1 1 1 1

4. ROR instruction
• This instruction rotates all the bits in a specified byte or word to the right some number
of bit positions. LSB is placed as a new MSB and a new CF.
• The destination can be of byte size or of word size, also it can be a register or a memory
location. General Format:
o ROR Des, count
• Number of shifts is indicated by the count. All flags are affected

Example:
MOV BL, B7H ; BL is made B7H
ROR BL, 1 ; shift the content of BL register one place to the right.

Before execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
1 0 1 1 0 1 1 1 0

After execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
1 1 0 1 1 0 1 1 1

5. RCR instruction
• This instruction rotates all the bits in a specified byte or word to the right some number
of bit positions along with the carry flag. LSB is placed in a new CF and previous carry
is placed in the new MSB.
• The destination can be of byte size or of word size, also it can be a register or a memory
location. General Format:
o RCR Des, count
• Number of shifts is indicated by the count. All flags are affected

Example:
MOV BL, B7H ; BL is made B7H
RCR BL, 1 ; shift the content of BL register one place to the right.

Before execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
1 0 1 1 0 1 1 1 0

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After execution:
B7 B6 B5 B4 B3 B2 B1 B0 CY
0 1 0 1 1 0 1 1 1

4.5 PROGRAM CONTROL TRANSFER INSTRCUTIONS

• These instructions cause change in the sequence of the execution of instruction.
• This change can be through a condition or sometimes unconditional.
• There are two types of Program control transfer instructions:
o Unconditional transfer instructions – CALL, RET, JMP
o Conditional transfer instructions – J condition

1. CALL instruction
• The CALL instruction is used to transfer execution to a subprogram or procedure. There
are two types of CALL instructions, near and far.
• A near CALL is a call to a procedure which is in the same code segment as the CALL
instruction.
• When 8086 encounter a near call, it decrements the SP by 2 and copies the offset of the
next instruction after the CALL on the stack. It loads the IP with the offset of the
procedure then to start the execution of the procedure.
• A far CALL is the call to a procedure residing in a different segment. Here value of CS
and offset of the next instruction both are backed up in the stack. And then branches to
the procedure by changing the content of CS with the segment base containing
procedure and IP with the offset of the first instruction of the procedure.

Example:
Near call
CALL PRO ; PRO is the name of the procedure
CALL CX ; Here CX contains the offset of the first instruction of the procedure, that is
replaces the content of IP with the content of CX
Far call
CALL DWORD PTR[8X] ; New values for CS and IP are fetched from four memory
locations in the DS. The new value for CS is fetched from [8X]
and [8X+1], the new IP is fetched from [8X+2] and [8X+3].

2. RET instruction
• RET instruction returns execution from a procedure to the next instruction after the
CALL instruction in the calling program.
• If it was a near call, then IP is replaced with the value at the top of the stack, if it had
been a far call, then another POP of the stack is required.
• This second popped data from the stack is put in the CS, thus resuming the execution
of the calling program.
• RET instruction can be followed by a number, to specify the parameters passed. RET
instruction does not affect any flags. General format:
o RET
Example:
p1 PROC ; procedure declaration.
MOV AX, 1234h
RET ; return to caller.
p1 ENDP

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3. JMP instruction
• This is also called unconditional jump instruction, because the processor jumps to the
specified location rather than the instruction after the JMP instruction.
• Jumps can be short jumps when the target address is in the same segment as the JMP
instruction or far jumps when it is in a different segment. General Format:
o JMP <targetaddress>

Example:
MOV AL, 05H
JMP label1 ; jump over to label
MOV AL, 00H
label1: MOV [2000H], AL
RET

4. Conditional Jump (J cond)

Conditional jumps are always short jumps in 8086. Here jump is done only if the condition
specified is true/false. If the condition is not satisfied, then the execution proceeds in the normal
way.

Example:
There are many conditional jump instructions like
JC: Jump on carry (CF=set)
JNC: Jump on non carry (CF=reset)
JZ: Jump on zero (ZF=set)
JNO: Jump on overflow (OF=set)
Etc

5. Iteration control instructions

• These instructions are used to execute a series of instructions some number of times.
• The number is specified in the CX register, which will be automatically decremented
in course of iteration. But here the destination address for the jump must be in the range
of -128 to 127 bytes.

Example:
Instructions here are:-
LOOP ; loop through the set of instructions until CX is 0
LOOPE/LOOPZ ; here the set of instructions are repeated until CX=0 or ZF=0
LOOPNE/LOOPNZ ; here repeated until CX=0 or ZF=1

4.6 MACHINE CONTROL INSTRCUTIONS

1. HLT instruction
• The processor enters into a halt state. The processor gets out of this Halt signal upon an
interrupt signal in INTR pin/NMI pin or a reset signal on RESET input.
• General form:
o HLT

2. WAIT instruction
• When this instruction is executed, the 8086 enters into an idle state. This idle state is
continued till a high is received on the TEST input pin or a valid interrupt signal is
received.

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 • Wait affects no flags. It generally is used to synchronize the 8086 with a peripheral
device(s).

3. ESC instruction
• This instruction is used to pass instruction to a coprocessor like 8087. There is a 6 bit
instruction for the coprocessor embedded in the ESC instruction.
• In most cases the 8086 treats ESC and a NOP, but in some cases the 8086 will access
data items in memory for the coprocessor

4. LOCK instruction
• In multiprocessor environments, the different microprocessors share a system bus,
which needed to access external devices like disks.
• LOCK instruction is given as prefix in the case when a processor needs exclusive access
of the system bus for a particular instruction. It affects no flags.

5. NOP instruction
• At the end of NOP instruction, no operation is done other than the fetching and decoding
of the instruction.
• NOP affects no flags.

4.7 FLAG MANIPULATION INSTRCUTIONS

1. STC instruction
• This instruction sets the carry flag. It does not affect any other flag.

2. CLC instruction
• This instruction resets the carry flag to zero. CLC does not affect any other flag.

3. CMC instruction
• This instruction complements the carry flag. CMC does not affect any other flag.

4. STD instruction
• This instruction is used to set the direction flag to one so that SI and/or DI can be
decremented automatically after execution of string instruction. STD does not affect
any other flag.

5. CLD instruction
• This instruction is used to reset the direction flag to zero so that SI and/or DI can be
incremented automatically after execution of string instruction. CLD does not affect
any other flag.

6. STI instruction
• This instruction sets the interrupt flag to 1. This enables INTR interrupt of the 8086.
STI does not affect any other flag.

7. CLI instruction
• This instruction resets the interrupt flag to 0. Due to this the 8086 will not respond to
an interrupt signal on its INTR input. CLI does not affect any other flag.

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4.8 STRING INSTRCUTIONS
• String is a sequence of bytes or words
• 8086 instruction set includes instruction for string movement, comparison, scan, load
and store.
• REP instruction prefix : used to repeat execution of string instructions
• String instructions end with S or SB or SW. S represents string, SB string byte and SW
string word.
• Offset or effective address of the source operand is stored in SI register and that of the
destination operand is stored in DI register.
• Depending on the status of DF, SI and DI registers are automatically updated.
• DF = 0 => SI and DI are incremented by 1 for byte and 2 for word.
• DF = 1 => SI and DI are decremented by 1 for byte and 2 for word.
1. MOVS/MOVSB/MOVSW
• These instructions copy a word or byte from a location in the data segment to a location
in the extra segment.
• The offset of the source is in SI and that of destination is in DI. For multiple word/byte
transfers the count is stored in the CX register.
• When direction flag is 0, SI and DI are incremented and when it is 1, SI and DI are
decremented.
• MOVS affect no flags. MOVSB is used for byte sized movements while MOVSW is
for word sized.
Example:
CLD ; clear the direction flag to auto increment SI and DI
MOV AX, 0000H ;
MOV DS, AX ; initialize data segment register to 0
MOV ES, AX ; initialize extra segment register to 0
MOV SI, 2000H ; Load the offset of the string1 in SI
MOV DI, 2400H ; Load the offset of the string2 in DI
MOV CX, 04H ; load length of the string in CX
REP MOVSB ; decrement CX and MOVSB until CX will be 0
MOVSB MA = (DS) x 10 + (SI)
MAE = (ES) x 10 + (DI)
(MAE) <= (MA)
If DF = 0, then (DI) <= (DI) + 1; (SI) <= (SI) + 1 If
DF = 1, then (DI) <= (DI) - 1; (SI) <= (SI) – 1
MOVSW MA = (DS) x 10 + (SI)
MAE = (ES) x 10 + (DI)
(MAE ; MAE + 1) <= (MA; MA + 1)
If DF = 0, then (DI) <= (DI) + 2; (SI) <= (SI) + 2 If
DF = 1, then (DI) <= (DI) - 2; (SI) <= (SI) - 2

2. REP/REPE/REP2/REPNE/REPNZ
• REP is used with string instruction; it repeats an instruction until the specified condition
becomes false.
• REP => CX=0
• REPE/REPZ => CX=0 OR ZF=0

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 • REPNE/REPNZ => CX=0 OR ZF=1

Example:
REP MOVSB STR1, STR2

3. LODS / LODSB /LODSW

• Load a byte or word in AL or AX
• Copies byte or word from memory location pointed by SI into AL or AX register.

Example:
LODSB S_STRING

LODSB MA = (DS) x 10 + (SI)

(AL) <= (MA)
If DF = 0, then (SI) <= (SI) + 1
If DF = 1, then (SI) <= (SI) – 1
LODSW MA = (DS) x 10 + (SI)
(AX) <= (MA ; MA + 1)
If DF = 0, then (SI) <= (SI) + 2
If DF = 1, then (SI) <= (SI) – 2

4. STOS / STOSB / STOSW

• Store byte or word in a string. It does not affect any flags.
• Copies a byte or word contained in AL or AX to memory location pointed by DI.

Example:
STOS D_STRING

STOSB MAE = (ES) x 10 + (DI)

(MAE) <= (AL)
If DF = 0, then (DI) <= (DI) + 1
If DF = 1, then (DI) <= (DI) – 1
STOSW MAE = (ES) x 10 + (DI)
(MAE ; MAE + 1 ) <= (AX)
If DF = 0, then (DI) <= (DI) + 2
If DF = 1, then (DI) <= (DI) – 2

5. CMPS / CMPSB / CMPSW

• Compare string bytes or string words.
• The comparison is affected by subtraction of content pointed by DI from that pointed
by SI. The AF, CF, OF, PF, SF and ZF flags are affected by this instruction, but neither
operand is affected.

Example:
MOV SI, OFFSET F_STRING ; point first string
MOV DI, OFFSET S_STRING ; point second string
MOV CX, 0AH ; set the counter as 0AH
CLD ; clear direction flag to auto increment
REPE CMPSB ; repeatedly compare till unequal or counter = 0

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