18EE71-Module-5-Part 2 Notes - 2022
18EE71-Module-5-Part 2 Notes - 2022
The fault in one line or phase is similar to all the remaining lines or phases is said to be a
Symmetrical Fault. Three phase fault or three phase to ground fault are the examples of
symmetrical fault.
Symmetrical faults are dangerous and occur rarely in power system. If the protection
scheme is developed to withstand symmetrical fault, then that power system network will
be able to withstand all the remaining type of faults.
Step 1 : Obtain the prefault voltages and currents at all the buses through load flow analysis
Step 2 : Let us assume that the rth bus is faulted through a fault impedance Zf The postfault
bus voltage vector will be given by
where
I f
V
i
f
Vjf
ij
zi j
i. Pre-fault bus voltages ‘Vi0 ’ are obtained from a load flow study.
ii. ZBUS matrix of the short-circuit study network obtained by the inversion of its
YBUS matrix
iii. Shunt elements are neglected
iv. Static loads are neglected only motor loads are considered.
Step 2: Calculate the generator transient voltages behind the transient reactance’s using
the equations (1) and (2)
0 Q 0j X |d j Pj0 X |d j
E j j Vj j (1)
V 0 Vj0
j
0j j j (2)
where j Pr e Transient Voltage Angle
0 Under Pr e Transient Conditions
Step 3: Assume the occurrence of fault and calculate the reduced bus admittance matrix for
this condition and initialize the time count k = 0. And also initialize J = 0 to check
whether the fault has occurred or not
K lk f1 ( k , k ) t
kl f 2 ( k , k ) t
1 k 1
K 2k f1 ( k K1 , k 1k ) t
2 2
1 1
k2 f 2 ( k K1k , k 1k ) t
2 2
1 1
K 3k f1 ( k K 2k , k k2 ) t
2 2
1 1
k3 f 2 ( k K 2k , k k2 ) t
2 2
K 4 f1 ( K 3 , 3 ) t
k k k k k
k4 f 2 ( k K 3k , k k3 ) t
1 k
k ( K1 2 K 2k 2 K 3k K 4k )
6
1
k ( 1k 2 k2 2 k3 k4 )
6
k 1 k k
k 1 k k
Step 7 : Evaluate the internal voltage behind transient reactance using the relation
Step 8: Check whether t < t c ( Time corresponding to Critical Clearing Angle), If yes advance
the time count by t = t + Δ t and then goto Step 4.
If J = 0 (it means a fault is occurred). Modify the YBUS according to the post fault
condition. Then set J = 1
Step 11: If t < t max then go to Step 4, otherwise goto next step
Step 12: Terminate the process of computation ( it means STOP the iteration process).
Assume the occurrence of fault and calculate the reduced bus admittance
matrix for this condition and initialize the time count k = 0. And also
initialize J = 0 to check whether the fault has occurred or not
Compute the final internal voltages of the generator at the end of time interval
(t + Δ t) using the following equation and print the result
YES
A t=t+Δt whether t < t c ?
NO
NO
Modify
whether J = 1 ? the YBUS
YES
YES
A
Whether t < t max
?
NO
STOP
1. Modern Power System Analysis, D.P. Kothari, McGraw Hill, 4th Edition 2011.
2. Power System Analysis, Haadi Sadat, McGraw Hill, 2nd Edition 2002.