Development of New Converter Topologies
Development of New Converter Topologies
his article reviews the present state and trends in the devel-
MARIAN P. KAZMIERKOWSKI, opment of key parts of controlled induction motor drive sys-
LEOPOLDO G. FRANQUELO, tems: converter topologies, modulation methods, as well as
JOSE RODRIGUEZ, MARCELO control and estimation techniques. Two- and multilevel volt-
A. PEREZ, and JOSE I. LEON age-source converters, current-source converters, and direct
converters are described. The main part of all the produced
electric energy is used to feed electric motors, and the con-
version of electrical power into mechanical power involves motors ranges from
less than 1 W up to several dozen megawatts. The contemporary drive systems
are expected to meet a variety of requirements as follows:
n maximum conversion efficiency
n wide range steeples adjustment of angular speed, torque, acceleration,
angular, and linear position
Development n fast error elimination when the control and/or disturbance signals are
being changed
of New Converter n maximum utilization of motor power under reduced voltage and current
Topologies n reliable, user-friendly operation.
The present-day drive control engineering heavily draws from the theory of
electric motors, control theory, and industrial electronics; however, it is the last
of these disciplines that plays a decisive role in the development of automated
electrical drive systems. The two basic divisions of industrial electronics, digi-
tal signal processing and power electronics, have paved the way to replace dc
brush motors by ac motors in high-performance drives.
The roots of power electronics go back to 1901 when P.C. Hewitt invented the
glass bulb mercury-arc rectifier [1], [2]. However, the present era of semiconductor
power electronics started with the commercial introduction of a silicon-controlled
rectifier (SCR), popularly called a thyristor, by General Electric (GE) in 1958. Next,
Digital Object Identifier 10.1109/MIE.2011.942173
Date of publication: 23 September 2011
Usual Converter
ac/dc, dc/dc ac/dc, dc/dc, dc/ac ac/dc, dc/ac
Topologies
Typical Power
MOSFET MOSFET, IGBT IGBT, IGCT, Thyristor
Semiconductors
Typical
Applications
and control, but the additional com- unequal distribution of losses, which in series. In addition, the unequal use
plexity can be considered as an op- causes the outer switches’ switching of the power devices of the topology
portunity to improve its power quality, losses to differ from the central ones (also present in the 3L-NPC for the
reliability, power density, perform- depending on the operation condition. inner power semiconductors) becomes
ance, and efficiency. This problem cannot be easily ad- critical. Finally, the reliability is also
The three-level neutral point dressed using the conventional scheme, reduced due to the increment of the
clamped (3L-NPC) converter is shown and modified topologies such as active components count [20]. The men-
in Figure 2(b) [11]. In this converter, NPC have been proposed [16]. In this tioned drawbacks limit the use of NPC
the dc link voltage is equally divided converter, the clamping diodes are with more than three levels in indus-
using two capacitors, and therefore, replaced by controlled switches; then, trial applications [21].
the phase output can be connected to by selecting the appropriate combina- Converters based on modular
the positive bar switching on the two tion of switches, it is possible to reduce power cells such as the cascaded H-
upper switches, to the midpoint using and equally distribute the losses. The bridge (CHB) and the flying capacitor
the two central switches, or to the neg- NPC converter can be scaled up to (FC) converter have been proposed
ative bar using the two lower switches achieve more than three levels by sim- so far to provide higher number of
[12]. Each semiconductor needs to ply dividing the dc link into more than output voltage levels than the 3L-NPC.
block only half of the total dc-link volt- two values using several capacitors The CHB converter topology, shown
age, allowing the increase of the power [18]. Each one of these partial dc-link in Figure 2(c), is a highly modular con-
rating using the same semiconductor voltages can be connected to the load verter based on several single-phase
technology than the conventional using an expanded arrangement of inverters, usually called power cells,
2L-VSI. The semiconductors normally switches and clamping diodes. Along connected in series to form a phase
used in these converters are the high- with the increased power rating, the [22], [23]. Each power cell is imple-
voltage IGBT (HV-IGBT) [13] and the advantages of several output voltage mented based on standard low-volt-
IGCT [14]. levels are its better power quality, age components, which provides an
A well-documented problem pre- smaller dv=dt, and the associated elec- easy and cheap replacement in case
sented in this converter is the unbal- tromagnetic interference [19]. How- of failure [24]. The main advantage of
ance of the capacitors produced by ever, when the NPC converter has this converter is that, using only low-
asymmetries in the converter hard- more than three levels, additional voltage components, it is possible to
ware and mainly the operational con- problems arise. From the point of view drive medium-voltage high-power loads.
ditions [15]. Several strategies to deal of the power topology, the clamping Although the switching frequency in
with this problem have been proposed, diodes require higher blocking voltage each cell is low, the equivalent switch-
mainly focusing on the modification than the main switches; therefore, it is ing frequency applied to the load is
of the modulation strategy [16], [17]. necessary to use different technology high, which reduces the switching
Another issue of this converter is the or several clamping diodes connected losses, produces low dv=dt, and helps
0 N ia ib ic
sp sn sp sn sp sn M
Vdc Vdc Vdc
+ + +
Voa1 Vob1 Voc1 (b)
sp sn sp sn sp sn P
sp sn sp sn sp sn + Vdc
2 sa2 sb2 sc2
Vdc Vdc Vdc
+ + +
Voa2 Vob2 Voc2
sp sn sp sn sp sn Vdc Vdc sa3 Vdc Vdc sb3 Vdc Vdc sc3
Vdc
2 4 2 4 2 4
0 va vb vc
Time Time
(e) (f)
va0 va0
Time Time
(g) (h)
FIGURE 2 – Topologies and phase voltages of the conventional two-level and multilevel voltage-source inverters. (a) Two-level VSI.
(b) Three-level NPC converter. (c) Seven-level CHB converter. (d) Five-level FC converter. (e) Two-level VSI. (f) Three-level NPC inverter.
(g) Five-level FC inverter. (h) Seven-level CHB inverter.
to avoid resonances [25]. Additionally, In the CHB converter, each power using a multipulse transformer with
several fault-tolerant strategies can be cell requires an isolated dc power several secondary diode rectifiers and
implemented by increasing their reli- source that can be obtained, for exam- a dc-link capacitor. The first option
ability and overall availability [26]. ple, from photovoltaic (PV) panels or provides high scalability and allows
idc idc
vsa isa sap sbp scp v ioa vsa isa vca voa ioa
oa
vsb isb ira vob iob vsb isb vcb ira vob iob
M M
vsc isc voc ioc vsc isc vcc voc ioc
san sbn scn
(a) (b)
FIGURE 3 – Topologies and output waveforms of the conventional CSIs. (a) CSI. (b) Current-source back-to-back converter. (c) Output cur-
rent. (d) Output voltage. (e) Load current.
vos
vsa isa M
0° ios
vsb isb
vsc isc
Time
0
vot
+20° iot
ior
(a) (b)
vsa isa vca ica vsb
vor vsa
vsc
vsb isb vcb icb
P P
N N
(e) (f)
FIGURE 4 – Topologies and output waveforms of the direct converters. (a) Cycloconverter. (b) Cycloconverter waveforms. (c) DMC.
(d) Matrix converter waveforms. (e) IMC. (f) SMC.
The fundamental objective of a A classification of the modula- modulation techniques will be ex-
modulation technique is to obtain the tion techniques for power convert- plained in detail.
best waveforms (voltages and cur- ers is shown in Figure 5. In this
rents) with minimum losses. Other classification, the modulation tech- Pulsewidth Modulation
secondary control objectives can be niques are divided into four main
dealt with the proper modulation tec- groups: PWM, space vector modula- Conventional Bipolar and
hnique such as common-mode volt- tion (SVM), harmonic control modu- Unipolar PWM
age reduction, dc voltage balancing, lation, and other variable switching Among the most commonly used mod-
input current harmonics minimiza- frequency methods. These modula- ulation techniques, PWM is the most
tion, and low dv=dt. Simultaneously tion techniques were applied to the successful modulation method because
achieving all the control targets is power converters since several dec- of its high performance, simplicity, fixed
impossible, so a tradeoff is needed. ades and are the most mature mod- switching frequency, and easy digital
Each power converter topology and ulation techniques implemented in and analog implementation [56]. The
each application has to be studied in the power converters as commer- PWM technique is based on the
depth to determine which modulation cial products. In the following sec- comparison of a reference signal with
technique suits most. tions, the proposed classification of frequency f1 , usually a sinusoidal
Single Phase
"
β
q
Is
Isq LM
M= q r ψ ⋅ Iq
Flux Lr rc
Isd
γr d
Stator Vdc
α
Vsdc Vsαc
ψrc ∼ Isd PI d-q SA
– SB
SVM
Vsqc Vsβ c SC
Mc ∼ Isq PI αβ
– Vdc
Voltage
"
"
Isα
"
d-q
IM
αβ 3~
FIGURE 7 – Vector diagram and block diagram of rotor FOC. Torque is controlled indirectly via torque current Isq control loop.
VS Flux
d ψS
VM M= ⋅V
Rs M
Vψ
γr
Stator Vdc
α
ψsc Vψ c Vsα c
PI d–q SA
–
SB
SVM
VMC Vsβ c SC
Mc
PI αβ
– Vdc
"
"
Ωm Ψs Voltage
Calculation
Vsα Vsβ
γs
"
"
Ψs
Flux Isα
Torque αβ
"
Me Speed Isβ
ABC
Estimator
IM
"
Ωm
3~
FIGURE 8 – Vector diagram and block scheme of DTC-SVM. Torque is controlled directly via voltage vector component VM .
estimated flux, and the stator flux n coordinate transformation is not appropriate voltage vector from the
error DWs is directly used for the cal- required switching selection table. Thus, pulses
culation of VSI switching states in the n there is no separate voltage PWM SA , SB , and SC for control the inverter
FVM block [81], [82]. Thanks to the n speed sensor is not required power switches are generated from
internal stator flux loop used for the n accurate stator flux vector and the vector selection table. The charac-
calculation of DWs in the flux PWM, torque estimation is required. teristic features of the ST-DTC scheme
the flux PI controller of Figure 8 is This section includes the ST-based of Figure 9 include:
eliminated. DTC (ST-DTC), direct self control (DSC), n sinusoidal stator flux and current
and online-optimized model-predictive waveforms with harmonic con-
Nonlinear TC DTC. Also, neural networks (NNs) and tent determined by the flux and
The presented nonlinear TC group fuzzy logic controllers (FLCs) belong to torque controller hysteresis tol-
departs from the idea of coordinate the class of nonlinear control [72], [84]. erance bands
transformation and the analogy with n excellent torque dynamics (depend-
dc motor control, which is the basis Classical ST-DTC Scheme ing on voltage reserve)
for the FOC. It proposes to replace The block diagram of the classical n flux and torque hysteresis bands
the decoupling control with the ST-DTC scheme is shown in Figure 9 determine the inverter switching
bang–bang control, which meets very [83]. The stator flux magnitude Wsc frequency, which varies with the syn-
well with on–off operation of the and the motor torque Mc are the chronous speed and load changes.
inverter semiconductor power devi- command signals that are compared Many modifications of the classical
ces. Compared with the conventional with the estimated W ^ e values,
^ s and M ST-DTC scheme aimed at improving
FOC (Figure 7), the DTC schemes respectively. The digitized flux and starting, overload conditions, very low
have the following features: torque errors generated by the hyster- speed operation, torque ripple reduc-
n simple structure esis controllers dW , dM , and the posi- tion, variable switching frequency
n there is no current control loops, tion sector N(cs ) of the stator flux functioning, and noise level attenua-
and current the is not regulated vector obtained from the angular posi- tion have been proposed during the
directly tion cs ¼ arctg(Wsb =Wsa ) selects the last few decades [77], [79].
N (γs) Vdc
in the defined-by-hysteresis toler-
"
Vsα
ance band.
"
ψs Voltage
"
β
Δψs = eVsdt
ψsc
Δδψ
ψs LM 1
M≅ q r ψr Δψs
Lr σ Lr
δψ
γs ψr
Stator
α Vdc
ψsc
Δψsα c Δψsα c SA
Mc Δδψ
SB
"
– Vdc
"
"
ψsα Vsα
Voltage
"
ψsβ Flux
"
Vsβ Calculation
Torque
"
γs Speed Isα
Estimator αβ
"
Me Isβ
ABC
IM
3~
FIGURE 10 – Vector diagram and block scheme of DTC-FVM. Torque is controlled directly via stator flux vector increment DWs with FVM.
Me
operates without PWMs because the
inverter switching state is calculated SA
dB
"
Vsβ
case of multilevel VSI, reducing com-
mon voltage) increasing the flexibility Flux Isα
and priority in predefinition of system Torque αβ
performances. The important advan- Speed Isβ
Estimator ABC
tages of the MPC are: IM
n intuitive and easy to understand 3~
concept
n easy inclusion of nonlinearities in
FIGURE 11 – Vector diagram and block scheme of DSC. Torque is controlled directly in simi-
the model and simple treatment lar way as in the ST-DTC scheme; however, stator flux vector moves on hexagonal path
of constraints because of different sector definition.
"
"
Vsα Vsβ Calculation
indirect flux vector generation have
been developed, known as flux mod-
"
ψ s(k)
Flux Isα els or flux estimators. These are mod-
"
– ψr
"
Vs
ψs (ψr ) pensation signal calculated from the
– commanded WRc and estimated WR^
ψs
"
"
I
ψs
"
"
"
Is Isdq ψrdq ψr ucomp ψs
e–jγψR e jγψR ψS(ψR)
–
"
ψs
"
γψ r
"
γψ r
"
ψr
"
ψr
arctg(ψRβ /ψRα ) ψr (ψs)
Is
FIGURE 14 – Speed sensorless flux vector observer based on voltage model compensated by current model.
voltage signal becomes dominant, Speed Estimation and area of applications. In FOC and
and the flux vector is calculated by There is a strong trend to avoid DTC-SVM schemes, the control action
the voltage model. This observer al- mechanical motion (speed/position) is usually synchronized with PWM
lows starting up and breaking the sensors because it reduces cost and generation and executed with the
drive system; however, control tor- improves reliability and functionality sampling time equal to the switching
que operation at zero speed is not of the drive system. Various methods time ranging from 50 to 500 ls. The
possible. of the rotor speed estimation has typical torque rise time is about four
Another flux vector observer also been developed for induction motors; to six sampling and is limited by the
operating without measured speed however, the detailed analysis is VSI switching frequency. For compari-
signal is shown in Figure 14. The sta- beyond the scope of this article. A son, the parameters of scalar constant
tor flux vector is calculated by the good review of IM speed sensorless (V/Hz) control are given.
voltage model and compensated by control schemes is presented in [84]
the current model operating in the and [88]. Summary
R-FOCs dq. At higher speed, the volt- Power electronics controlled high-
age model guarantees better accu- Closing Remarks and Overview performance ac drives belong to
racy because the stator resistance is The overview of the basic parameters high-tech industry and is one of main
small while, at low speeds, the cur- and application areas of main dis- factors for energy saving and produc-
rent model is better and operates cussed control strategies are pre- tivity growth. This article reviews the
even at zero frequency [76]. The tran- sented in Table 1. It can be concluded present state and trends in the devel-
sition between the two models is that the group of high-performance opment of key parts of controlled
defined by the design of the PI con- control achieves similar parameters drive systems: converter topologies,
troller that generates the compensa-
tion voltage ucomp .
In Figure 15, a flux vector observer
"
ψR
the stator and rotor flux. The mea- Lσ
ψ μ′
"
PWM methods, as well as control and he has been the head of the Centre Electronics since 2007. He has been
estimation techniques. of Excellence on Power Electronics the president of IES since 2010. He
The following topologies were de- and Intelligent Control for Energy is a Fellow of the IEEE. His current
scribed: two- and multilevel voltage- Conservation at ICIE. He received an research interests include modula-
source converters, current-source honorary doctorate degree from tion techniques for multilevel inver-
converters, and direct converters. Aalborg University in 2004 and the ters and its application to power
Also, PWM techniques were briefly Institut National Polytechnique de electronic systems for renewable
presented: conventional bipolar and Toulouse, France, in 2010. In 2005, he energy systems.
unipolar PWM, SVM with extension received the Dr.-Ing. Eugene Mittel- Jose Rodriguez (jrp@usm.cl) re-
for multilevel converters, harmonic mann Achievement Award from the ceived his engineering degree in
control techniques, and variable IEEE Industrial Electronics Society electrical engineering from the Uni-
frequency modulation (hysteresis, (IES) and, in 2007, the SIEMENS Re- versidad Tecnica Federico Santa
nearest level, and model predictive search Award in Poland. In 2007, he Maria (UTFSM), Valparaiso, Chile, in
technique). was elected as the corresponding 1977 and the Dr.-Ing. degree in elec-
Finally, the generic TC methods member of the Polish Academy of Sci- trical engineering from the Univer-
were described in two groups: linear ence. He was the editor-in-chief of sity of Erlangen, Germany, in 1985.
and nonlinear controllers. The linear IEEE Transactions on Industrial Elec- He has been with the Department of
group was presented with FOC, DTC tronics (2004–2006). Currently, he is Electronics Engineering, UTFSM since
with voltage SVM, and DTC with FVM the dean of the Technical Science 1977, where he is currently a full
(DTC-FVM). The group of nonlinear Department, Polish Academy of Sci- professor and rector. He has coau-
control includes: classical ST-based ence. He is a Fellow of the IEEE. thored more than 250 journal and
hysteresis DTC, DSC, and future Leopoldo G. Franquelo (lgfranquelo@ conference papers. He has been an
trend solutions based on predictive ieee.org) received the M.Sc. and Ph.D. associate editor of IEEE Transactions
DTC and neurofuzzy schemes. Also, degrees in electrical engineering from on Power Electronics and IEEE Transac-
selected simple flux vector observers/ the University of Seville, Spain, in tions on Industrial Electronics since
estimators were discussed. 1977 and 1980, respectively. He is 2002. He received the 2007 Best Paper
currently a full professor and head Award from IEEE Transactions on
of the Power Electronics Group with Industrial Electronics as well as the
Biographies the University of Seville. He was the 2008 Best Paper Award from IEEE
Marian P. Kazmierkowski (mpk@ vice president of the IES Spanish Industrial Electronics Magazine. He is a
isep.pw.edu.pl) received his M.S., Chapter (2002–2003) and a member member of the Chilean Academy of
Ph.D., and Dr.Sci. degrees in electri- at large of the IES Administrative Engineering and a Fellow of the IEEE.
cal engineering from the Institute of Committee (2002–2003). He was His main research interests include
Control and Industrial Electronics the vice president for conferences multilevel inverters, new converter
(ICIE), Warsaw University of Technol- (2004–2007), in which he has also topologies, control of power convert-
ogy, Poland, in 1968, 1972, and 1981, been a Distinguished Lecturer since ers, and adjustable speed drives.
respectively. From 1987 to 2008, he 2006. He has been an associate edi- Marcelo A. Perez (marcelo.perez@
was the director of ICIE. Since 2003, tor for IEEE Transactions on Industrial usm.cl) received his engineering