Enum SV
Enum SV
Enumeration:
Output:
- In the above example indexing for the constants starts from 0, so the constants
indexing is read = 0, write = 1, busy = 2, empty = 3.
- YES, the indexing of the constants in the enum variable can be changed just by
inserting the index value.
- indexing can be changed just by adding a "= index value" in enum declaration
- Example: https://edaplayground.com/x/tt2d
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Day 4/75 VLSI SYSTEM VERILOG By: Abhishek Sorte
Output:
- In the above example we can see that the index numbers are provided to the
constants at the time of enum declaration, because of that the default indexing is
overridden by the custom user defined index values.
- We have not given any index value to read, so by default it will get the index #0,
unlikely we have provided index number 5 to write so in the output it is showing
write at index #5, again busy will get the next index number i.e., index #6. At last we
have given the index number 9 to the empty so it showing index #9.
- This is how we can change the default indexing in enum.
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Day 4/75 VLSI SYSTEM VERILOG By: Abhishek Sorte
Output:
NOTE
Application of Enum:
- In FSM many states are present with different names like IDLE, STATE0, STATE1, etc.
- Before in Verilog we used parameters to declare these states and we assign some
values to it in sequence like 000, 001, 010,…, so on based on the number of states
required.
- Instead of that now enum datatype can be used.
- For this datatype we just have to write the names of the states.
- Values of the states will start from 0 (as we seen default indexing for the enum start
with 0), and it incremented by 1 for each state just like we seen in very 1st example.
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