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CS131-Digital Logic Design

This document provides details about a course on digital logic design including course description, textbooks, outlines, learning outcomes, contents, and lab work. The course introduces digital logic, gates, and circuits and focuses on designing combinational and sequential circuits. It covers topics like number systems, logic gates, simplification methods, counters, and memory elements.

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Yasir Mahmood
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101 views2 pages

CS131-Digital Logic Design

This document provides details about a course on digital logic design including course description, textbooks, outlines, learning outcomes, contents, and lab work. The course introduces digital logic, gates, and circuits and focuses on designing combinational and sequential circuits. It covers topics like number systems, logic gates, simplification methods, counters, and memory elements.

Uploaded by

Yasir Mahmood
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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IoC, Board of Studies 2023 Course Descriptions

Course Details
Code Course Title Crd Hrs. Pre-Requisite
CS131 Digital Logic Design 3(2+1) Nil

Course Introduction
The course introduces the concept pf digital logic, gates and the digital circuits. Further, it focuses on the
design and analysis combinational and sequential circuits. It also serves to familiarize the students with
the logic design of basic computer hardware components

Textbooks
1 Thomas Floyd. Digital Fundamentals 11th Edition, Pearson, (2014), ISBN: 978-0132737968
2 Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, Mc Graw
Hill, (2017), ISBN: 978-0070667242

Reference material/ Online Resources


1 Draw Gates online - https://app.creately.com/d/JGzTzOr0LGa/edit

Course Outlines
Number Systems, Logic Gates, Boolean Algebra, Simplification Methods (K-Map, Quinn Mc-Cluskey
method), Combination logic circuits and designs(Code converters, Adders and its types, Subtractor and
Multiplier, Magnitude Comparator, Multiplexer and Demultiplexer , Decoder and Encoder) ,Sequential
Circuit, Flip Flops and Latches, Asynchronous and Synchronous Counters, Binary and BCD Counters
Registers, Triggered devices & its types. Mealy machines and Moore machines., Memory Elements, State
Machines. Introduction Programmable Logic Devices (CPLD, FPGA) Lab Assignments using tools such as
Verilog HDL/VHDL, MultiSim.

Course Learning Outcomes (CLOs)


# CLOs BT Level
CLO 1 C2(Comprehension)
CLO 2 D C3(Applica on)
CLO 3 e C3(Applica on)
CLO 4 C2(Comprehension)

Mapping of CLOs to Program Learning Outcomes (PLOs)


# PLOs CLO1 CLO2 CLO3 CLO4
1 Academic Education ✓
2 Knowledge for Solving Computing Problems ✓
3 Problem Analysis ✓ ✓
4 Design/Development of Solutions ✓ ✓
5 Modern Tool Usage ✓ ✓
6 Individual and Teamwork
7 Communication
8 Computing Professionalism and Society
9 Ethics
10 Life-long Learning ✓ ✓

Course Contents
Week Topics Covered

37
IoC, Board of Studies 2023 Course Descriptions
1 Introduction to Course, Number Systems
2 Logic Gates, Boolean Algebra
3 Simplification Methods (K-Map, Quinn Mc-Cluskey method)
4 Combination logic circuits and designs
5 Flip Flops and Latches
6 Asynchronous and Synchronous circuits
7 Shift Registers
8 Counters
9 Triggered devices & its types
10 Mealy machines and Moore machines
11 Binary Arithmetic and Arithmetic Circuits
12 Memory Elements
13 State Machines
14 Introduction Programmable Logic Devices (CPLD, FPGA)
15 Introduction to HDL/VHDL
16 Introduction to MultiSim

Lab Work
Week Tasks
1 General introduction to the laboratory
2 Introduction to hardware
3 Hardware Implementation
4 Combinational SSI circuits
5 Half Adder and Full Adder operations
6 Half-subtractor and full-subtractor operations
7 Verifying the operation of multiplexer
8 Verifying the operation of Demultiplexer
9 BCD-to-Seven Segment Display decoder circuit
10 Sequential Circuits
11 To check the operation of basic RS- flip flop
12 To check the operation of clocked RS-flip flop
13 To check the operation of J – K flip-flop
14 State machine analysis
15 Semester Sample Project - Teamwork
16 Semester Sample Project - Individual

Course Details
Code Course Title Crd Hrs. Pre-Requisite

38

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