TC1232

Microprocessor Monitor
Features General Description
• Precision Voltage Monitor The TC1232 is a fully-integrated processor supervisor
- Adjustable +4.5V or +4.75V that provides three important functions to safeguard
• Reset Pulse Width – 250 msec minimum processor sanity: precision power on/off reset control,
watchdog timer and external reset override.
• No External Components
• Adjustable Watchdog Timer On power-up, the TC1232 holds the processor in the
reset state for a minimum of 250 msec after VCC is
- 150 msec, 600 msec or 1.2 sec
within tolerance to ensure a stable system start-up.
• Operating Voltage 4.0V to 5.5V
Microprocessor sanity is monitored by the onboard
• Debounced Manual Reset Input for External
watchdog circuit. The microprocessor must provide a
Override
periodic low-going signal on the ST input. Should the
processor fail to supply this signal within the selected
Block Diagram time-out period (150 msec, 600 msec or 1200 msec),
VCC an out-of-control processor is indicated and the
TC1232 issues a processor reset as a result.
Tolerance RST
Select The outputs of the TC1232 are immediately driven
TOL (5% or 10%) + RST active when the PB input is brought low by an external
+ – push button switch or other electronic signal. When
+
VREF connected to a push button switch, the TC1232
–
provides contact debounce.

Reset
The TC1232 is packaged in a space-saving 8-Pin PDIP
PB RST Debounce or SOIC package, a 16-Pin SOIC (wide) package and
Generator
requires no external components.
Watchdog
TD Timebase Watchdog
Select Timer ST

Package Types
8-Pin PDIP 8-Pin SOIC 16-Pin SOIC (Wide)
PB RST 1 8 VCC PB RST 1 8 VCC NC 1 16 NC
PB RST 2 15 VCC
TD 2 7 ST TD 2 7 ST
TC1232 TC1232
TC1232 NC 3 14 NC
TOL 3 6 RST TOL 3 6 RST
TD 4 13 ST
GND 4 5 RST NC 5
TC1232 12 NC
GND 4 5 RST
TOL 6 11 RST
NC 7 10 NC
GND 8 9 RST

Device Features
RST pin RST pin Minimum
WDI Input
Trip Points Reset MR
Device Pull-up Active Active Typical
Type Type (Max) Active Time Input
Resistor Level Level Timeouts (ms)
(ms)
TC1232 Open-drain External Low Push-pull High 4.75V 250 150, 600 or Yes
or 4.5V 1200

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 1

TC1232
1.0 ELECTRICAL † Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
CHARACTERISTICS are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
Absolute Maximum Ratings† operation sections of the specifications is not implied.
Voltage on Any Pin (With Respect to GND) Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
...................................................... -0.3V to +5.8V
Operating Temperature Range:
C-Version ........................................ 0°C to +70°C
E-Version......................................-40°C to +85°C
Storage Temperature Range: ............-65°C to +150°C

DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.

Parameters Sym Min Typ Max Units Conditions

Supply Voltage VCC 4.0 5.0 5.5 V

ST and PB RST Input High Level VIH 2.0 — VCC +0.3 V Note 1
ST and PB RST Input Low Level VIL -0.3 — +0.8 V
Input Leakage ST, TOL IL -1.0 — +1.0 µA
Output Current RST IOH -1.0 -12 — mA VOH = 2.4V
Current RST, RST IOL 2.0 10 — mA VOL = 0.4V
Operating Current ICC — 50 200 µA Note 2
VCC 5% Trip Point VCCTP 4.50 4.62 4.74 V TOL = GND (Note 3)
VCC 10% Trip Point VCCTP 4.25 4.37 4.49 V TOL = VCC (Note 3)
Capacitance Electrical Characteristics: Unless otherwise noted, TA = +25°C. (Note 4)
Input Capacitance ST, TOL CIN — — 5 pF
Output Capacitance RST, RST COUT — — 7 pF
Note 1: PB RST is internally pulled up to VCC with an internal impedance of typically 40 kΩ.
2: Measured with outputs open.
3: All voltages referenced to GND.
4: Ensured by design.

DS21370C-page 2 Preliminary © 2005 Microchip Technology Inc.

 TC1232

tF tR
VCC

+4.75V +4.75V

+4.25V +4.25V

VCC

VCC = 5V

+4.5V (5% Trip Point) 4.6V (5% Trip Point)

+4.25V (10% Trip Point) 4.5V(10% Trip Point)

VCC

tRPD tRPU
RST RST

Determined by VOH VOH Determined by

external Pull-up external Pull-up
RST resistor VOL RST VOL resistor

FIGURE 1-1: Rise Time, Fall Time and Reset Detected to Reset Active Timing Waveforms.

AC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.
Parameters Sym Min Typ Max Units Conditions
VCC Fall Time tF 10 — — µs Note 1
VCC Rise Time tR 0 — — µs Note 1
VCC Trip Point Detected tRPD — — 100 ns VCC falling
to RST High and RST Low
VCC Trip Point Detected tRPU 250 610 1000 ms VCC rising (Note 2)
to RST High and RST Open
Note 1: Ensured by design.
2: tR = 5 µs.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 3

TC1232

tPB tTD
ST tST

PB RST tPBD

VIH
RST (when tTD ≤ tTD (min)) “H”
VIL
tRST
RST
RST (when tTD(min) ≤ tTD ≤ tTD(max))

RST RST
(when tTD ≥ tTD(max))

The debounced PB RST input ignores input pulses less

than 1 ms and is designed to recognize pulses of RST (when tTD ≤ tTD(min)) “L”
20 ms or greater.
RST
(when tTD(min) ≤ tTD ≤ tTD(max))

RST
(when tTD ≥ tTD(max))

FIGURE 1-2: Push Button Reset and Watchdog Timer Reset Timing Waveforms.

AC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.

Parameters Sym Min Typ Max Units Conditions

PB RST Pulse Width tPB 20 — — ms Note 1

PB RST Falling Edge Low to tPBD 1 4 20 ms
Reset Active
PB RST Rising Edge High to tRST 250 610 1000 ms
Reset Inactive
ST Pulse Width tST 20 — — ns
ST Time-out Period tTD 62.5 150 250 ms TD Pin = 0V
250 600 1000 ms TD Pin = Open
500 1200 2000 ms TD Pin = VCC
Note 1: PB RST must be held low for a minimum of 20 ms to ensure a reset.

DS21370C-page 4 Preliminary © 2005 Microchip Technology Inc.

 TC1232
2.0 TYPICAL PERFORMANCE CURVES
Performance Graphs are not available.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 5

TC1232
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLES

Pin No.
Buffer/
8-pin Pin
16-pin Symbol Driver Function
Type
PDIP, Type
SOIC
SOIC

1 2 PB RST I ST Push-button Reset Input.

Input for a Manual Reset Switch. This input debounces (ignores) pulses
less than 1 ms in duration and is ensured to recognize inputs of 20 ms or
greater.
L = Manual Reset Switch is Active, Force RST/RST pins Active
H = Manual Reset Switch is Inactive. State of RST/RST pins determined by
other system conditions.
2 4 TD I ST Time Delay Input.
The voltage level on this input determines the watchdog timer time-out
period.
TD = 0V → tTD = 150 ms
TD = Open → tTD = 600 ms
TD = VCC → tTD = 1.2 sec
3 6 TOL I ST Tolerance Input.
TOL = GND, Max Voltage Trip Point (VCCTP) = 4.75V (5% tolerance)
TOL = VCC, Max Voltage Trip Point (VCCTP) = 4.5V (10% tolerance)
4 8 GND — P The ground reference for the device.
5 9 RST O Push Reset Output (Active-High)
Pull Goes active (High) if one of these conditions occurs:
1. If VCC falls below the selected reset voltage threshold.
2. If PB RST pin is forced low.
3. If ST pin is not strobed within the minimum selected time-out period.
(see TD pin)
4. During power-up
6 11 RST O Open Reset Output (Active-Low)
Drain Goes active (Low) if one of these conditions occurs:
1. If VCC falls below the selected reset voltage threshold.
2. If PB RST pin is forced low.
3. If ST pin is not strobed within the minimum selected time-out period.
(see TD pin)
4. During power-up
7 13 ST I ST Strobe Input
Input for Watchdog Timer. WDT period determined by state of TD pin
Falling Edge → Resets Watchdog Timer counter (no time-out)
8 15 VCC — P The positive supply (+5V) for the device.
— 1,3,5, NC — — No internal connection.
7,10,1
2,16

DS21370C-page 6 Preliminary © 2005 Microchip Technology Inc.

 TC1232
4.0 OPERATIONAL DESCRIPTION
VCC = 5V
4.1 Power Monitor
+4.5V (5% Trip Point)
The TC1232 provides the function of warning the
processor of a power failure. When VCC is detected as +4.25V (10% Trip Point)
being below the voltage levels defined by the TOL pin,
the TC1232’s comparator outputs the RST and RST
signals to a logic level that warns the system of an out-
of-tolerance power supply. The RST and RST signals
switch at a threshold value of 4.5V if TOL is tied to VCC, tRPD
and at a value of 4.75 volts if TOL is grounded. The
RST
RST and RST signals are held active for a minimum of
250 ms to ensure that the power supply voltage has VOH
been stabilized.
RST VOL
Figure 4-1 shows the VCC fall time.
Figure 4-2 shows the VCC rise time. VCC SLEW RATE = 1.66 mV/µs (0.5V/300 µs)
Figure 4-3 shows the time from when the voltage trip
point is detected to the reset output pin going active. FIGURE 4-3: VCC Detect Reset Output
Delay (Power-Down).
Figure 4-4 shows the time from when the voltage trip
point is exited to the reset output pin going inactive.

4.6V (5% Trip Point)

tF
VCC 4.5V(10% Trip Point)

+4.75V VCC

+4.25V

tRPU
RST
VOH

FIGURE 4-1: Power-Down Slew Rate. RST VOL

tR FIGURE 4-4: VCC Detect Reset Output

Delay (Power-Up).

+4.75V

+4.25V

VCC

FIGURE 4-2: Power-up Slew Rate.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 7

TC1232
4.2 Push Button Reset Input
+5V
The debounced manual reset input (PB RST) manually
forces the reset outputs into their active states.
Figure 4-5 shows a block diagram for using the
TC1232 with a push button switch. VCC TD
Once PB RST has been low for a time tPBD (the push- PB RST ST I/O
button delay time), the reset outputs go active. The
reset outputs remain in their active states for a TC1232 Microprocessor
minimum of 250 ms after PB RST rises above VIH. RST Reset
Figure 4-6 shows a waveform for the push button
switch input and the reset pins output.
A mechanical push button or active logic signal can
drive the PB RST input. The debounced input ignores
GND TOL
input pulses less than 1 ms and recognizes pulses of
20 ms or greater. No external pull-up resistor is
required because the PB RST input has an internal
pull-up to VCC of approximately 100 µA.
FIGURE 4-5: Push Button Reset and
Watchdog Timer.

tPB

PB RST tPBD

VIH
VIL
tRST

RST

RST

The debounced PB RST input ignores input pulses less

than 1 ms and is designed to recognize pulses of
20 ms or greater.

FIGURE 4-6: Push Button Reset –

PB RST Input.

DS21370C-page 8 Preliminary © 2005 Microchip Technology Inc.

 TC1232
4.3 Watchdog Timer Figure 4-8 shows the expected reset output pin wave-
forms depending on the period of the ST pin falling
When the ST input is not stimulated for a preset time edge and the state of the TD input pin.
period, the watchdog timer function forces RST and
RST signals to the active state. The preset time period
is determined by the TD inputs to be 150 ms with TD tTD
ST tST
connected to ground, 600 ms with TD floating or
1200 ms with TD connected to VCC (typ.). The
watchdog timer starts timing-out from the set time
period as soon as RST and RST are inactive. If a high-
to-low transition occurs on the ST input pin prior to
RST (when tTD ≤ tTD (min)) “H”
time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to time-
out, the RST and RST signals are driven to the active RST
(when tTD(min) ≤ tTD ≤ tTD(max))
state for 250 ms, minimum (Figure 4-7).
The software routine that strobes ST is critical. The RST
code must be in a section of software that is executed (when tTD ≥ tTD(max))
frequently enough so the time between toggles is less
than the watchdog time-out period. One common RST (when tTD ≤ tTD(min)) “L”
technique controls the microprocessor I/O line from two
sections of the program. The software might set the I/O RST
line high while operating in the Foreground mode and (when tTD(min) ≤ tTD ≤ tTD(max))
set it low while in the Background or Interrupt modes. If
both modes do not execute correctly, the watchdog RST
timer issues reset pulses. (when tTD ≥ tTD(max))
tTD is the maximum elapsed time between ST high-to-
low transitions (ST is activated by falling edges only), FIGURE 4-8: Strobe Input.
which will keep the watchdog timer from forcing the
reset outputs active for a time of tRST. tTD is a function 4.4 Supply Monitor Noise Sensitivity
of the voltage at the TD pin, as tabulated below: The TC1232 is optimized for fast response to negative-
going changes in VDD. Systems with an inordinate
TABLE 4-1: WATCHDOG TIMER amount of electrical noise on VDD (such as systems
PERIODS using relays) may require a 0.01 µF or 0.1 µF bypass
tTD capacitor to reduce detection sensitivity. This capacitor
should be installed as close to the TC1232 as possible
Condition Min Typ Max to keep the capacitor lead length short.
TD pin = 0V 62.5 ms 150 ms 250 ms
TD pin = Open 250 ms 600 ms 1000 ms
TD pin = VCC 500 ms 1200 ms 2000 ms
Figure 4-7 shows a block diagram for using the
TC1232 with a PICmicro® MCU and the Watchdog
input.

+5V

10 kΩ

3-Terminal +5V
VCC RST RESET
Regulator
(example: 0.1
µF PICmicro®
MCP1700) TC1232
MCU
ST I/O
TD TOL GND

FIGURE 4-7: Watchdog Timer.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 9

TC1232
5.0 PACKAGING INFORMATION
5.1 Package Marking Information

8-Lead PDIP (300 mil) Examples:

XXXXXXXX TC1232 TC1232

e3
XXXXXNNN I/P256 OR CPA^^256
YYWW 0518 0518

8-Lead SOIC (150 mil) Examples:

XXXXXXXX TC1232 TC1232E

XXXXYYWW COA0518 e3
OA^^0518
NNN 256
OR 256

16-Lead SOIC (150 mil) Examples:

XXXXXXXXXXXXX TC1232COE e3
TC1232COE^^
XXXXXXXXXXXXX XXXXXXXXXX XXXXXXXXXX
YYWWNNN 0518256
OR 0518256

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

DS21370C-page 10 Preliminary © 2005 Microchip Technology Inc.

 TC1232
8-Lead Plastic Dual In-line (PA) – 300 mil (PDIP)

E1

n 1

A A2

L
c
A1

β B1
p
eB B

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 8 8
Pitch p .100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c .008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α 5 10 15 5 10 15
Mold Draft Angle Bottom β 5 10 15 5 10 15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 11

TC1232
8-Lead Plastic Small Outline (OA) – Narrow, 150 mil (SOIC)

E1

D
2

B n 1

h α
45°

c
A A2

φ
β L A1

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 8 8
Pitch p .050 1.27
Overall Height A .053 .061 .069 1.35 1.55 1.75
Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55
Standoff § A1 .004 .007 .010 0.10 0.18 0.25
Overall Width E .228 .237 .244 5.79 6.02 6.20
Molded Package Width E1 .146 .154 .157 3.71 3.91 3.99
Overall Length D .189 .193 .197 4.80 4.90 5.00
Chamfer Distance h .010 .015 .020 0.25 0.38 0.51
Foot Length L .019 .025 .030 0.48 0.62 0.76
Foot Angle φ 0 4 8 0 4 8
Lead Thickness c .008 .009 .010 0.20 0.23 0.25
Lead Width B .013 .017 .020 0.33 0.42 0.51
Mold Draft Angle Top α 0 12 15 0 12 15
Mold Draft Angle Bottom β 0 12 15 0 12 15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057

DS21370C-page 12 Preliminary © 2005 Microchip Technology Inc.

 TC1232
16-Lead Plastic Small Outline (OE) – Wide, 300 mil (SOIC)

E
p
E1

2
n 1
B

h
α

45°

c
A A2

φ
β L A1

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 16 16
Pitch p .050 1.27
Overall Height A .093 .099 .104 2.36 2.50 2.64
Molded Package Thickness A2 .088 .091 .094 2.24 2.31 2.39
Standoff § A1 .004 .008 .012 0.10 0.20 0.30
Overall Width E .394 .407 .420 10.01 10.34 10.67
Molded Package Width E1 .291 .295 .299 7.39 7.49 7.59
Overall Length D .398 .406 .413 10.10 10.30 10.49
Chamfer Distance h .010 .020 .029 0.25 0.50 0.74
Foot Length L .016 .033 .050 0.41 0.84 1.27
Foot Angle φ 0 4 8 0 4 8
Lead Thickness c .009 .011 .013 0.23 0.28 0.33
Lead Width B .014 .017 .020 0.36 0.42 0.51
Mold Draft Angle Top α 0 12 15 0 12 15
Mold Draft Angle Bottom β 0 12 15 0 12 15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-102

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 13

TC1232
NOTES:

DS21370C-page 14 Preliminary © 2005 Microchip Technology Inc.

 TC1232
APPENDIX A: REVISION HISTORY

Revision C (June 2005)

The following is the list of modifications:
1. Since no data is given in Section 2.0 “Typical
Performance Curves”, “Preliminary” was
added to the bottom of this document.
2. Corrected Operating Voltage in the Electrical
Specifications
3. General Data Sheet Enhancements
4. Added Revision History Appendix Section

Revision B (March 2003)

• Not logged

Revision A (March 2002)

• Original Release of this Document.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 15

TC1232
NOTES:

DS21370C-page 16 Preliminary © 2005 Microchip Technology Inc.

 TC1232
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X /XX Examples:

a) TC1232COA: 0°C to +70°C, 8L-SOIC
Device Temperature Package
b) TC1232COA713: 0°C to +70°C, 8L-SOIC,
Range
Tape and Reel
c) TC1232COE: 0°C to +70°C, 16L-SOIC
Device: TC1232: Microprocessor Monitor d) TC1232COE713: 0°C to +70°C, 16L-SOIC
Tape and Reel
e) TC1232CPA: 0°C to +70°C, 8L-PDIP
Temperature Range: C = 0°C to +70°C
E = -40°C to +85°C f) TC1232EOA: -40°C to +85°C,
8L-SOIC
g) TC1232EOA713: -40°C to +85°C,
Package: PA = Plastic DIP (300 mil Body), 8-lead 8L-SOIC,
OA = Plastic SOIC, (150 mil Body), 8-lead
Tape and Reel
OA713 = Plastic SOIC, (150 mil Body), 8-lead
Tape and Reel h) TC1232EOE: -40°C to +85°C,
OE = Plastic SOIC (300 mil Body), 16-lead 16L-SOIC
OE713 = Plastic SOIC (300 mil Body), 16-lead i) TC1232EOE713: -40°C to +85°C,
Tape and Reel
16L-SOIC,
Tape and Reel
j) TC1232EPA: -40°C to +85°C,
8L-PDIP

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 17

TC1232
NOTES:

DS21370C-page 18 Preliminary © 2005 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
The Microchip name and logo, the Microchip logo, Accuron,
and may be superseded by updates. It is your responsibility to
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro,
ensure that your application meets with your specifications.
PICSTART, PRO MATE, PowerSmart, rfPIC, and
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
SmartShunt are registered trademarks of Microchip
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
Technology Incorporated in the U.S.A. and other countries.
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, PICMASTER, SEEVAL, SmartSensor and The Embedded
MERCHANTABILITY OR FITNESS FOR PURPOSE. Control Solutions Company are registered trademarks of
Microchip disclaims all liability arising from this information and Microchip Technology Incorporated in the U.S.A.
its use. Use of Microchip’s products as critical components in Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
life support systems is not authorized except with express dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
written approval by Microchip. No licenses are conveyed, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
implicitly or otherwise, under any Microchip intellectual property Programming, ICSP, ICEPIC, Linear Active Thermistor,
rights. MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,
Smart Serial, SmartTel, Total Endurance and WiperLock are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

© 2005 Microchip Technology Inc. Preliminary DS21370C-page 19

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Canada
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Fax: 905-673-6509

04/20/05

DS21370C-page 20 Preliminary © 2005 Microchip Technology Inc.