TC1232 Microprocessor Monitor: Features General Description
TC1232 Microprocessor Monitor: Features General Description
1
TC1232
MICROPROCESSOR MONITOR
FEATURES GENERAL DESCRIPTION
2
■ Precision Voltage The TC1232 is a fully-integrated processor supervisor.
Monitor ....................... Adjustable +4.5V or +4.75V It provides three important functions to safeguard processor
■ Reset Pulse Width ............................. 250msec Min sanity: precision power on/off reset control, watchdog timer
■ No External Components and external reset override.
■ Adjustable Watchdog On power-up, the TC1232 holds the processor in the
■
Timer ........................ 150msec, 600msec or 1.2sec
Debounced Manual Reset Input for External
Override
reset state for a minimum of 250msec after VCC is within
tolerance to ensure a stable system start-up.
Microprocessor sanity is monitored by the on-board
3
watchdog circuit. The microprocessor must provide a peri-
APPLICATIONS odic low-going signal on the ST input. Should the processor
fail to supply this signal within the selected time-out period
■ Computers (150msec, 600msec or 1200msec), an out-of-control pro-
■ Controllers cessor is indicated and the TC1232 issues a processor reset
■
■
■
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
as a result.
The outputs of the TC1232 are immediately driven
active when the PB input is brought low by an external push-
4
button switch or other electronic signal. When connected to
ORDERING INFORMATION a push-button switch, the TC1232 provides contact
debounce.
Part No. Package Temp. Range
The TC1232 is packaged in a space-saving 8-pin plastic
TC1232COA 8-Pin SOIC 0°C to +70°C DIP or SOIC package and requires no external components.
TC1232COE
TC1232CPA
TC1232EOA
16-Pin SOIC (Wide)
8-Pin PDIP
8-Pin SOIC
0°C to +70°C
0°C to +70°C
– 40°C to +85°C
5
TC1232EOE 16-Pin SOIC (Wide) – 40°C to +85°C
TC1232EPA 8-Pin PDIP – 40°C to +85°C
VCC
5%/10% +
RESET
RST
6
TOLERANCE
TOL SELECT – GENERATOR
+
RST
REF
PB RST
DEBOUNCE
TC1232
7
TD WATCHDOG ST
TIMEBASE WATCHDOG
SELECT TIMER
GND
8
TC1232-4 11/6/96
TELCOM SEMICONDUCTOR, INC. 5-19
MICROPROCESSOR MONITOR
TC1232
ABSOLUTE MAXIMUM RATINGS* *Stresses beyond those listed under "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only, and
Voltage on Any Pin (With Respect to GND) – 0.3V to +5.8V functional operation of the device at these or any other conditions beyond
Operating Temperature Range: those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended
TC1232C .......................................... 0°C to +70°C
periods may affect device reliability.
TC1232E ..................................... – 40°C to + 85°C
Storage Temperature Range ................ – 65°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
DC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +4.5V to 5.5V, unless otherwise specified.
Symbol Parameter Test Conditions Min Typ Max Unit
VCC Supply Voltage 4.5 5.0 5.5 V
VIH ST and PB RST 2.0 — VCC +0.3 V
Input High Level Note 1
VIL ST and PB RST – 0.3 — +0.8 V
Input Low Level
IL Input Leakage ST, TOL – 1.0 — +1.0 µA
IOH Output Current RST VOH = 2.4V – 1.0 –12 — mA
IOL Current RST, RST VOL = 0.4V 2.0 10 — mA
ICC Operating Current Note 2 — 50 200 µA
VCCTP VCC 5% Trip Point (Note 3) TOL = GND 4.50 4.62 4.74 V
VCCTP VCC 10% Trip Point (Note 3) TOL = VCC 4.25 4.37 4.49 V
AC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise specified.
Symbol Parameters Test Conditions Min Typ Max Units
tPB PB RST (Note 5) Figure 3 20 — — msec
tPBD PB RST Delay Figure 3 1 4 20 msec
tRST Reset Active Time 250 610 1000 msec
tST ST Pulse Width Figure 4 75 — — nsec
tTD ST Time-out Period Figure 4
TD Pin = 0V 62.5 150 250 msec
TD Pin = Open 250 600 1000 msec
TD Pin = VCC 500 1200 2000 msec
tF VCC Fall Time (Note 4) Figure 5 10 — — µsec
AC ELECTRICAL CHARACTERISTICS: (Cont.) TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise
Symbol Parameter
specified.
PIN CONFIGURATIONS
PB RST 1
8-Pin PDIP
8 VCC PB RST 1
8-Pin SOIC
8 VCC NC 1
16-Pin SOIC Wide
16 NC
4
ST PB RST 2 15 VCC
TD 7 TD 2 7
2 ST
NC 3 14 NC
TOL TOL 3 TC1232COA 6 RST
3 TC1232CPA 6 TD 4 13 ST
RST TC1232EOA
GND TC1232EPA GND 4 5 RST
4 5 NC 5 TC1232COE 12 NC
RST
TC1232EOE
TOL 6 11 RST
NC
GND
7
8
10 NC
9 RST
5
PIN DESCRIPTION
Pin No. Pin No. Pin No.
(8-Pin PDIP) (8-Pin SOIC) (16-Pin SOIC) Symbol Description
1 1 2 PB RST Push-button Reset Input. A debounced active-low input that ignores
pulses less than 1msec in duration and is guaranteed to recognize inputs
6
of 20msec or greater.
2 2 4 TD Time Delay Set. The watchdog time-out select input (tTD = 150msec for
TD = 0V, tTD = 600msec for TD = open, tTD = 1.2sec for TD = VCC).
3 3 6 TOL Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10%
tolerance.
4 4 8 GND Ground.
5 5 9 RST Reset Output (Active High) - goes active:
1. If VCC falls below the selected reset voltage threshold
2. If PB RST is forced low
7
3. If ST is not strobed within the minimum time-out period
4. During power-up
6 6 11 RST Reset Output (Active Low, Open Drain) - see RST.
7 7 13 ST Strobe Input. Input for watchdog timer.
8 8 15 VCC The +5V Power-Supply Input.
1, 3, 5, 7, 10,
12, 14, 16
NC No Internal Connection.
8
TELCOM SEMICONDUCTOR, INC. 5-21
MICROPROCESSOR MONITOR
TC1232
DETAILED DESCRIPTION mode and set it low while in the background or interrupt
mode. If both modes do not execute correctly, the watchdog
Power Monitor timer issues reset pulses.
The TC1232 detects out-of-tolerance power supply
conditions and warns a processor-based system of an
Supply Monitor Noise Sensitivity
impending power failure. When VCC is detected as below the The TC1232 is optimized for fast response to negative-
preset level defined by TOL, the VCC comparator outputs the going changes in VDD. Systems with an inordinate amount
signals RST and RST. If TOL is connected to ground, the of electrical noise on VDD (such as systems using relays),
RST and RST signals become active as VCC falls below 4.75 may require a 0.01µF or 0.1µF bypass capacitor to reduce
volts. If TOL is connected to VCC, the RST and RST become detection sensitivity. This capacitor should be installed as
active as VCC falls below 4.5 volts. Because the processing close to the TC1232 as possible to keep the capacitor lead
is stopped at the last possible moment of valid VCC, the RST length short.
and RST are excellent control signals for a µP. The reset
outputs will remain in their active states until VCC has been
continuously in-tolerance for a minimum of 250msec allow- +5V
ing the power supply and µP to stabilize before RST is
released.
VCC TD
Push-button Reset Input
PB RST ST I/O
The debounced manual reset input (PB RST) manually MICROPROCESSOR
forces the reset outputs into their active states. Once
PB RST has been low for a time tPBD, the push-button delay RST RESET
time, the reset outputs go active. The reset outputs remain
in their active states for a minimum of 250msec after PB RST
TC1232
rises above VIH (Figure 3).
A mechanical push-button or active logic signal can GND TOL
drive the PB RST input. The debounced input ignores input
pulses less than 1msec and is guaranteed to recognize
pulses of 20msec or greater. No external pull-up resistor is
required because the PB RST input has an internal pull-up Figure 1. Push-button Reset
to VCC of approximately 100µA.
Watchdog Timer
+5V
When the ST input is not stimulated for a preset time
period, the watchdog timer function forces RST and RST 10KΩ
signals to the active state. The preset time period is deter-
mined by the TD inputs to be 150msec with TD connected
to ground, 600msec with TD floating, or 1200msec with TD 3 -TERMINAL +5V
VCC RST RESET
REGULATOR
connected to VCC, typical. The watchdog timer starts timing
out from the set time period as soon as RST and RST are
0.1 MICROPROCESSOR
inactive. If a high-to-low transition occurs on the ST input pin µF
TC1232
prior to time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to time-out,
I/O
then the RST and RST signals are driven to the active state ST
tPB
2
tF
PB RST tPBD
VIH
VCC
VIL
3
tRST
+4.75V
RST
+4.25V
RST
PUSH-BUTTON RESET
tST
5
ST
tR
+4.75V
tTD
6
+4.25V
NOTE: tTD IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW
TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH
WILL KEEP THE WATCHDOG TIMER FROM FORCING THE RESET
OUTPUTS ACTIVE FOR A TIME OF tRST. tTD IS A FUNCTION OF THE
VOLTAGE AT THE TD PIN, AS TABULATED BELOW.
VCC
tTD
CONDITON MIN TYP MAX
TD PIN = 0V
TD PIN = OPEN
TD PIN = VCC
62.5msec
250msec
500msec
150msec
600msec
1200msec
250msec
1000msec
2000msec
7
Figure 4. Strobe Input Figure 6. Power-Up Slew Rate
8
TELCOM SEMICONDUCTOR, INC. 5-23
MICROPROCESSOR MONITOR
TC1232
VCC = 5V
VCC
tRPD
tRPU
RST
RST
VOH
VOH
RST VOL
RST VOL
VCC SLEW RATE = 1.66mV/µsec (0.5V/300µsec)
Figure 7. VCC Detect Reset Output Delay (Power-Down) Figure 8. VCC Detect Reset Output Delay (Power-Up)