AOZ8S316UD4-03

4-Channel Ultra-Low Capacitance TVS Diode Array

General Description Features

The AOZ8S316UD4-03 is a transient voltage suppressor  IEC 61000-4-2 (ESD):
array designed to protect high speed data lines such as – Air discharge: ±15 kV
HDMI 1.4/2.0, USB 3.0/3.1, LVDS, and V-by-one from – Contact discharge: ±15 kV
damaging ESD events.  IEC 61000-4-5 (Lightning, 8/20 μs): 5 A

This device incorporates a numbers of surge rated, low  Human Body Model (HBM): ±8 kV
capacitance steering diodes and a TVS in a single  Protects four I/O lines
package. During transient conditions, the steering diodes  Low capacitance between I/O to GND: 0.28 pF
direct the transient to either the positive side of the power
 Low clamping voltage
supply line or to ground.
 Low operating voltage: 3.3 V
The AOZ8S316UD4-03 provides a typical line-to-line
capacitance of 0.15 pF and low insertion loss providing Applications
greater signal integrity making it ideally suited for HDMI  HDMI 1.4/2.0, USB 3.0/3.1, Thunderbolt, V-by-One
1.4/2.0 or USB 3.0/3.1 applications, such as Digital TVs,
 Monitors and flat panel displays
DVD players, computing, set-top boxes and MDDI
applications in mobile computing devices.  Set-top box
 Video graphics cards
The AOZ8S316UD4-03 comes in a RoHS compliant and
 Notebook computers
Halogen Free 2.5 mm x 1.0 mm x 0.55 mm DFN-10
package and is rated for -40°C to +125°C junction
temperature range.

Typical Applications
AOZ8S316UD4-03 AOZ8S316UD4-03

TX2+ RX2+
TX2- RX2-

TX1+ RX1+
TX1- RX1-
HDMI 1.4/2.0 HDMI 1.4/2.0
Transmitter Receiver
TX0+ RX0+
TX0- RX0-

CLK+ CLK+
CLK- CLK-
Connector Connector

AOZ8S316UD4-03 AOZ8S316UD4-03

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Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ8S316UD4-03 -40°C to +125°C 2.5 mm x 1.0 mm DFN-10 Green Product

AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.

Pin Configuration

CH1 1 10 NC

CH2 2 9 NC

VN 3 8 VN

CH3 4 7 NC

CH4 5 6 NC

DFN-10
(Top View)

Absolute Maximum Ratings

Exceeding the Absolute Maximum ratings may damage the device.

Parameter Rating
Storage Temperature (TS) -65 °C to +150 °C
(1)
ESD Rating per IEC 61000-4-2, contact ±15 kV
(1)
ESD Rating per IEC 61000-4-2, air ±15 kV
(2)
ESD Rating per Human Body Model ±8 kV
Notes:
1. IEC 61000-4-2 discharge with CDischarge = 150pF, RDischarge = 330 Ω.
2. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100 pF, RDischarge = 1.5 kΩ.

Maximum Operating Ratings

Parameter Rating
Junction Temperature (TJ) -40 °C to +125 °C

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Electrical Characteristics
TA = 25°C unless otherwise specified. Any I/O Pin-to-Ground.

Positive

ITLP2

ITLP1

IHold

IT
VF2 VF1 IR
VHold VBR
VTLP1 VTLP2 VRWM

IF1
Unidirectional
TVS

IF2

Symbol Parameter Conditions Min. Typ. Max Units

VRWM Reverse Working Voltage 3.3 V
VBR Reverse Breakdown Voltage IT = 100 µA 5 V
IR Reverse Leakage Current Max. VRWM 1 50 nA
ITLP = 1 A 1.3 2 V
Clamping Voltage(3)(4) ITLP = -1 A -1.3 -2 V
VCL (100 ns Transmission Line
Pulse, I/O Pin to GND) ITLP = 16 A 5.5 7 V
ITLP = -16 A -5 -6 V
RDNY Dynamic Resistance(3) ITLP = 8A to 16 A 0.3 Ω
VPIN 3,8 = 0 V, VI/O = 1.65 V, f = 1 MHz 0.28 0.34 pF
CJ Junction Capacitance VPIN 3,8 = 0 V, VI/O = 1.65 V, f = 1 MHz,
0.15 pF
I/O Pin-to-I/O Pin

Notes:
3. These specifications are guaranteed by design and characterization.
4. Measurements performed using a 100ns Transmission Line Pulse (TLP) system.

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Typical Characteristics
Typical Variations of CJ vs. Input Voltage IEC61000-4-5 Surge 8/20µs
0.6 6

0.5 5

Clamping Voltage (V)

Capacitance (pF)

0.4 4

0.3 3

0.2 2
I/O to GND

0.1 1 GND to I/O

0 0
0 1 2 3 4 0 1 2 3 4 5 6
Input Voltage (V) Peak Pulse Current, IPP (A)

Positive Transmission Line Pulse Negative Transmission Line Pulse

(TP=100ns, TR= 0.2ns) (TP=100ns, TR= 0.2ns)
32 -5

28
-10
24
TLP Current (A)

TLP Current (A)

20 -15

16
-20
12

8
-25
4

0 -30
0 5 10 15 -15 -10 -5 0
TLP Voltage (V) TLP Voltage (V)

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High Speed PCB Layout Guidelines diodes on a single ground PCB can be improved by
minimizing the impedance with relatively short and wide
Printed circuit board layout is the key to achieving the
ground traces. The PCB layout and IC package parasitic
highest level of surge immunity on power and data lines.
inductances can cause significant overshoot to the TVS’s
The location of the protection devices on the PCB is the
clamping voltage. The inductance of the PCB can be
simplest and most important design rule to follow. The
reduced by using short trace lengths and multiple layers
AOZ8S316UD4-03 devices should be located as close
with separate ground and power planes. One effective
as possible to the noise source. The AOZ8S316UD4-03
method to minimize loop problems is to incorporate a
device should be placed on all data and power lines that
ground plane in the PCB design.
enter or exit the PCB at the I/O connector. In most
systems, surge pulses occur on data and power lines that The AOZ8S316UD4-03 ultra-low capacitance TVS is
enter the PCB through the I/O connector. Placing the designed to protect four high speed data transmission
AOZ8S316UD4-03 devices as close as possible to the lines from transient over-voltages by clamping them to a
noise source ensures that a surge voltage will be fixed reference. The low inductance and construction
clamped before the pulse can be coupled into adjacent minimizes voltage overshoot during high current surges.
PCB traces. When the voltage on the protected line exceeds the
reference voltage the internal steering diodes are forward
In addition, the PCB should use the shortest possible
biased, conducting the transient current away from the
traces. A short trace length equates to low impedance,
sensitive circuitry. The AOZ8S316UD4-03 is designed for
which ensures that the surge energy will be dissipated by
ease of PCB layout by allowing the traces to run
the AOZ8S316UD4-03 device. Long signal traces will act
underneath the device. The pinout of the
as antennas to receive energy from fields that are
AOZ8S316UD4-03 is designed to simply drop onto the
produced by the ESD pulse. By keeping line lengths as
IO lines of a High Definition Multimedia Interface (HDMI
short as possible, the efficiency of the line to act as an
1.4/2.0) or USB 3.0/3.1 design without having to divert
antenna for ESD related fields is reduced. Minimize
the signal lines that may add more parasitic inductance.
interconnecting line lengths by placing devices with the
Pins 1, 2, 4 and 5 are connected to the internal TVS
most interconnect as close together as possible. The
devices and pins 6, 7, 9 and 10 are no connects. The no
protection circuits should shunt the surge voltage to
connects was done so the package can be securely
either the reference or chassis ground. Shunting the
soldered onto the PCB surface.
surge voltage directly to the IC’s signal ground can cause
ground bounce. The clamping performance of TVS

Clock Clock SSRX+ SSRX+

Data0 Data0 SSRX– SSRX–

Ground Ground Ground Ground

Data1 Data1 SSTX+ SSTX+

Data2 Data2 SSTX– SSTX–

Figure 3. Flow Through Layout for HDMI 1.4/2.0 Figure 4. Flow Through Layout for USB 3.0/3.1

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LEGAL DISCLAIMER

Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.

LIFE SUPPORT POLICY

ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

As used herein:

1. Life support devices or systems are devices or 2. A critical component in any component of a life
systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can
the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in a significant injury of
the user.

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