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COE305exam17 18

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COE305exam17 18

Uploaded by

Adigun Samson
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© © All Rights Reserved
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COLLEGE OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING


COE 305 (INTRODUCTION TO COMPUTER ENGINEERING) EXAMINATION
2017/2018 SESSION
INSTRUCTION: ANSWER QUESTION 1 AND THREE OTHER QUESTIONS TIME ALLOWED: 2HR: 45 MINS
Question 1
(a) Explain the following

(i) Computer codes


(ii) Base or radix of a number system
(iii) Combinational circuit
(iv) A bi-stable device

(b) (i) Negate ( A . B+ A . B )


(ii) Negate ( x . y + x + y)

(c) Write decimal number 487 in the indicated code forms


(i) 5421
(ii) 2421
(iii) 742 1
(iv) 6423
(d) Design a logic circuit to provide an even parity bit for the excess-3 code.
(e) Use a Karnaugh map to help simplify the Boolean expression.
D = ABC + A BC + ABC + A BC + A BC

Question 2
(a) Consider the function
f(w, x, v, z) = ∈ ¿15).

Find the unique minimal expression for the function.


(b) Find the simplest sum of product expression for the function given by the Karnaugh map of Fig1
WX
YZ
Fig 1

1 1
1 1
1
Question 3

(a) Design a circuit generating 8421 BCD 9’s complement

BCD 9’s
BCD input complement BCD 9’s complement output
Generator

(b) Give the truth table and the excitation table for the following flip flops
(i) R-S flip flop
(ii) J-K flip flop
Question 4
(a) Explain the following
(i) Race Condition
(ii) Clock
(iii) Preset
(iv) Clear signals
(b) Construct the basic R-S latch circuit from NOR and NAND gates and comment on their
operations.

Question 5

(a) Design a four bit shift register using a D type flip-flop


(b) Draw the state diagram for a serial adder with two states A and B
A: state of adder at ti. if a carry 0 is generated at tt-1
B: state of adder at ti if a carry 1 is generated at tt-1

t5 t4 t3 t2 t1

0 1 1 0 0 = X1

0 1 1 1 0 = X2

1 1 0 1 0 = Z

Inputs are X1 X2, Output is Z, At t1 X1 X2 = 00 and Z = 0

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