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Astable Multivibrator

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116 views4 pages

Astable Multivibrator

Uploaded by

sayan.pal.23
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 4

ASTABLE MULTIVIBRATOR

An astable multivibrator, often called a free-running multi vibrator, is a rectangular wave


generating circuit. An Astable Multivibrator can be designed by adding two resistors a
capacitor (RA, RB and C in circuit diagram) to the 555 Timer IC. These two resistors and the
capacitor (values) are selected appropriately so as to obtain the desired ‘ON’ and ‘OFF’
timings at the output terminal (pin 3). So basically, the ON and OFF time at the output (i.e.
the ‘HIGH’ and ‘LOW’ state at the output terminal) is dependent on the values chosen for
RA, RB and C. The capacitor C1 (0.01uF) is connected to pin number 5 (Control Voltage
Terminal) in all 555 IC based circuits in which that particular pin (pin 5 – control voltage
terminal) is not used. This capacitor is used to avoid noise problems that could arise in the
circuit if that pin is left open. The details of the astable multivibrator circuit are given in Fig.
1. Pin 1 is grounded; Pins 4 and 8 are shorted and then tied to supply +Vcc, output(vout) is
taken from pin 3; pin 2 and 6 are shorted and then connected to ground through a capacitor C,
pin 7 is connected to supply + Vcc through a resistor RA; and between pins 6 and 7 a resistor
RB is connected.

Fig.1 : Astable Timer using 555timer

In Fig. 2 (a), when Q is low or output vout is high, the discharging transistor is cut off and the
capacitor C begins charging toward Vcc through resistances RA and RB. Because of this, the
charging 'time constant is (RA + RB) C. As the capacitor charges, the threshold voltage
increases. Eventually, the threshold voltage exceeds + 2/3 VCC, the comparator 1 has a high
output and triggers the flip-flop so that its Q is high and the timer output is low. With Q high,
the discharge transistor saturates and pin 7 grounds so that the capacitor e discharges through
resistance RB with a discharging time constant RB C. With the discharging of capacitor,
trigger voltage at inverting input of comparator 2 decreases. When it drops below 1/3 VCC,
the output of comparator 2 goes high and this resets the flipflop So that Q is low and the
timer output is high. This proves the auto-transition in output from low to high and then to

Page 1 of 4
low as illustrated in Fig. 2(b). Thus the cycle repeats.

Fig. 2: Astable operation

Page 2 of 4
The time during which the capacitor C charges from 1/3 Vcc to 2/3 Vcc is equal to the time
the output is high and is given as
tc or THIGH = 0.693 (RA + RB) C, which is proved below.
Voltage across the capacitor at any instant during charging period is given as,
𝑡
𝑣𝑐 = 𝑉𝐶𝐶 (1 − 𝑒 −𝑅𝐶 )
The time taken by the capacitor to charge from 0 to +1/3Vcc is
𝑡
1 𝑉 = 𝑉 (1 − 𝑒 −𝑅𝐶1 )
3 𝐶𝐶 𝐶𝐶
⇒ 𝑡1 = 0.405𝑅𝐶
The time taken by the capacitor to charge from 0 to +2/3Vcc is
𝑡
2 𝑉 = 𝑉 (1 − 𝑒 −𝑅𝐶2 )
3 𝐶𝐶 𝐶𝐶
⇒ 𝑡2 = 1.0986𝑅𝐶
So the time taken by the capacitor to charge from +1/3Vcc to +2/3Vcc is
𝑡𝑐 = 𝑡2 − 𝑡1 = 1.0986𝑅𝐶 − 0.405𝑅𝐶 = 0.693𝑅𝐶
So for the given circuit
THIGH = 𝑡𝑐 = 0.693 (𝑅𝐴 + 𝑅𝐵 ) 𝐶
Where RA and RB are in ohms and C is in farads.
The time during which the, capacitor discharges from +2/3Vcc to +1/3Vcc is equal to the
time the output is low and is given as
td or TLOW = 0.693 RBC where RB is in ohms and C is in farads The above equation is
worked out as follows:
Voltage across the capacitor at any instant during discharging period is given as
𝑡
−
𝑣𝑐 = 2 3 𝑉𝐶𝐶 𝑒 𝑅 𝐵 𝐶
Substituting Vc = 1/3 Vcc and t = td in above equation we have
𝑡
1 2 − 𝑑
3 𝑉𝐶𝐶 = 3 𝑉𝐶𝐶 𝑒
𝑅𝐵 𝐶

⇒ 𝑡𝑑 = 0.693𝑅𝐵 𝐶 = TLOW
Overall period of oscillations,
T = THIGH + TLOW
= 0.693(RA + 2 RB)C
The frequency of oscillations being the reciprocal of the overall period of oscillations T is
given as
1 1 1.44
𝑓= = =
𝑇 0.693 (𝑅𝐴 + 2 𝑅𝐵 ) 𝐶 (𝑅𝐴 + 2 𝑅𝐵 ) 𝐶
Equation indicates that the frequency of oscillation f is independent of the collector supply
voltage +Vcc.
Often the term duty cycle is used in conjunction with the astable multivibrator. The duty
cycle, the ratio of the time t c during which the output is high to the total time period T is
given as
𝑡𝑐 𝑅𝐴 + 𝑅𝐵
%𝐷𝑢𝑡𝑦 𝑐𝑦𝑐𝑙𝑒, 𝐷 = × 100 = × 100
𝑇 𝑅𝐴 + 2 𝑅𝐵
From the above equation it is obvious that square wave (50% duty cycle) output cannot be
obtained unless RA is made zero. However, there is a danger in shorting resistance RA to zero.

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With RA = 0 Ω, terminal 7 is directly connected to + Vcc. During the discharging of
capacitor through RB and transistor, an extra current will be supplied to the transistor from
Vcc through a short between pin 7 and + Vcc. It may damage the transistor and hence the
timer.
There is a possibility to construct a symmetrical square wave can be obtained if a diode is
connected across resistor RB as illustrated in dotted lines in figure below. The capacitor C
charges through RA and diode D1 to approximately + 2/3VCC and discharges through resistor
RB and terminal 7 (transistor) until the capacitor voltage drops to 1/3 VCC. Then the cycle is
repeated. To obtain a square wave output, RA must be a combination of a fixed resistor R and
a pot, so that the pot can be adjusted to give the exact square wave.

Page 4 of 4

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