IFX007T Rev1.0 2018-02-21
IFX007T Rev1.0 2018-02-21
Integrated Driver
IFX007T
Industrial & Multi Purpose NovalithIC™
1 Overview
Quality Requirement Category: Industrial
Features
• Path resistance of max. 12.8 mΩ @ 25°C (typ. 10.0 mΩ @ 25°C)
High side: max. 6.5 mΩ @ 25°C (typ. 5.3 mΩ @ 25°C)
Low side: max. 6.3 mΩ @ 25°C (typ. 4.7 mΩ @ 25°C)
• Enhanced switching speed for reduced switching losses
• Capable for high PWM frequency combined with active freewheeling
• Switched mode current limitation for reduced power dissipation in overcurrent
• Current limitation level of 55 A min.
• Status flag diagnosis with current sense capability
• Overtemperature shutdown with latch behavior
• Undervoltage shutdown
• Driver circuit with logic level inputs
• Adjustable slew rates for optimized EMI
• Operation up to 40 V
• Green Product (RoHS compliant)
• JESD47I Qualified
Description
The IFX007T is an integrated high current half bridge for motor drive applications. It is part of the Industrial &
Multi Purpose NovalithIC™ family containing one p-channel high-side MOSFET and one n-channel low-side
MOSFET with an integrated driver IC in one package. Due to the p-channel high-side switch the need for a
charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the
integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead
time generation and protection against overtemperature, undervoltage, overcurrent and short circuit.
The IFX007T provides a cost optimized solution for protected high current PWM motor drives with very low
board space consumption.
Table of Contents
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Block description and characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 Supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 Power stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2.1 Power stages - static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2.2 Switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.2.3 Power stages - dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3.1 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3.2 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.3.3 Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.3.4 Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.5 Electrical characteristics - protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4 Control and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.1 Input circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.2 Dead time generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.3 Adjustable slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.4 Status flag diagnosis with current sense capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.5 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4.6 Electrical characteristics - control and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.1 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.3 PWM control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2 Block diagram
The IFX007T is part of the Industrial & Multi Purpose NovalithIC™ family containing three separate chips in one
package: One p-channel high-side MOSFET and one n-channel low-side MOSFET together with a driver IC,
forming an integrated high current half-bridge. All three chips are mounted on one common lead frame, using
the chip-on chip and chip-by-chip technology. The power switches utilize vertical MOS technologies to ensure
optimum on state resistance. Due to the p-channel high-side switch the need for a charge pump is eliminated
thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features
logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection
against overtemperature, undervoltage, overcurrent and short circuit. The IFX007T can be combined with
other IFX007Ts to form a H-bridge or a3-phase drive configuration.
VS
Undervolt. Current
detection Sense
Current
Limitation
HS
Overtemp .
detection Gate Driver
IS HS
OUT
Digital Logic LS off HS off
IN
Gate Driver
LS
INH
Current
Slewrate Limitation
SR
Adjustment LS
GND
2.2 Terms
Following figure shows the terms used in this data sheet.
VS I VS , -I D (H S) V D S(H S)
IIN VS
IN
V IN
I IN H
INH I OU T , I L
VIN H OUT
ISR VD S(L S) V OU T
SR
V SR
I IS
IS
GND
VIS
I GN D , I D (L S)
Figure 2 Terms
3 Pin configuration
1234 5 67
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as “outside” normal operating range.
Protection functions are not designed for continuous repetitive operation.
Note: Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics
table.
26
24
VS = 36 V
22
20
18
16
IVS(off) [µA]
14
12
10
VS = 24 V
8
6
VS = 8 V
4
VS = 18 V
2
0
-40 -20 0 20 40 60 80 100 120 140 160
T [°C]
9 9
8 Tj = 150°C 8
Tj = 150°C
7 7
6 6
RON(HS) [mΩ]
RON(LS) [mΩ]
Tj = 25°C
Tj = 25°C
5 5
4 4
Tj = -40°C
Tj = -40°C
3 3
2 2
1 1
0 0
8 12 16 20 24 28 32 36 40 8 12 16 20 24 28 32 36 40
VS [V] VS [V]
9 9
8 8
7 7
typ. 98 % typ. 98 %
typ.
6 6
RON(LS) [mΩ]
RON(HS) [mΩ]
typ.
5 5
4 4
3 3
2 2
1 1
0 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [°C] Tj [°C]
IN
t
td r(H S) tr(H S) td f(H S) tf(H S)
VOUT
80% 80%
ΔVOUT ΔVOUT
20% 20%
IN
t
td f(L S) tf(L S) t d r(L S) tr(L S)
VOUT
80%
80%
ΔVOUT ΔV OUT
20% 20%
Due to the timing differences for the rising and the falling edge there will be a slight difference between the
length of the input pulse and the length of the output pulse. It can be calculated using the following formulas:
• ΔtHS = (tdr(HS) + 0.5 tr(HS)) - (tdf(HS) + 0.5 tf(HS))
• ΔtLS = (tdf(LS) + 0.5 tf(LS)) - (tdr(LS) + 0.5 tr(LS)).
IL
tCLS
ICLx
ICLx 0
ICLL [A]
78 78
Tj = 150°C
77 77
76 76
75 75
Tj = 150°C
74 74
73 73
72 72
71 71
70 70
0 500 1000 1500 2000 0 500 1000 1500 2000
dIL/dt [A/ms] dIL/dt [A/ms]
Figure 10 Typical current limitation detection level vs. current slew rate dIL/dt
ICLL [A]
78 78 Tj = 25°C
Tj = 25°C
77 77
76 76
75 75
Tj = 150°C
74 74
Tj = 150°C
73 73
72 72
71 71
70 70
8 12 16 20 24 28 32 36 40 8 12 16 20 24 28 32 36 40
VS [V] VS [V]
In combination with a typical inductive load, such as a motor, this results in a switched mode current
limitation. This method of limiting the current has the advantage of greatly reduced power dissipation in the
IFX007T compared to driving the MOSFET in linear mode. Therefore it is possible to use the current limitation
for a short time without exceeding the maximum allowed junction temperature (e.g. for limiting the inrush
current during motor start up). However, the regular use of the current limitation is allowed as long as the
specified maximum junction temperature is not exceeded. Exceeding this temperature can reduce the lifetime
of the device.
The other way around, the load current can be calculated out of the sense current by following equation:
I L = dkILIS ⋅ ( IIS – IIS ( offset ) ) (5.2)
If the high side drain current is zero (ISD(HS) = 0A) the offset current IIS = IIS(offset) still will be driven.
The external resistor RIS determines the voltage per IS output current. The voltage can be calculated by
VIS = RIS . IIS.
In case of a fault condition the status output is connected to a current source which is independent of the load
current and provides IIS(lim). The maximum voltage at the IS pin is determined by the choice of the external
resistor and the supply voltage. In case of current limitation the IIS(lim) is activated for 2 * tCLS.
VS VS
Sense Sense
output RIS VIS output RIS VIS
IIS(lim) IIS(lim)
logic logic
IIS
[mA]
IIS(lim)
lu e
va
LIS
dk I
er
lo w
e
valu
k IS
e r d IL
high
IIS(offset)
Current Sense Mode Error Flag Mode
(High Side)
ICLx IL [A]
Table 10
Inputs Switches Current sense / status flag IS
0 = Logic LOW OFF = switched off IIS(offset) = Current sense - Offset (for
conditions see table: Current
sense)
1 = Logic HIGH ON = switched on CS = Current sense - high side (for
conditions see table: Current
sense)
X = 0 or 1 1 = Logic HIGH (error)
0 = No output
0.30
0.24
0.28
Tj = -40°C
0.22 0.26
0.24
0.20
0.22
IIS(offset) [mA]
IIS(offset) [mA]
0.18
0.20
Tj = 25°C
0.16 0.18
0.16
0.14
Tj = 150°C 0.14
0.12
0.12
0.10 0.10
8 12 16 20 24 28 32 36 40 -40 -20 0 20 40 60 80 100 120 140
VS [V] T [°C]
6.0
Tj = 150°C
5.5
Tj = 25°C
5.0
IIS(lim) [mA]
Tj = -40°C
4.5
4.0
3.5
8 12 16 20 24 28 32 36 40
VS [V]
Figure 15 Typical characteristic of the maximum analog sense current in fault condition (Pos. 5.4.7.)
6 Application information
Note: The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
Reverse Polarity
Protection
(IPD90P03P4L-04)
I/O WO
Reset RO Voltage I VS
Microcontroller Vdd Regulator L1 DZ1
Q 10V
D GND
Vss
R3 C1
A/D I/O I/O I/O A/D 10kΩ 100nF
optional
R12
10kΩ
IFX007T IFX007T R22
10kΩ
VS C1O2V C2O2V VS
C10 R21
R11 INH 220nF 220nF INH
1000µF 10kΩ
10kΩ
OUT OUT
IN
C19
100nF
M IN
IS IS
C1OU T C2OU T C29
R112 R212
SR 220nF 220nF 100nF SR
C1 IS 1kΩ 1kΩ C2IS
1nF GND GND 1nF
C12 R111 R211 C22
100nF 0..51kΩ 0..51kΩ 100nF
Note: This is a simplified example of an application circuit. The function must be verified in the real
application.
Reverse Polarity
Protection
(IPD90P03P4L-04)
I /O WO
Voltage
Micro- Reset RO
Regulator
I
L1
VS
D Z1
controller Vdd Q 10V
D GND
Vss
R3 C1
I/O I/O I/O 10kΩ 100nF
R2
10kΩ IFX007T
VS C9 C10 CO2 V
R1
100nF 1000µF 220nF
10kΩ INH
OUT
IN
COUT M
IS 220nF
CIS
1nF SR
R12
1kΩ GND
R11
C2
0..51kΩ
100nF
Note: This is a simplified example of an application circuit. The function must be verified in the real
application.
Example:
Rise-time = fall-time = 4 µs.
=> T-PWM = 10 * 4 µs = 40 µs.
=> f-PWM = 25 kHz.
The min. and max. value of the duty cycle (PWM ON to OFF percentage) is determined by the real fall time plus
the real rise time. In this example a duty cycle make sense from approximately 20% to 80%.
If a wider duty cycle range is needed, the PWM frequency could be decreased and/or the rise/fall-time could
be accelerated.
7 Package Outlines
4.4
10 ±0.2
1.27 ±0.1
0...0.3
A B
8.5 1)
0.05
1±0.3
2.4
7.551)
9.25 ±0.2
0.1
(15)
2.7 ±0.3
4.7 ±0.5
0...0.15
7 x 0.6 ±0.1 0.5 ±0.1
6 x 1.27
0.25 M A B 8˚ MAX.
0.1 B
1) Typical
Metal surface min. X = 7.25, Y = 6.9
All metal surfaces tin plated, except area of cut. GPT09114
10.8
9.4
16.15
4.6
0.47
0.8
8.42
8 Revision History
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The information given in this document shall in no For further information on technology, delivery terms
Edition 2018-02-21
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
Published by characteristics ("Beschaffenheitsgarantie"). Infineon Technologies Office (www.infineon.com).
Infineon Technologies AG With respect to any examples, hints or any typical
values stated herein and/or any information regarding Please note that this product is not qualified
81726 Munich, Germany
the application of the product, Infineon Technologies according to the AEC Q100 or AEC Q101 documents of
hereby disclaims any and all warranties and liabilities the Automotive Electronics Council.
© 2018 Infineon Technologies AG. of any kind, including without limitation warranties of
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