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4-Bit Booth Multiplier

Boot multiplaier

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227 views

4-Bit Booth Multiplier

Boot multiplaier

Uploaded by

Pro Trader
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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VLSI LAB (21ECL66)

Aim: Write a verilog code for 4-Bit Booth Multiplier and verify the functionality using Test
bench.

Tool Required: Xilinx ISE Project Navigator 13.1


Design Information and Bock Diagram:
The booth algorithm is a multiplication algorithm that allows us to multiply the two signed binary
integers in 2's complement, respectively. It is also used to speed up the performance of the
multiplication process. It is very efficient too. It works on the string bits 0's in the multiplier that
requires no additional bit only shift the right-most string bits and a string of 1's in a multiplier bit
weight 2k to weight 2m that can be considered as 2k+1- 2m.
Steps :
A – holds Multiplicand
B – holds Multiplier
Q=B
Q0 – holds 0th bit (LSB) of Q register
Q-1 – 1-bit variable/register.
Acc – Accumulator holds the result of intermediate addition/subtraction.
Count = max(width of multiplicand register, width of multiplier register)

Asst.Prof. Vivek V.K. Jain College of Engineering and Research (JCER), Belagavi
VLSI LAB (21ECL66)

Program: Test Bench


module BoothMulti (X, Y, Z);
input signed [3:0] X, Y;
output signed [7:0] Z;
reg signed [7:0] Z; module BoothTB;
reg [1:0] temp; // Inputs
integer i; reg [3:0] X;
reg E1; reg [3:0] Y;
reg [3:0] Y1; // Outputs
always @ (X, Y) wire [7:0] Z;
begin // Instantiate the Unit Under
Z = 8'd0; Test (UUT)
E1 = 1'd0; BoothMulti uut (
for (i = 0; i < 4; i = i + 1) .X(X),
begin .Y(Y),
temp = {X[i], E1}; .Z(Z)
Y1 = - Y; );
case (temp) initial begin
2'd2 : Z [7 : 4] = Z [7 : 4] + Y1; // Initialize Inputs
2'd1 : Z [7 : 4] = Z [7 : 4] + Y; X = 0;
default : begin end Y = 0;
endcase // Wait 100 ns for global
Z = Z >> 1; reset to finish
Z[7] = Z[6]; #100;
E1 = X[i]; X=-5;
end Y=7;
if (Y == 4'd8) // Add stimulus here
begin end
Z = - Z;
end endmodule
end
endmodule

Output:

X =0101: Y = 0111 --> Z = 00100011, Z(dec) = 35

Asst.Prof. Vivek V.K. Jain College of Engineering and Research (JCER), Belagavi

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