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Faculty of Engineering
[ COMPUTER ENGINEERING/ INFORMATION TECHNOLOGY] [ B.TECH ]
SEM: 4 MU FINAL EXAM - REMEDIAL DECEMBER:2022
__________________________________________________________________________
Subject: - (Computer Organization and Architecture) (01CE0402)
Date:- 22/12/2022
Total Marks: - 100 Time: - 03:00 hours
Instructions:
1. All Questions are Compulsory.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Question: 1.

(a) Select the correct option for the following questions. [10]

1. In reverse polish notation, expression A*B+C*D is written as

A: AB*CD*+ B: A*BCD*+
C: AB*CD+* D: A*B*CD+
2. Below is not type of Micro-operation.
A: Register transfer B : Arithmetic C: Logic D: Floating point
3. Floating point representation is used to store
A: Boolean values B : whole numbers C: real integers D: integers
4. What characteristic of RAM memory makes it not suitable for permanent storage?
A: too slow B : unreliable C: it is volatile D: too bulky
5. Cache memory act between
A: CPU and RAM B : RAM and ROM C: CPU and Hard disk D: None of these
6. Where the result of arithmetic and logical operation is stored?
A. Accumulator B. Cache Memory C. ROM D. None
7. The performance of the cache memory is measured in terms of?
A. Hit Ratio B. Chat Ratio C. Miss Ratio D. None
8. During the execution of a program which gets initialized first
A. MDR B. IR C. PC D. MAR
9. What converts the programs written in assembly language into machine instructions.
A. Machine compiler B. Interpreter C. Assembler D. Converter
10. Interrupts which are initiated by an I/O drive are known as
A. Internal B. External C. Software D. All

(b) Answer the following questions. [10]

1. Convert the binary number to decimal number – 011101

2. Define Compiler.
3. What do you mean by Parallel processing?
4. What is Accumulator?
5. Obtain the 2’s complement of the Binary number – 10101100
6. What do you mean by Micro-operation?
7. What is Effective address?
8. Define Sequencer.
9. What is Cache memory?
10. Define Parallel processing.

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Question: 2.

(a) Explain instruction cycle. [08]

(b) List out all addressing mode and explain all addressing mode. [08]

OR

(b) Explain SIMD, SISD, MISD, MIMD. [08]

Question: 3.

(a) What is an interrupt? Draw and explain interrupt cycle. [08]

(b) Convert the following expression into reverse polish notation by assuming A=6, B=2, C=3,
D=3, E=6 (also mention stack operation) AB/C-DE*AC*-+ [04]

(c) Differentiate RISC and CISC. [04]

OR

(a) What is DMA? Draw block diagram of DMA controller and explain in detail. [08]

(b) Draw hardware organization for addition and subtraction of sign 2’s complement number
[04]
(c) Differentiate isolated I/O and memory mapped I/O. [04]

Question: 4.

(a) Write a short note on various method of implementing priority interrupt. [08]

(b) Demonstrate advantages of virtual memory over cache memory. Also, demonstrate various
steps to perform address sequencing process in micro-program. [08]

OR

(a) What do you mean by mode of transfer? Explain any two technique in detail. [08]

(b) Enlist detail of below instruction: CLA, INC, LDA, CME. Also, sketch circuit of
multiplication to perform 2 bit by 2 bit array multiplier. [08]

Question: 5.

(a) Explain instruction pipeline with flowchart. [06]

(b) Apply selective set, selective complement and selective clear operation with suitable example.
[06]

(c) Differentiate Hardwired Control vs Micro Programmed Control. [04]

OR

(a) Explain CPU-IOP Communication with diagram [06]

(b) Solve following infix expression into post fix and evaluate using stack. (3+4) [10(2+6) 8]
[06]
(c) List out register reference instruction with name [04]

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Question: 6.

(a) Solve multiplication of (15) with (13) using Booth’s algorithm. Give each step. [08]

(b) Differentiate SIMD and MIMD. [04]

(c) Justify which organization is better among hardwire and micro programmed control unit.
[04]
OR

(a) Show content of register E, A, Q and SC during the process of division of two number 01110
(dividend) and 10001 (divisor). [08]

(b) Enlist various types of addressing mode. Explain any two in brief. [04]

(c) Draw circuit of Binary adder. [04]

---Best of Luck---

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– Bloom’s Taxonomy Report –

Sub: Computer Organization and Architecture (01CE0402)

Sem.: 4
Branch: COMPUTER ENGINEERING/ INFORMATION TECHNOLOGY

Que. Paper weightage as per Bloom’s Taxonomy

LEVEL % of weightage Question No. Marks of
Que.
Remember/Knowledge 26 1(b), 2(b), OR 2(b), 3(c), 26
OR 3(c), 6(b), OR 6(b)
Understand 42 1(a), 2(a), 3(a), OR 3(a), 42
4(a), OR 4(a), 5(c), OR
5(c), 6(c), OR 6(c)
Apply 26 3(b), OR 3(b), 4(b), OR 26
4(b), 5(b), OR 5(b), 6(a),
OR 6(a)
Analyze ___ ___ ___
Evaluate 6 5(a), OR 5(a) 6
Higher order ___ ___ ___
Thinking/ Creative

Chart/Graph of Bloom’s Taxonomy

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