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19 views4 pages

Ce 419

Uploaded by

mahashankar2123
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Date:14/12/2021 Enrolment No.

:___________________

RK UNIVERSITY
B.TECH./SEM-III/REGULAR/DEC-2021

CE419: COMPUTER ORGANIZATION AND ARCHITECTURE

Time: 10:00 AM TO 01:00 PM Total Marks: 100

Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Programmable calculator is not permissible.

SECTION – I

Q.1 (a) Select the most appropriate option: (Each of one mark) 06
1. 2’s complement of 11001011 is ____________
a. 01010111
b. 11010100
c. 00110101
d. 11100010
2. Octal to binary conversion: (24)8 =?
a. (111101)2
b. (010100)2
c. (111100)2
d. (101010)2
3. The largest two digit hexadecimal number is ________
a. (FE)16
b. (FD)16
c. (FF)16
d. (EF)16
4. The ______ format is usually used to store data.
a. BCD
b. Decimal
c. Hexadecimal
d. Octal
5. Which register is used to store fetched instruction from memory?
a. IR
b. TR
c. DR
d. PC

Page 1 of 4
6. In which timing signal instruction will be decoded?
a. T0
b. T1
c. T2
d. T3

(b) Answer following questions: (Each of two mark) 10


1. What is an Instruction Register?
2. Explain Instruction Decode.
3. Enlist major components of CPU.
4. What do you mean by pipeline register?
5. Perform BCD addition for 345 + 241.

Q.2 (a) Explain characteristics of RISC. 06


(b) Explain Circular Shift and Arithmetic Shift. 05
(c) Explain different addressing modes. 05
OR
Q.2 (a) Explain characteristics of CISC. 06
(b) Explain 4 bit arithmetic circuit with function table. 05
(c) Draw the block diagram of control unit of basic computer. 05

Q.3 (a) Explain Instruction Cycle with details 06


(b) Draw and explain flowchart for interrupt cycle. 06
(c) Explain second pass of assembler. 06
OR
Q.3 (a) Explain first pass of assembler. 06
(b) Explain Common Bus System with details. 06
(c) Differentiate hardwired control and micro programmed control 06
architecture.

SECTION – II

Q.4 (a) Select the most appropriate option: (Each of one mark) 06
1. The situation in data of operands are not available is called ______
a. Data Hazard
b. Stack
c. Deadlock
d. None
2. The periods of time when the unit is idle is called as _________
a. Stalls
b. Bubbles
c. Hazards
d. Both bubbles and Stall

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3. Input or output devices that are connected to computer are called
_______.
a. Input/Output Subsystem
b. Peripheral Devices
c. Interfaces
d. Interrupt
4. The method which offers higher speeds of I/O transfers is
a. Interrupts
b. Memory Mapping
c. Programmed Controlled IO
d. DMA
5. In memory-mapped I/O…
a. The I/O devices and the memory share the same address space
b. The I/O devices have a seperate address space
c. The memory and I/O devices have an associated address space
d. A part of the memory is specifically set aside for the I/O
operation
6. DMA transfer operations are performed by _____.
a. Device Interface
b. DMA Controller
c. Data Controller
d. Overlooker

(b) Answer following questions: (Each of two mark) 10


1. Discuss 2 solutions for branch difficulties (branch hazards).
2. What is overflow? How it can be detected in addition.
3. Explain solutions for data dependency.
4. What is speed-up ratio? Explain with example.
5. Explain different commands in IO organization.

Q.5 (a) With booth multiplication demonstrate multiplication of 5 x 3. 06


(b) Define Cache memory. Explain Write-through and Write-back cache 05
write method
(c) With diagram explain Handshaking method in IO operations. 05
OR
Q.5 (a) Explain arithmetic pipeline with suitable example. 06
(b) What is daisy chain priority interrupt? 05
(c) Draw flowchart for addition and subtraction. 05

Q.6 (a) With Flynn’s classification explain different categories of computer 06


organization.
(b) Differentiate Memory mapped IO and Isolated IO. 06
(c) What is Input Output Processor? Explain CPU IOP communication. 06
OR
Page 3 of 4
Q.6 (a) Explain Pipeline conflicts. 06
(b) Which are the different cache mapping techniques? Explain any two 06
methods.
(c) Write short note on Content Addressable memory. 06

*************

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