KINGSTON ENGINEERING COLLEGE

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

pp

EC3462 LINEAR INTEGRATED CIRCUITS LABORATORY

SEMESTER IV

LAB MANUAL

PREPARED BY

Mr. G. SATHISHKUMAR,
ASSISTANT PROFESSOR,
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING,
KINGSTON ENGINEERING COLLEGE.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 1 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

GENERAL INSTRUCTIONS FOR LABORATORY CLASSES:

 Enter the Lab with CLOSED FOOTWEAR.
 Boys should “TUCK IN” the shirts.
 Students should wear uniform only.
 LONG HAIR should be protected, let it not be loose especially near electronics components.
MACHINERY:
 Any other machines / equipments should not be operated other than the prescribed one for that day.
 POWER SUPPLY to your test table should be obtained only through the LAB TECHNICIAN.
 Do not LEAN and do not be CLOSE to the electrical components.
 TOOLS, APPARATUS and other accessories sets are to be returned before leaving the lab.
DO s :
 Be punctual to the lab and come regularly.
 Follow proper dress code.
 Maintain silence and discipline inside the lab.
 Study the theory of the experiments before coming to the lab.
 Identify the different components correctly before making connection.
 Verify the connection from the faculty in charge before you switch ON the power.
 Handle the components/equipments with utmost care and follow the instructions given by the
faculty/Lab Instructor.
 Keep the work bench and lab clean.
 Take the sign of the faculty in charge before taking the kit/component and after completing the
experiment.
 Switch off the power supply and return the components after completion of the experiment.
 Arrange the chairs before leaving the lab.
DON’Ts :
Exceed the maximum voltage rating of the power supply.
Make loose connection and short circuit.
Place the components forcefully inside the bread board to avoid damage.
Make or remove the connections when the power supply is ON.
Consume eatables inside the lab.
Involve in unnecessary conversation while doing experiments.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 2 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 HEADINGS and DETAILS should be neatly written

 Aim of the experiment
 Apparatus / Tools / Instruments required
 Procedure / Theory / Algorithm / Program
 Model Calculations
 Neat Diagram / Flow charts
 Specifications / Designs Details
 Tabulations
 Graph
 Result / discussions
 Before doing the experiment, the student should get the Circuit / Program approval by the
FACULTY - IN - CHARGE.
 Experiment date should be written in the appropriate place.
 After completing the experiment, the answer to the viva-voce questions should be neatly written in
the workbook.
 Be PATIENT, STEADY, SYSTEMATIC AND REGULAR.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 3 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3462 - LINEAR INTEGRATED CIRCUITS LABORATORY

LIST OF EXPERIMENTS
DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS:
1. Series and Shunt feedback amplifiers-Frequency response, Input and output impedance
2. RC Phase shift oscillator and Wien Bridge Oscillator
3. Hartley Oscillator and Colpitts Oscillator
4. RC Integrator and Differentiator circuits using Op-Amp
5. Clippers and Clampers
6. Instrumentation amplifier
7. Active low-pass, High pass & Band pass filters
8. PLL Characteristics and its use as frequency multiplier, clock synchronization
9. R-2R ladder type D-A converter using Op-Amp
SIMULATION USING SPICE (Using Transistor):
1. Tuned Collector Oscillator
2. Twin -T Oscillator / Wein Bridge Oscillator
3. Double and Stagger tuned Amplifiers
4. Bistable Multivibrator
5. Schmitt Trigger circuit with Predictable hysteresis
6. Analysis of power amplifier
Content beyond the Syllabus

1. Design of differential amplifier using BJT.

COURSE OUTCOMES:
At the end of the course the students will be able to
CO1: Analyze various types of feedback amplifiers.
CO2: Design oscillators, tuned amplifiers, wave-shaping circuits and multivibrators.
CO3: Design and simulate feedback amplifiers, oscillators, tuned amplifiers, wave- shaping circuits and
multivibrators, filters using SPICE Tool.
CO4: Design amplifiers, oscillators, D-A converters using operational amplifiers.
CO5: Design filters using op-amp and perform an experiment on frequency response.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 4 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Without Feedback:

With Feedback:

VCC

R2 R1
283k 1k

C2

.1uf
C1

BC107
.1uf

CRO

V1
2Vac 10k 680

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 5 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF CURRENT SERIES FEEDBACK AMPLIFIER

Ex. No:
Date:

Aim
To plot the frequency response of Current- series feedback amplifier with feedback and without
feedback

Components Required

S.No Apparatus Required Type Quantity

1 Transistor BC107 1
2 Resistors
[Carbon film ¼ watt] 61K, 1 K, 4.7K Each 1
3 Capacitors [electrolytic] 1F, 100F Each 1
4 DRPS [0-20V] 1
5 AFO [0-1MHZ] 1
6 CRO [0-20MHZ] 1

Design

Assume IC=1mA
o VRE=1V
o VRE=IERE
o IERE=1V
o IC=IE=1mA
o RE=1V/1mA=1k 
Assume R2 =10K

o VR2=Vcc (R2/R1+R2)

IB (R1*R2/R1+R2) drop is neglected compared to VBE and VRE drops. It is this neglecting that results in 
independent voltage divider bias design.

Applying KVL to the input

VR2-VBE-VRE=0
VR2=VBE+VRE=0.7+1=1.7
VR2=VCC (R2/R1+R2)
1.7V=12 V (10K/R1+10K)
R1=61K Drop across RE is assumed to be 1V. The drop across VCE with a supply of 12V is given by
12-1=11V. It is equal to 11/2 = 5.5

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 6 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

With feedback
Vi =

S.No. Frequency (Hz) V0 (volts) Gain= VO / Vi Gain =

20logVO/Vi (dB)

Without feedback
Vi =

S.No. Frequency(Hz) V0 (volts) Gain= VO / Vi Gain =

20logVO/Vi(dB)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 7 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Now the voltage across the resistance RC is 5.5V

VCE=5.5V; VCC=5.5V; IC=1mA

RC=VC/IC = 5.5V/1mA = 5.5K

Instead of using 5.5K, we can use a standard value of 4.7K RC=4.7K

Theory

Depending on the relative polarity of the signal being feedback in to a circuit, one may have negative or
positive feedback. If feedback is of opposite polarity to input signal negative feedback results. While
negative feedback results in reduced overall gain, it results in attaining higher impedance, stabilized
voltage gain etc.
In the circuit, the feedback signal is the voltage across RE and the sampled signal is the load current.
Hence this is a case of current series feedback. This topology stabilizes the transconductance G m. The gain
of the amplifier decreases as a result of the negative feedback applied, whereas its bandwidth is improved.

Procedure

 Connections are given as per the circuit diagram.

 An input signal of 50mV is fed output is viewed in the CRO.
 The readings of the (CRO shown values) output voltages are noted by varied frequency from (0-
1MHz).
 Gain is calculated as the ratio of output voltage to input voltage.
 Graph is plotted between frequency and gain in dB in a semi log graph sheet and bandwidth is
calculated.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 8 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model Graph

Gain (dB)

A 02 without feedback
0.707
A 02
A01
0.707
A01 with feedback

FL2 Fh1
FL1 Fh2 frequency (Hz)

Model Calculation.

GAIN=20 log (Vo / Vi)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 9 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Result

A graph is plotted between frequency and gain in dB. The bandwidth of the circuit is

With feedback =
Without feedback =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 10 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram

Without Feed Back Amplifier

Model Graph

1.7V = (12v*10k) / 10k + R1

R1 = 61 K

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 11 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF VOLTAGE- SHUNT FEEDBACK AMPLIFIER

Ex. No:
Date:

Aim
To plot the frequency response of voltage shunt feedback amplifier.

Components Required

s.no. Name Range Quantity

1 Transistor BC107 1
2 Resistor 69K, 12 K,
(1/4watt, carbon film) 3.9 K,1 K,10K Each 1
3 Capacitor (electrolytic) .1F,100uf 4,1
4 AFO (0-1MHz) 1
5 CRO (0-20MHz) 1
6 Bread board
7 Connecting Wires

Design

Assume
o Ic = 1mA
o VRE =1V
o =>IERE = 1V
o Ic = IE = 1mA

RE =1 K

Assume
o R2 = 10 K
o VR2 = VccR2 / R1 + R2
o IB (R1 * R2) / R1 + R2 drop is negligible compared to VBE and VRE drops.
It is this neglecting that results in  independent voltage divider bias.

Apply KVL to input,

VR2 - VBE = VRE

VR2 = VRE +VBE

= 1 + 0.7 = 1.7V

VR2 = VCCR2 / R1 + R

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 12 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

With Feed Back Amplifier:

Tabulation:
Vi=
S.No. Frequency (Hz) V0 (volts) Gain= VO / Vi Gain =
20logVO/Vi(dB)

Model calculation.

GAIN=20 log(Vo/Vi)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 13 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Theory
Depending upon the relative polarity of the signal being feedback into a circuit, one may have
negative or positive feedback. If feedback signal is of opposite polarity to the input signal, negative
feedback results .While negative feedback results in reduced overall gain, it results in attaining higher
impedance, stabilized voltage gain etc.
The circuit given has the voltage series feedback. The feedback signal as well as the output
signal is the voltage across the emitter resistance RE, which gives rise to this type of feedback densities
voltage gain with respect to changes in hfe and it increases input resistance and decreases output resistance

Procedure

 Connections are given as per circuit diagram.

 An input signal of 1v is fed and the output is viewed in CRO.
 The reading of output voltage is measured by varying the frequency from 0 to 1Mhz.
 Gain is calculated and a graph is plotted between frequency and a gain in dB.

Result

Thus the frequency response of voltage shunt feedback amplifier is plotted.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 14 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Tabular column
To find frequency of oscillation

Amplitude Time Period

(V) (ms)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 15 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF RC PHASE SHIFT OSCILLATOR

Ex. No:
Date:

Aim
To design a RC phase shift oscillator and to obtain the sine wave of desired frequency.

Components Required

S.No Apparatus Type / Range Quantity

1 Transistors BC 107 1
2 Resistor 61K,10K,1K,4.7K 1,5,1,1
3 Capacitor 47F,100F,0.01F 1,1,3
4 Dual Power Supply (0-30) V 1
5 CRO (0-20) MHz 1
6 Bread Board ----- 1
7 Connecting Wires ----- ----
Design
F=1/(2RC6)

Desired F= 650Hz Assume C=0.01f

R = 1/2 x 0.01x10-6x650x6 = 9.996K

R 10K

Theory
An oscillator is a device that can be used to generate an alternating voltage or current. It is also a
converter that converts DC to AC which is at 0 frequency, to higher frequency. RC phase shift oscillator
produces sinusoidal oscillations and hence a sine wave. Amplifier when provided with a -ve feedback
forms an oscillator is the phase shift between input signal and the feedback signal must be ‘zero’ or an
integral multiple of 180.
In the circuit diagram the amplifier is followed by 3 section of RC phase shift oscillator network. The
output of RC network being feedback to the input through a source follower. A single stage amplifier not
only amplified the input signal but also shifts its phase by 180 for producing oscillations. We must have a
+ve feedback. That is a phase shift of 360. Thus to add another 180, the ladder network of RC sections
are used. The resistors R1, R2 combination produces DC Emitter bias and RE, CE provides temp stability
and ac signal degeneration. The component resistor and capacitor are selected to obtain the desired
frequency.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 16 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model Graph

Amplitudee
e

A
Time (mS)

Tabular column
To find frequency of oscillation

Amplitude Time Period

(V) (ms)

Model Calculation:

Frequency=1/T=

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 17 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

R2 combination produces DC Emitter bias and RE, CE provides temp stability and ac signal degeneration.
The component resistor and capacitor are selected to obtain the desired frequency.
The R and C selected in such a way that the RC combination phase angle be 60, so that using a ladder
network of 3RC sections a phase shift of 180 is obtains between the input and output. This provides a total
phase shift of 360and hence a sine wave of desired frequency is obtained. Thus the RC phase shift
oscillator serves as a frequency determining network. The source follower is added to the output of the
ladder circuit so as to avoid the loading effect.

Procedure

 The connections are given as per the circuit diagram.

 The power supply is tuned on.
 The output is taken across the collector of transistor [T 2]
 The output sine wave is viewed in the CRO.
 The amplitude and the frequency are observed in the CRO.
 The sine wave is plotted on the graph.

Result
Thus the RC phase shift oscillator is designed and the sine wave is obtained as output.

Desired frequency [Theoretical] =

Obtained frequency [Graphical] =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 18 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram Using Transistor:

Circuit Diagram Using Op -Amp:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 19 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF WIEN BRIDGE OSCILLATOR

Ex. No:
Date:

Aim
To design a Wien Bridge oscillator & to obtain the sine wave of desired frequency.

Components Required
 Dual power supply
 Cathode ray oscilloscope
 Breadboard

Design
The frequency of oscillation of Wien bridge oscillator is given by
Fo = 1 / (2**R*C)

Assume C = 0.1F & R = 10K

Theoretical frequency Fo = 1/ (2RC)

Fo = 1/ (2* 3.14 * 103 * 0.1F)

= 160 Hz.
Theory
An Oscillator is a device that can be used to generate an alternating voltage or current. It is also a
converter that converts dc at zero frequency to ac at higher frequency. R.C Phase shift oscillator produces
sinusoid oscillations & hence a Sine wave oscillator. Amplifier when provided with a Positive feedback
forms an oscillator...i.e. the phase shift between the input signal & the feedback signal must be zero degree
or an integral multiple of 180 degrees. The closed loop circuit of the Wien bridge oscillator gives the
negative feedback. At Fo,  = 1/3. Therefore, for sustained oscillation the amplifier must have a gain of
precisely 3. However, from practical point of view, Av may be slightly less or greater than 3. The circuit
can be viewed as Wien Bridge with a series RC network in one arm and a parallel RC network in the
adjoining arm. The condition of zero phase shift is obtained by balancing the bridge.
The Wein bridge oscillator is the most commonly used audio frequency oscillator because of its
simplicity and stability. The bridge has a series RC network in one arm and a parallel RC network in the
adjoining arm. In the remaining two arms of the bridge, resistors R1 and Rf are connected. The phase angle
criterion for oscillation is that the total phase shift around the circuit must be 0. This condition occurs only
when the bridge is balanced. The frequency of oscillation f0 is exactly the resonant frequency of the
balanced Wein bridge and is given by, Frequency = f0 = 1/ (2πRC).

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 20 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN:
f0=1KHz; f0 = 1/(2πRC)=> R = 1/(2πf0C),
Choose C=0.05µF, R= 1/(2πX1X103X0.05X10-6) => R =
Take R1=10R=
Rf = 2R1 =

Model Calculation

Frequency=1/T=

Model Graph

Amplitude

A
Time (mS)

Tabulation

Amplitude Time Period

(V) (ms)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 21 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

 Construct the circuit as shown in the circuit diagram.

 Observe the wave form on the CRO.
 Note the values of amplitude and frequency.
 Plot the curve on the graph.
 Verify the results with design.

Result
Thus the Wien bridge oscillator is designed and the sine wave is obtained as output.
Desired frequency [Theoretical] =
Obtained frequency [Graphical] =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 22 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Model Graph

V0 (V)

T (msec)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 23 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF HARTLEY OSCILLATOR

Ex. No:
Date:

Aim

To construct a Hartley oscillator of frequency of desired frequency and to plot the sinusoidal waveform

Components Required

S.no Apparatus Range Quantity

1 Transistor BC107 2
2 Resistor(1/4w ,Carbon film) 4.7k 2
72k 2
3 Capacitor (paper) 0.1F 3
4 Inductor 1mH,0.8mH Each 1

Design
f = 1 / 2LeffC

Assume

o L1=1mH
o L2=0.8mH
o Leff=L1+L2=1.8mH
o C=0.1µF

f=11 KHz

Theory

The Hartley oscillator is an LC electronic oscillator that derives its feedback from a tapped coil in
parallel with a capacitor (the tank circuit). Although there is no requirement for there to be mutual coupling
between the two coil segments, the circuit is usually implemented as such. A Hartley oscillator is
essentially any configuration that uses a pair of series-connected coils and a single capacitor. Advantages
of the Hartley oscillator include:

 The frequency may be varied using a variable capacitor.

 The output amplitude remains constant over the frequency range
 Either a tapped coil or two fixed inductors are needed

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 24 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model Calculation:

Frequency=1/T=

Observation:

Amplitude Time Period

(V) (ms)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 25 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure:

 Construct the circuit as shown in circuit diagram in figure.

 Observe the output waveform on the CRO.
 Measure the amplitude and frequency and plot the waveform.

Result
Thus, the Hartley oscillator is designed and the frequencies of the output waveform are observed.

Desired frequency [Theoretical] =

Obtained frequency [Graphical] =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 26 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram

Model Graph

Amplitude

A
Time (mS)

Model Calculation:

Frequency=1/T=

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 27 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF COLPITTS OSCILLATOR

Ex. No:
Date:

Aim
To design Colpitts Oscillator and to get sine wave output of desired frequency.

Components Required

S.no Apparatus Range Quantity

1 Transistor BC107 2
2 Resistor (1/4w, Carbon film) 4.7k 2
72k 2
3 Capacitor (paper) 0.1F 3
4 Inductor 1mH,0.8mH Each 1

Design
f = 1 / 2LC
Assume

o L = 1.8mH
o C1 = 0.01F
o C2 = 0.01F

Ceff=C1C2/ (C1+C2) =5Nf

f=53 kHz

Theory

The LC oscillator uses L and C as the element which forms tank circuit or oscillatory circuit.
This is also referred to as resonating tuned circuits. L and C are connected in parallel when capacitor gets
charged, the energy gets stored as electrostatic energy. After charging, it discharges through L. when
capacitor is fully discharged, maximum current flows through the circuit.
The LC oscillator along with amplifier supplies this loss of energy at proper times. The care of
proper polarity is taken by feedback network. Thus LC oscillator is obtained. Due to energy, which is lost,
the oscillations are maintained hence called sustained oscillations, or undamped oscillations.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 28 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tabulation

Amplitude Time Period

(V) (ms)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 29 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

 Connect the circuit as per the circuit diagram.

 Observe output sine wave in CRO.
 Amplitude and time period are noted in the CRO.
 Plot graph between amplitude and frequency.

Result

Thus, the Colpitts Oscillator is designed and sine wave output is obtained.

Desired frequency [theoretical] =

Obtained frequency [graphical] =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 30 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Model graph

Gain (dB)
Amax
3dB

Frequency (Hz)
fL f0 fH

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 31 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF SINGLE TUNED AMPLIFIER

Ex. No:
Date:

Aim
To design and test a tuned class C amplifier and determine the frequency response of an amplifier

Components Required

S. No Name Type / Range Qty

1 Transistor BC 107 1
2 RPS (0-30)V 1
3 AFO (0-1)MHz 1
4 Resistors 1K,61K,10K each 1
(1/4W, Carbon film)
5 Capacitors 47f,100f,1f each 1
(Electrolytic)
6 Inductors 60mH 1
7 CRO (0-20)MHz 1
8 Bread Board & Wires

Design

Assume

o IE = 1mA;
o VE = 1V
o IERE =1V and so RE =1K
 R2 = 10K

The Base voltage is 0.7 + 1.0 = 1.7 volts = VB

Assume  = 100 for the transistor.

 Then the base current IB will be (1mA/101) = 9.9 A.

 The total current through R1, assuming R2 as 10K, will be (1.7/10k) + 9.9 A = 0.1799 mA and
the voltage drop across R1 is 12-1.7 =10.3V.
 The value of R1 is (10.3/0.1799) k = 57.254 k

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 32 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tabulation

Vi =
vo
S.NO Frequency (Hz) Voltage V0 gain  20 log
vin
(V) (dB)

1
Design of Inductance: f0 =
2 lc
Assume C = 1f

lc = ½ (2K)
lc  6.332 x 10 9
l  6.332 mH  6mH
l = 6mH

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 33 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Theory
Amplifiers, which amplify a specific frequency or narrow band of frequency, is called tuned
amplifier. Tuned amplifiers are used for the amplification of radio frequencies. The tuned circuit offers
very high impedance at resonant frequency and very small impedance at other frequencies. If the signal has
same frequency as resonant frequency of LC circuit, large amplification will result.
When signals of many frequencies are present at the input it will select and strongly amplify the
signals of resonant frequency while rejects the others. Thus they are used in radio receivers. The circuit
consists of transistor amplifier containing a parallel band circuit as collector load. The values of capacitors
and inductors of the tuned circuit are so selected that its resonant frequency is the frequency to be
amplified. The output is obtained through a coupling capacitor C.

Procedure

 Connect the circuit as per the circuit diagram.

 Set VS =5mV using AFO.
 Keeping the input voltage constant vary the frequency from 20Hz to 1MHz in regular steps and
note down the corresponding output voltage.
 Plot the gain Vs frequency.
 The frequency response curve is plotted on a log scale. The mid frequency voltage gain is divided
by 2 and these points are marked in the frequency response curve.
 The high frequency point is called upper 3dB point. The lower frequency point is called lower 3dB
point. The difference between upper 3dB and lower 3dB point in frequency scale gives the
bandwidth of the amplifier.

Result

The frequency response of the single tuned amplifier is obtained

Band width =
Resonant Frequency =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 34 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Model Graph:

Tabulation

INPUT OUTPUT
S.no AMPLITUDE TIME PERIOD AMPLITUDE TIME PERIOD

Differentiator

Integrator

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 35 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF INTEGRATORS AND DIFFERENTIATORS

Ex. No:
Date:

Aim
To obtain the waveforms of Integrators and Differentiators

Components Required

 AFO
 CRO
 Resistors
 Capacitors

Theory

Integrator

An AC source with voltage vin(t) is the input to the RC circuit. The output is the voltage across
the capacitor. Only high frequencies f >> 1/RC is considered, so that the capacitor has insufficient time to
charge up, its voltage is small, so the input voltage approximately equals the voltage across the resistor.

Differentiator

An AC source with voltage vin(t) is the input to the RC circuit. This time the output is the voltage
across the resistor. This time, we consider only low frequencies << 1/RC, so that the capacitor has time
to charge up until its voltage almost equals that of the source.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 36 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CIRCUIT DIAGRAM USING OP -AMP TABULATION:

a. INTEGRATOR :
Waveform Amplitude Time period
(Volts) (ms)

INPUT

OUTPUT

b. DIFFERENTIATOR:

Waveform Amplitude Time period

(volts) (ms)

INPUT

OUTPUT

MODEL GRAPH:
a) Integrator: b) Differentiator:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 37 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

Differentiator

1. Circuit connections are given as shown in figure.

2. The input square waveform is given.
3. The output is obtained in the CRO and is verified with the theoretical verification.
4. Graph is drawn as shown in model graph.

Integrator
1. Circuit connections are given as shown in figure.
2. The input square waveform is given.
3. The output is obtained in the CRO and is verified with the theoretical verification.
4. Graph is drawn as shown in model graph.

Result

Thus the operation of integrator and differentiator were studied and the output waveforms were
obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 38 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Series Positive Clipper:

Series Negative Clipper:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 39 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF CLIPPERS AND CLAMPERS

Ex. No:
Date:

Aim
To design and study the operation of

 Positive clipper
 Negative clipper
 clamper.

Components Required

 Function generator.
 Resistors 200,1k,4k,10k.
 Capacitor 1F
 Diode IN4001.
 CRO

Theory

Clipper

The circuit with which the output waveform is shaped by removing or clipping a part of the
portion of the applied voltage is called clipping circuit. This is used to select for transmitting that part of
arbitrary waveform which lies above or below the particular reference voltage level. The positive clipper
removes the positive half of the applied input signal. The negative clipper removes the negative half of the
applied input signal.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 40 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model Graph:

Positive Clipper

Negative Clipper:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 41 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

 Circuit connections are given as shown in fig.

 A sine wave with 10v peak to peak and 1 KHz frequency is given as input.
 The output is obtained in the CRO and is verified with the theoretical verification
 Graph is drawn as shown in model graph.

Verification

Positive clipper

V0 = (RL / R + Rl) Vin

Vin=-10V & Vo= (1000/200+1000)(-10)=-8.33V

Negative clipper

V0 = (RL / R + Rl) Vin

Vin=10V & Vo=8V

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 42 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

Model Graph

Input waveform

Negative Clamper

Positive Clamper

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 43 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Clamper

Clamping is a process of introducing a D.C voltage level into an A.C signal. Positive clamper
lifts the D.C level of the signal than its original D.C level in positive direction. Negative clamper lifts the
D.C level of the signal than its original D.C level in Negative direction.

Procedure

 Circuit connections are given as shown in fig.

 A sine wave with 10v peak to peak and 1 KHz frequency is given as input.
 The output is obtained in the CRO and is verified with the theoretical verification.
 Graph is drawn as shown in model graph.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 44 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tabulation:

INPUT OUTPUT
S.no Amplitude (v) Time period (ms) Amplitude(v) Time period (ms)
Positive
clipper

Negative
clipper

Positive
clamper

Negative
clamper

Model Calculation:

f =1/T

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 45 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Result

Thus the operation of Clippers and Clampers were studied and the output waveforms were obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 46 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CIRCUIT DIAGRAM:

TABULAR COLUMN:

Input Vo in volts
Voltages
V1 V2
volts volts Theoretical Practical

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 47 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF INSTRUMENTATION AMPLIFIER

Ex. No
Date

Aim
To design and test the operation of Instrumentation Amplifier.

Components Required

S.No. Name of the Apparatus Range/Valu Qty

e
1. Bread Board - 1
2. Decade Resistance Box 1 Ω to 1 M 1
Ω
3. Dual Power Supply ±15 V 1
4. Resistor 1 k Ω,2.2 k 7,1
Ω
5. IC 741 Op-Amp - 1
6. Multimeter 3½ Digits 1
7 RPS (0-30) V 1
8. Connecting Wires - Few

THEORY:

Instrumentation amplifier is an amplifier with high input impedance, very low offset
and drifts voltage. This configuration is better than inverting or non-inverting amplifier because
it has minimum non-linearity, stable voltage gain and high common mode rejection ratio
(CMRR > 100 dB.). This type of amplifier is used in thermocouples, strain gauges and
biological probes.
Output voltage V0 = (V2 – V1) [1 + 2 R1 / R2]

PROCEDURE:

(i) Connections are given as per the circuit Diagram.

(ii) For various input voltage V1 & V2, measure and record the output voltage.

RESULT:
Thus the Instrumentation amplifier was constructed & Verified.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 48 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CIRCUIT DIAGRAM:
Low Pass Filter:

TABULATION:
Low Pass Filter: INPUT VOLTAGE: Vi = volts
Frequency Hz Output voltage Vo volts Gain in db 20 logVo/Vi

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 49 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF SECOND ORDER ACTIVE FILTERS

Ex. No:
Date:

Aim:
To design, construct and plot the frequency response of second order low pass and high pass
filter having the fc of 1 kHz.

APPARATUS REQUIRED:

S.No. Name of the Apparatus Range/Value Qty

1. Bread Board - 1
2. IC Power Supply ±15 V 1
10 k Ω,5.86 k Ω 1
3. Resistor 1.6 k Ω 2
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Function Generator 0-3MHz. 1
7. Capacitor 0.1µF 2
8. Connecting Wires - Few

THEORY:
An improved filter response can be obtained by using a second order active filter. A second
order filter consist of two RC pairs has a roll-off rate of –40db/decade. The transfer functions.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 50 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram:

High Pass Filter: INPUT VOLTAGE: Vi = volts

Frequency Hz Output voltage Vo volts Gain in db 20 logVo/Vi

MODEL GRAPH:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 51 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Low Pass Filter: High Pass Filter:

PROCEDURE:
1. Connect the Low pass filter circuit as shown in the circuit diagram.
2. Give an input signal Vi of 2V(p-p) and measure the output voltage for different frequency
from the CRO.
3. Plot the frequency response 20 log Vo/Vi versus input frequency and find 3db frequency.
4. Determine the cut-off frequency from the plot.
5. Repeat the above for HPF.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 52 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

RESULT:
Thus the Second order low pass filter and High pass filter was designed and frequency response
plot was drawn.

LPF: i. Theoretical = ii. Practical =

HPF: i. Theoretical = ii. Practical =
CIRCUIT DIAGRAM:

MODEL GRAPH

TABULATION: INPUT VOLTAGE: Vi = volts

Frequency ( Hz ) Output voltage Vo (volts) Gain in db 20 logVo/Vi

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 53 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN A BAND PASS FILTER

Ex. No:
Date:

Aim:
To design, construct, test and to plot the frequency response of wide band pass filter.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range/Value Qty

.
1. Bread Board - 1
2. IC Power Supply ±15 V 1

3. Resistor 10 k Ω, 39.8 k Ω, 7.9 k 4, 1

Ω
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Signal Generator 0-3 MHz. 1
7. Capacitor 0.01µF 2
8. Connecting Wires - Few

THEORY:
A wide band pass filter can be formed by cascading a HPF and LPF section. If the HPF
and LPF are of the first order, then the band pass filter (BPF) will have a roll off rate of -20
dB/decade. A wide band pass filter formed by cascading I order HPF and I order LPF is
shown in the circuit diagram.

DESIGN:
fh = 2KHz; fl = 400Hz; pass band gain A0= 4.
LPF and HPF sections may be designed to have a gain of 2.
As the opamp is used in non-inverting configuration
Ao = 1+ (Rf/Ri) = 2=> Rf/Ri = 1=> Rf = Ri. Let Ri =10 kΩ, Rf = .
fh = 1/(2πR2C2) = 2KHz. Let C2= 0.01µF,R2 = 1/(2πX2X103X0.01X10-6) =
fl = 1/(2πR1C1) = 400Hz. Let C1= 0.01µF, R1 = 1/(2πX400X0.01X10-6) =
PROCEDURE
1. Connect the Band pass filter circuit as shown in the circuit diagram.
2. Give an input signal Vi of 1V (p-p) and measure the output voltage for different frequency.
3. Plot the frequency response 20 log Vo/Vi versus input frequency and find 3db frequency.
4. Determine the cut-off frequency fh and fl .

RESULT
Thus the Second order Band pass filter was designed and frequency response plot was drawn
Lower cutoff frequency: i. Theoretical = ii. Practical =
Upper cutoff frequency: i. Theoretical = ii. Practical =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 54 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

a. PLL Circuit

b. Frequency Multiplier

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 55 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model Graph:

TON

Amp

TOFF

TIME

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 56 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF ASTABLE MULTIVIBRATOR

Ex. No
Date

Aim
To design an astable multivibrator to get a square wave and to calculate its TON and TOFF

Components Required

S.no Apparatus Range Quantity

1 Transistor BC107 2
2 Resistor(1/4w ,Carbon film) 4.7k 2
72k 2
3 Capacitor (paper) 0.01F 2

Design

Let
o VCC = +12v, hfe = 20, f = 1 kHz, Ic = 2.5 mA,
VCE(sat) = 0.2v
Rc = VCC – VCE(sat) / Ic =4.7 K
o T = 1.38 RC
T = 1ms,
Assume

C = 0.01F.
 R = T / 1.38*C = 1m / (1.38 * 0.01) = 72.463 K
R  72 K

Theory

An Astable multivibrator also known as free running multivibrator generates square wave of
known period. It does not have any permanent stable state. It has two quasi stable states. The astable
multivibrator may be thought of as two common emitter amplifying stages. Each stage provides a positive
feedback through a capacitor at the input of the other. Since the amplifier stage produces a phase shift of
180, the total phase shift is 360 or 0. Thus the feedback is positive. Due to capacitive coupling none of
the transistors can remain permanently in cutoff or saturation. Instead the circuit has two quasi stable states
and it makes periodic transitions between the two stages.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 57 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tabulation:

Amplitude(v) Time period(ms)

Capacitor
waveform T On =
T Off =

T On =
Output square T Off =
wave

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 58 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

 The circuit connections are given as per circuit diagram.

 The supply is switched ON.

 The output is taken at the collector of T 2.

 The square wave is obtained.

 The amplitude and time period of T ON and TOFF is calculated separately.

 The graph is drawn with the measured value.

Result

Thus, an astable multivibrator is designed to get a square wave and its T ON and TOFF are
calculated and a graph is drawn
TON and TOFF=

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 59 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Circuit Diagram: Monostable Multivibrator

TRIGGER GENERATION:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 60 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN OF MONOSTABLE MULTIVIBRATOR

Ex. No:
Date:

Aim

To design a monostable multivibrator to get a square wave of definite time period and to calculate T ON
and TOFF .

Components Required

S.no Apparatus Range Quantity

1 Transistor NPN BC107 2

2 Resistors (carbon 2k 2
film ¼ watt) 14k 1
100k 1
3 Capacitor(ceramic) 0.1F 1
4 RPS [0-20V] 1
5 AFO [0-1MHZ] 1
6 CRO [0-20MHZ] 1

Design

Let

 VCC = +5V, IC = 2.5 mA,

 VCE(sat) = 0.2v
hfe = 200, f = 1khz.
Rc = VCC – VCE (sat) / Ic
= 5-0.2 / 2.5m = 1.92 K
Rc  2 K
T = 1ms;
Assume
C = 0.1F
R = T / 0.69*C = 1m / 0.69*0.1 = 14.49 K

R  14 K

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 61 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Model graph

Input trigger wave

TON

Amp
Input tigger wave
T OFF

T( m sec)
Output square wave

TON

TOFF

T(m sec)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 62 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Theory

A monostable multivibrator has a stable state and quasi stable state. An external trigger signal is
required to be applied to approximate point in the quasi-stable state. The circuit remains in the quasi-stable
state for the predetermined length of time and then changes to the stable state automatically. The circuit of
multivibrator using two NPN transistors is shown. The output of transistor Q 2 is coupled to base of
transistor Q1 through R1. The output of transistor Q1 is coupled to the base of transistor Q2 through C. The
output of the monostable multivibrator is available at the collector terminal of either transistor.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 63 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tabulation:

Amplitude(v) Time period(ms)

Input
trigger T On =
T Off =

T On =
Output T Off =
square
wave

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 64 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Procedure

1. The circuit connections are given as per the circuit diagram.

2. The supply is switched ON.
3. The trigger pulse is given at the collector of T 1.The output is taken at the collector of
T2.Square wave is obtained.
4. The time period of TON and TOFF are calculated separately and the graph is drawn with
measured values.

Result

Thus the monostable multivibrator is designed to get a square wave and its TON and TOFF are
calculated and a graph is drawn

Output square wave

TON =
TOFF =

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 65 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SIMULATION USING SPICE

(Using Transistor)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 66 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Monostable Multivibrator
V1

15Vdc
0

R1 R2 R4
1k C1 10k C2 1k

.1uf 100pf
R6

10k
V

Q1 Q2

2N2222 V 2N2222
C3
0
.1uf 0
R3
47k
OFFTIME = .5mSDSTM1
ONTIME = .5mS CLK V2
DELAY = 0
STARTVAL = 0 2Vdc
OPPVAL = 1

Simulation OutPut

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 67 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

MONOSTABLE MULTIVIBRATOR WITH EMITTER TIMING AND BASE TIMING

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Monostable Multivibrator by using
ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do The Experiment: Orcad Capture

Procedure:

1. Start the program

2. Select the ORCAD release 9 capture CIS
3. Go to new and select project
4. Create the title of the project
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 68 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Thus the monostable multivibrator circuit was simulated using ORCAD capture and its output
waveform was obtained.

Bistable Multivibrator:

V1

R1 R4
15Vdc
2.2k C1 100pf C2 2.2k
0
R2 100pf
R6

15k
V 15k
Q1 Q2

QbreakN V R7 QbreakN
R3 100k
100k
0
0 V2

2Vdc
0
Dbreak D1 Dbreak D2 C3 V1 = 0
V2 = 5v
TD = 0
.01uf
TR = 0
V3 TF = 0
R8 PW = 5uc
1k PER = 10us

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 69 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

BISTABLE MULTIVIBRATOR:

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Bistable Multivibrator by using
ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: ORCAD Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 70 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Thus the Bistable Multivibrator circuit was simulated using ORCAD capture and its frequency
response was obtained.

Twin – T Oscillator:

V1

10Vdc

R2 0
3.3k

Q1

2N2222

C1 0
C2

.2uf .2uf
R3
1.8k

R1 R4

15k 15k
C3 V
.2uf

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 71 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

TWIN – T OSCILLATOR

Ex. No:
Date:

Aim:

To simulate and obtain the frequency response of second order Twin – T Oscillator by using ORCAD
capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: ORCAD Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 72 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Thus the Twin T Oscillator circuit was simulated using ORCAD capture and its frequency
response was obtained.

Wein Bridge Oscillator

V1

15Vdc
0

R13 R1 R7 R6 R10 R8
4.7k 10k 150k 1k 150k 1k
C3 C5

R3
22uf Q2 .1uf
1k
C1 Q1
2n Q2N3904 V
Q2N3904
R4 C2
R2 10k 2n R5
10k 10k
R12 R9 R11
47k 1k C4 10k
1uf

0 0

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 73 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

WEIN BRIDGE OSCILLATOR

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Wein Bridge Oscillator by using
ORCAD capture.

Facilities Required And Procedure

Facilities Required

To Do the Experiment: Orcad Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:
Thus the Wein Bridge Oscillator circuit was simulated using ORCAD capture and its
frequency response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 74 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Schmitt Trigger :

V1

15Vdc
0
R3 R2
6.8k 4.7k

R1 V

Q3
Q4 10k

V2 2N2222
VOFF = 0 V 2N2222
VAMPL = 10
FREQ = 5k
AC = 0

R5
1k R6
10k

0 0 0

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 75 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SCHMITT TRIGGER

Ex. No:
Date:

Aim:
To simulate and obtain the frequency responses of second order Schmitt Trigger by using ORCAD
capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: Orcad Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Schmitt Trigger circuit was simulated using ORCAD capture and its frequency
response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 76 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Tuned Collector Oscillator

V1
2

L1 7Vdc
1uH
0

2 2
1
R1 C3
14k 220pf
1
1 7.000V 0V
C5
1 2
Q1
1n
V

Q2N2222
2

C1
2 .026pf
1
L2 7.000V
.98mh
147.4mV
2 2 2 2
1 2 2
R6 R3 2.739V R4 R5
5k C2 9k 1k C4 10k 0V
6.3pf 40nf
1 1 1 1 1 1

13.46nV
0

Simulation Output:
0V

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 77 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

TUNED COLLECTOR OSCILLATOR

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Tuned Collector Oscillator by using
ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: ORCAD Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Tuned Collector Oscillator circuit was simulated using ORCAD capture and its frequency
response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 78 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Voltage Time Base Circuits

V1

15Vdc
0
R2 R3
33kk 33k

C1

.1uf
V
Q1 Q2
OFFTIME = .5mSDSTM1 R1
ONTIME = .5mS CLK
DELAY =
10k
STARTVAL = 0 V Q2N2222 Q2N2222
OPPVAL = 1

0 0

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 79 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

VOLTAGE TIME BASE CIRCUITS

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Voltage Time Base Circuits by
using ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: ORCAD Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Voltage Time Base Circuits was simulated using ORCAD capture and its frequency
response was obtained

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 80 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Current Time Base Circuits

V1

R1 D1N4002 D2 C1 12Vdc
1k
0
.01uf
R2
10k Q2

Q1
C2 Q2N2222
.01uf
V Q2N2222
V1 = 0 V2 V
V2 = 5v
TD = 0 R3 R4
TR = 0 1k 1k
TF = 0
PW = 5ms
PER = 10ms

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 81 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CURRENT TIME BASE CIRCUITS

Ex. No:
Date:

Aim:

To simulate and obtain the frequency response of second order Current Time Base Circuits by using
ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do The Experiment: Orcad Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Current Time Base Circuits was simulated using ORCAD capture and its frequency
response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 82 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Double Tuned Amplifier

R1 R2 R3
80k 20 10
C2
C1 L1 L2 700p
582p 210u 170u

V1
Q1
C4 15Vdc

100n
Q2N2222

V2
2Vac R4 R6
0Vdc 50k 150 C3
1uf

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 83 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DOUBLE TUNED AMPLIFIER

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Double Tuned Amplifier
by using ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do the Experiment: Orcad Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Double Tuned Amplifier circuit was simulated using ORCAD capture and its frequency
response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 84 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Stagger Tuned Amplifier

R1 R7
80k 80k
C2
C1 L1 L2 700p
582p 210u 170u

C5
V1
Q1 Q2
C4 15Vdc
10UF

100n
Q2N2222 Q2N2222

V2
2Vac R4 R6 R3 R8
0Vdc 50k 150 C3 50K 150 C6
10uf 10U

Simulation Output:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 85 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

STAGGER TUNED AMPLIFIER

Ex. No:
Date:

Aim:
To simulate and obtain the frequency response of second order Stagger Tuned Amplifier by using
ORCAD capture.

Facilities Required and Procedure

Facilities Required

To Do The Experiment: Orcad Capture

Procedure:

1. Start the program.

2. Select the ORCAD release 9 capture CIS.
3. Go to new and select project.
4. Create the title of the project.
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
7. Create the new simulation.
8. Set the output level setting.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.

Result:

Thus the Stagger Tuned Amplifier circuit was simulated using ORCAD capture and its frequency
response was obtained.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 86 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CIRCUIT DIAGRAM:

SINGLE INPUT BALANCED OUTPUT DIFFERENTIAL AMPLIFIER:

DIFFERENTIAL MODE:

MODEL GRAPH :
Amplitude

V01 output waveform

vpp
Time period

Amplitude
V02 output waveform

vpp

Time period

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 87 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Ex No: DIFFERENTIAL AMPLIFIER. USING BJT

AIM:

To construct a differential amplifier circuit for single input balanced output in the common mode and
differential mode configuration and study the output waveform and to find Common Mode Rejection Ratio
(CMRR).
APPARATUS REQUIRED:

ITEM RANGE QUANTITY

S. No
1 Transistors
2 Resistors
3 Capacitors
4 CRO
5 Function generator
6 Bread board
7 Power cord
8 Connecting wires

THEORY:
The Differential amplifier amplifies the difference between two input signals. The transistorized
differential amplifier consists of two ideal emitter biased circuits. The differential amplifier circuit is
obtained by connecting the two emitter terminals E 1 and E2. Hence RE is the parallel combination of RE1
and RE2. The output is taken between the two collector terminals C1 and C2.Hence we say this connection
as balanced output or double ended output. It works in two modes of operation.
Differential mode operation
In the differential mode operation two input signals (V 1 and V2) are different in magnitudes and
opposite in phase and it produces the difference between the two input signals (V1~V2). The differential
mode gain (AD) can be calculated by AD =Rc * β / 2* hie.
Common mode operation
In the common mode operation two input signals are same in magnitude and phase. At emitter resistance
RE both the input signal appears across RE and adds together since it just acts like an emitter follower.
Therefore, RE carries a signal current and provides a negative feedback. This feedback reduces the common
mode gain of the differential amplifier.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 88 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

The Common mode gain Ac can be calculated by |Ac| = Rc * β / hie + (2Re [1+ β] )

CIRCUIT DIAGRAM:

SINGLE INPUT
BALANCED
OUTPUT
DIFFERENTIAL
AMPLIFIER:
COMMON MODE:

MODEL GRAPH :
Amplitude

V01 output waveform

vpp
Time period

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 89 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Amplitude

V02 output waveform

vpp
Time period

CMRR
CMRR (Common Mode Rejection Ratio) is defined as the ratio of differential gain to common mode
gain. Ideally the CMRR should be infinity. CMRR = 20 log (AD / Ac)

PROCEDURE:
Differential mode configuration
1. Connections are given as per circuit diagram
2. Set Vs =50 mV, using signal generator
3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in regular steps
4. Observe both input and output on the CRO (sine wave)
5. The differential gain is calculated at mid frequency range where the magnitude of the sine wave is
maximum.
6. The differential gain is calculated by Ad = Vo / Vi
Common mode configuration
1. Connections are given as per circuit diagram
2. Set Vs =50 mV, using signal generator
3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in regular steps
4. Observe both input and output on the CRO (sine wave)
5. The common mode gain is calculated at mid frequency range where the magnitude of the sine wave
is maximum.
6. The Common mode gain is calculated by Ac = Vo / Vi
CMRR
1. CMRR is calculated by substituting the practical values of Ad and Ac in the formula
CMRR = 20 log (AD / Ac)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 90 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DESIGN PROCEDURE:
Design parameters
Vcc=12V, Vee = -12V, Ic1 = Ic1 = 2mA, Ie=4mA, hfe (β) =300, Vbe =0.7V, hie =4.7kΩ

To find Rc

Apply KVL to collector loop

Vcc-IcRc-Vce-IeRe – Vee =0
Rc = {Vcc- Vce - VRE - Vee }/ Ic
= {12-6 -1.2 –(-12)} /2x10-3
Rc = 8.7kΩ use approx 10 kΩ

To find Rc
Apply KVL to collector loop
Vcc-IcRc-Vce-IeRe – Vee =0 NOTE:
Re = {Vcc- VRC – Vce - Vee}/ Ie
= {12 - 4.8 – 6 – (-12)} /4x10-3 Vcc =12V
Re = 3.3 kΩ use approx 4.7kΩ VRE =10% of Vcc =0.1 * 12 = 1.2 V
VRC =40% of Vcc =0.4 * 12 = 4.8 V
VCE =50% of Vcc =0.5 * 12 = 6 V
Ic1 = Ic1 = 2mA
DESIGN PROCEDURE:

Design parameters.
==Vcc=12V, Vee = -12V, Ic1 = Ic1 = 2mA, Ie=4mA, hfe (β) =300, Vbe =0.7V, hie =4.7kΩ

To find Rc

Apply KVL to collector loop

Vcc-IcRc-Vce-IeRe – Vee =0
Rc = {Vcc- Vce - VRE - Vee }/ Ic
= {12-6 -1.2 –(-12)} /2x10-3

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 91 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Rc = 8.7kΩ use approx 10 kΩ

To find Rc
Apply KVL to collector loop
Vcc-IcRc-Vce-IeRe – Vee =0
Re = {Vcc- VRC – Vce - Vee}/ Ie
= {12 - 4.8 – 6 – (-12)} /4x10-3
Re = 3.3 kΩ use approx

Differential gain

AD =Rc * β / 2* hie
AD =8.7x103 * 300 / 2* 4.7 x103
AD = 265

Common mode gain

|Ac| = Rc * β / hie + (2Re [1+ β] )

Ac = 8.7kΩ * 300 / 4.7 kΩ + (2 * 3.3 kΩ [1+ 300] )
Ac = 1.2

CMRR
Theoretical CMRR = 20 log (AD / Ac)
= 20 log (265 / 1.2)
= 46

POSSIBLE VIVA QUESTIONS:

1. What are the two operation modes in differential amplifier?
2. What are the four configurations of differential amplifier?
3. Draw the dc transfer characteristics of differential amplifier.
4. Define CMRR
5. Give the expression for CMRR.

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 92 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

TABULATION:
(i) FOR DIFFERENTIAL MODE:

Input Output Overall Input Voltage Output Voltages Common

Voltages Voltages Mode
Vic=(VS1+VS2)/2 Volts VOC=(V02-V01)Volts
VS1 VS2 V01 V02 Gain(Ac)

(ii) FOR COMMON MODE:

Input Output Overall Input Voltage Output Voltages Common

Voltages Voltages Mode
Vic=(VS1+VS2)/2 Volts VOC=(V02-V01)Volts
VS1 VS2 V01 V02 Gain(Ac)

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 93 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

(iii) CMRR:

CMRR = 20 log (AD / Ac)

RESULT:

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 94 DEPARTMENT OF ECE

 KINGSTON ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Thus constructed a differential amplifier circuit for single input balanced output in the common
mode and differential mode configuration and studied the output waveform, also its CMRR has been
determined and verified practically.

Differential mode : _______________

Common mode : _______________

CMRR : _______________

EC3462 - LINEAR INTEGRATED CIRCUITS LAB 95 DEPARTMENT OF ECE