A7663E

Hardware Design
LTE Module

SIMCom Wireless Solutions Limited

SIMCom Headquarters Building, Building 3, No. 289 Linhong
Road, Changning District, Shanghai P.R. China
Tel: 86-21-31575100
support@simcom.com
www.simcom.com
 A7663E Hardware Design_V1.01

Document Title: A7663E Series Hardware Design

Version: V1.01
Date: 2024-06-04
Status: Released

GENERAL NOTES

SIMCOM OFFERS THIS INFORMATION AS A SERVICE TO ITS CUSTOMERS, TO SUPPORT

APPLICATION AND ENGINEERING EFFORTS THAT USE THE PRODUCTS DESIGNED BY SIMCOM.
THE INFORMATION PROVIDED IS BASED UPON REQUIREMENTS SPECIFICALLY PROVIDED TO
SIMCOM BY THE CUSTOMERS. SIMCOM HAS NOT UNDERTAKEN ANY INDEPENDENT SEARCH FOR
ADDITIONAL RELEVANT INFORMATION, INCLUDING ANY INFORMATION THAT MAY BE IN THE
CUSTOMER’S POSSESSION. FURTHERMORE, SYSTEM VALIDATION OF THIS PRODUCT DESIGNED
BY SIMCOM WITHIN A LARGER ELECTRONIC SYSTEM REMAINS THE RESPONSIBILITY OF THE
CUSTOMER OR THE CUSTOMER’S SYSTEM INTEGRATOR. ALL SPECIFICATIONS SUPPLIED
HEREIN ARE SUBJECT TO CHANGE.

COPYRIGHT

THIS DOCUMENT CONTAINS PROPRIETARY TECHNICAL INFORMATION WHICH IS THE PROPERTY

OF SIMCOM WIRELESS SOLUTIONS LIMITED COPYING, TO OTHERS AND USING THIS DOCUMENT,
ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY BY SIMCOM. OFFENDERS ARE LIABLE TO THE
PAYMENT OF INDEMNIFICATIONS. ALL RIGHTS RESERVED BY SIMCOM IN THE PROPRIETARY
TECHNICAL INFORMATION , INCLUDING BUT NOT LIMITED TO REGISTRATION GRANTING OF A
PATENT , A UTILITY MODEL OR DESIGN. ALL SPECIFICATION SUPPLIED HEREIN ARE SUBJECT TO
CHANGE WITHOUT NOTICE AT ANY TIME.

SIMCom Wireless Solutions Limited

SIMCom Headquarters Building, Building 3, No. 289 Linhong Road, Changning District, Shanghai P.R.
China
Tel: +86 21 31575100
Email: simcom@simcom.com

For more information, please visit:

https://www.simcom.com/download/list-863-en.html

For technical support, or to report documentation errors, please visit:

https://www.simcom.com/ask/or email to: support@simcom.com

Copyright © 2024 SIMCom Wireless Solutions Limited All Rights Reserved.

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 A7663E Hardware Design_V1.01

Version History

Date Version Description of change Author

Boru.Zhou
2024-03-06 1.00 Initial
Tanjun.Zhou
Update the block diagram(Figure 1);
Update the power-off and power-on restart
sequence(Figure 6);
Update the power on sequence(Figure 8);
2024-06-04 1.01 Update the power off timing sequence(Figure 9); Boru.Zhou
Update the reset timing sequence(Figure 11);
Add the reference design of level translator(Figure
14);
Add the RTC mode(Chapter 5.3.5).

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 A7663E Hardware Design_V1.01

Contents

1. Introduction .............................................................................................................................................. 9
Documentation Overview ................................................................................................................. 9
Product Outline .............................................................................................................................. 10
Hardware Interface Overview......................................................................................................... 12
Hardware Block Diagram ............................................................................................................... 13
Functional Overview....................................................................................................................... 13
2. Package Information .............................................................................................................................. 16
Pin Assignment Overview .............................................................................................................. 16
Pin Description ............................................................................................................................... 18
Mechanical Information .................................................................................................................. 25
3. Interface Application .............................................................................................................................. 26
Power Supply ................................................................................................................................. 26
3.1.1. Power Supply Design Guide ................................................................................................ 27
3.1.2. Recommended Power Supply Circuit .................................................................................. 28
3.1.3. Voltage Monitor .................................................................................................................... 29
Power On/ Off and Reset ............................................................................................................... 30
3.2.1. Power on .............................................................................................................................. 30
3.2.2. Power off .............................................................................................................................. 32
3.2.3. Reset Function ..................................................................................................................... 33
UART Interface .............................................................................................................................. 34
3.3.1. UART Design Guide ............................................................................................................ 36
3.3.2. RI Function Description ....................................................................................................... 38
3.3.3. DTR Function Description .................................................................................................... 38
USB Interface ................................................................................................................................. 39
3.4.1. USB Reference Design ........................................................................................................ 39
3.4.2. BOOT_CFG Interface .......................................................................................................... 41
USIM Interface ............................................................................................................................... 43
3.5.1. SIM Hot Swap Function ....................................................................................................... 44
3.5.2. SIM Application Guide ......................................................................................................... 45
SD/MMC Interface.......................................................................................................................... 46
Analog Audio Interface ................................................................................................................... 48
3.7.1. Analog Audio Input Interface ................................................................................................ 48
3.7.2. Analog Audio Output Interface ............................................................................................. 48
3.7.3. Analog Audio Electrical Characteristics ............................................................................... 49
3.7.4. Analog Audio Reference Design .......................................................................................... 49
I2C Interface................................................................................................................................... 50
GPIO Interface ............................................................................................................................... 51
STATUS Interface ........................................................................................................................ 51
NETLIGHT Interface ..................................................................................................................... 52
GNSS Interface ............................................................................................................................ 53
Other Interface ............................................................................................................................. 55

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3.13.1. ADC.................................................................................................................................... 55
3.13.2. VDD_EXT .......................................................................................................................... 55
3.13.3. ANT_CTRL......................................................................................................................... 57
4. RF Specifications ................................................................................................................................... 58
LTE Specifications .......................................................................................................................... 58
LTE Antenna Requirements ........................................................................................................... 59
GNSS Specifications ...................................................................................................................... 59
GNSS Antenna Requirements ....................................................................................................... 60
Antenna Reference Design ............................................................................................................ 61
4.5.1. Passive Antenna for LTE/GNSS .......................................................................................... 61
4.5.2. Active Antenna for GNSS ..................................................................................................... 62
PCB layout ..................................................................................................................................... 62
5. Electrical Specifications ........................................................................................................................ 64
Absolute maximum ratings ............................................................................................................. 64
Operating conditions ...................................................................................................................... 64
Operating Mode ............................................................................................................................. 65
5.3.1. Operating Mode Definition ................................................................................................... 65
5.3.2. Sleep mode .......................................................................................................................... 66
5.3.3. Minimum functionality mode and Flight mode ..................................................................... 67
5.3.4. PSM mode ........................................................................................................................... 68
5.3.5. RTC mode ............................................................................................................................ 68
Current Consumption of LTE Operation ......................................................................................... 69
Current Consumption of GNSS Operation ..................................................................................... 70
ESD Notes ..................................................................................................................................... 70
6. SMT Production Guide........................................................................................................................... 72
Top and Bottom View of the module .............................................................................................. 72
Label Information ........................................................................................................................... 73
Recommended PCB Footprint ....................................................................................................... 74
Recommended SMT Stencil .......................................................................................................... 75
Recommended reflow furnace temperature curve ......................................................................... 76
Moisture Sensitivity Level (MSL) .................................................................................................... 77
Baking Requirements ..................................................................................................................... 79
7. Packaging ............................................................................................................................................... 80
8. Appendix ................................................................................................................................................. 83
Coding Schemes and Maximum Net Data Rates over Air Interface .............................................. 83
Related Documents........................................................................................................................ 83
Terms and Abbreviations ................................................................................................................ 85
Safety Caution................................................................................................................................ 87

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Table Index

Table 1: Documents Overview........................................................................................................................ 9

Table 2: Module frequency bands ................................................................................................................ 10
Table 3: Overview of module functionality .................................................................................................... 10
Table 4: General features ............................................................................................................................. 13
Table 5: Pin Description................................................................................................................................ 17
Table 6: Pin parameter abbreviation............................................................................................................. 18
Table 7: 1.8V IO parameters definition ......................................................................................................... 18
Table 8: 3.0V IO parameters definition ......................................................................................................... 19
Table 9: Pin description ................................................................................................................................ 20
Table 10: Power interface pins definition ...................................................................................................... 26
Table 11: VBAT pins electronic characteristic ............................................................................................... 26
Table 12: TVS for VBAT part number list ...................................................................................................... 28
Table 13: PWRKEY interface pin definition .................................................................................................. 30
Table 14: Power on timing and electronic characteristic .............................................................................. 31
Table 15: Power off sequence parameters ................................................................................................... 33
Table 16: RESET interface pin definition ...................................................................................................... 33
Table 17: RESET pin electronic characteristic ............................................................................................. 34
Table 18: UART information ......................................................................................................................... 34
Table 19: UART interface pins definition ...................................................................................................... 35
Table 20: USB interface pins definition ........................................................................................................ 39
Table 21: TVS for USB part number list ....................................................................................................... 40
Table 22: BOOT_CFG interface pin definition .............................................................................................. 41
Table 23: USIM interface pins definition ....................................................................................................... 43
Table 24: USIM electronic characteristic in 1.8V mode (VSIM_VDD=1.8V) ...................................................... 44
Table 25: USIM electronic characteristic in 3.0V mode (VSIM_VDD=3V) ......................................................... 44
Table 26: TVS for USIM socket part number list .......................................................................................... 46
Table 27: SD/MMC interface pins definition ................................................................................................. 46
Table 28: SD/MMC interface electrical specifications .................................................................................. 47
Table 29: Analog audio MIC interface definition ........................................................................................... 48
Table 30: Analog audio output interface definition ........................................................................................ 48
Table 31: Analog audio output (AVDD_AUD=1.8V,T=25°C) ......................................................................... 49
Table 32: I2C interface pins definition .......................................................................................................... 50
Table 33: Standard GPIO Resources of the module .................................................................................... 51
Table 34: STATUS interface pin definition .................................................................................................... 51
Table 35: NETLIGHT interface pin definition ................................................................................................ 52
Table 36: LTE mode NETLIGHT pin status .................................................................................................. 53
Table 37: GNSS interface description .......................................................................................................... 54
Table 38: AT commands about GNSS .......................................................................................................... 54
Table 39: ADC interface pins definition ........................................................................................................ 55
Table 40: General ADC electronic characteristics ........................................................................................ 55
Table 41: VDD_EXT interface pin definition ................................................................................................. 56

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Table 42: VDD_EXT electrical characteristics .............................................................................................. 56

Table 43: TVS for VDD_EXT part number list .............................................................................................. 56
Table 44: ANT_CTRL interface pins definition.............................................................................................. 57
Table 45: Conducted transmission power .................................................................................................... 58
Table 46: E-UTRA operating bands .............................................................................................................. 58
Table 47: Conducted receive sensitivity ....................................................................................................... 58
Table 48: Reference sensitivity (QPSK) ....................................................................................................... 58
Table 49: LTE antenna requirements ........................................................................................................... 59
Table 50: GNSS operating bands ................................................................................................................. 59
Table 51: GNSS performance ...................................................................................................................... 60
Table 52: Recommended Antenna Characteristics (GNSS)......................................................................... 60
Table 53: TVS for RF main antenna part number list ................................................................................... 62
Table 54: TVS for GNSS antenna part number list....................................................................................... 62
Table 55: Absolute maximum ratings ........................................................................................................... 64
Table 56: Recommended operating ratings ................................................................................................. 64
Table 57: 1.8V Digital I/O characteristics* .................................................................................................... 64
Table 58: Operating temperature.................................................................................................................. 65
Table 59: Operating mode Definition ............................................................................................................ 66
Table 60: RTC characteristics ...................................................................................................................... 69
Table 61: Current consumption on VBAT Pins (VBAT=3.8V, GNSS off) ...................................................... 69
Table 62: VBAT current consumption during GNSS operation ..................................................................... 70
Table 63: The ESD performance measurement table (Temperature: 25℃, Humidity: 45%)........................ 71
Table 64: The description of label information .............................................................................................. 73
Table 65: The main board reflux temperature curve requirements (lead-free) ............................................. 76
Table 66: Moisture Sensitivity Level ............................................................................................................. 78
Table 67: Module baking requirements ........................................................................................................ 79
Table 68: Tray size ....................................................................................................................................... 81
Table 69: Small Carton size.......................................................................................................................... 81
Table 70: Big Carton size ............................................................................................................................. 82
Table 71: Coding Schemes and Maximum Net Data Rates over Air Interface ............................................. 83
Table 72: Related Documents ...................................................................................................................... 83
Table 73: Terms and Abbreviations .............................................................................................................. 85
Table 74: Safety Caution .............................................................................................................................. 87

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Figure Index

Figure 1: The block diagram......................................................................................................................... 13

Figure 2: Pin assignment overview .............................................................................................................. 16
Figure 3: Dimensions (Unit: mm).................................................................................................................. 25
Figure 4: Power supply application circuit .................................................................................................... 27
Figure 5: Power supply reference circuit ...................................................................................................... 29
Figure 6: Power-off and power-on restart sequence .................................................................................... 29
Figure 7: Reference power on/off circuit ...................................................................................................... 30
Figure 8: Power on sequence ...................................................................................................................... 31
Figure 9: Power off timing sequence ............................................................................................................ 32
Figure 10: Reference reset circuit ................................................................................................................ 33
Figure 11: Reset timing sequence ................................................................................................................ 34
Figure 12: Serial port connection diagram (Full-function mode) .................................................................. 36
Figure 13: Serial port connection diagram (NULL mode) ............................................................................. 36
Figure 14: The reference design of level translator ...................................................................................... 37
Figure 15: Triode level conversion circuit ..................................................................................................... 37
Figure 16: RI behaviour (SMS and URC report) .......................................................................................... 38
Figure 17: USB circuit diagram .................................................................................................................... 40
Figure 18: Reference BOOT_CFG circuit .................................................................................................... 42
Figure 19: The USB port .............................................................................................................................. 42
Figure 20: SIM interface reference circuit .................................................................................................... 45
Figure 21: SIM interface reference circuit (8PIN) ......................................................................................... 45
Figure 22: SD/MMC reference circuit ........................................................................................................... 47
Figure 23: Analog audio interface reference circuit ...................................................................................... 49
Figure 24: I2C reference circuit .................................................................................................................... 50
Figure 25: STATUS reference circuit ........................................................................................................... 52
Figure 26: NETLIGHT reference circuit ........................................................................................................ 53
Figure 27: VDD_EXT reference circuit ......................................................................................................... 56
Figure 28: Passive antenna reference ......................................................................................................... 61
Figure 29: Active antenna reference ............................................................................................................ 62
Figure 30: Reference PCB layout................................................................................................................. 63
Figure 31: RTC block diagram ..................................................................................................................... 68
Figure 32: Top and bottom view of the module ............................................................................................ 72
Figure 33: Label description of the module .................................................................................................. 73
Figure 34: Footprint recommendation (Unit: mm) ........................................................................................ 74
Figure 35: Recommended SMT stencil (Unit: mm) ...................................................................................... 75
Figure 36: Recommended reflow furnace temperature curve (lead-free) .................................................... 76
Figure 37: Humidity card .............................................................................................................................. 78
Figure 38: Packaging diagram ..................................................................................................................... 80
Figure 39: Tray drawing ............................................................................................................................... 80
Figure 40: Small carton drawing................................................................................................................... 81
Figure 41: Big carton drawing ...................................................................................................................... 81

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1. Introduction
This document describes the electronic specifications, RF specifications, interfaces, mechanical
characteristics, and test results of the module. With the help of this document, customers can quickly
understand the module.

Referring to other software application notes and user guides, customers can use the module to design
and develop applications easily. SIMCom provides a set of evaluation boards to test easily and develop
the module. The evaluation board tools include an EVB board, a USB cable, an antenna and other
peripherals.

Documentation Overview

The documents listed in Table 1 primarily cover the module's technical information. To thoroughly understand
the device and its application, it is necessary to study all relevant documents.

Table 1: Documents Overview

No. Document Description

Mainly introducing interface
functions, recommend circuit, PCB
A7663E_Hardware_Design
1 layout guidelines, packaging and
(This document)
other hardware components, as
well as the use of AT commands
2 SIMCom_A7663E Series_Reference_Design Reference circuit applications
3 8BAE00-A7682X-TE_V1.03_DL&PCB TE SCH&PCB PDF Document
SIMCOM_EVB SCH&PCB PDF
4 SIMCOM_EVB_DL&PCB
Document
5 MOD_A7663E_85 Reference Package (Pads)
6 A1602 & 1606_Series_AT_Command Manual AT Command Manual
Module Secondary SMT
7 Module Secondary SMT Process User Guide
Guidelines
The use of TE board, forced
download, startup, reset, and the
8 A7663X&A7682E&A7683X_TE kit_User Guide_V1.00 location of other measurement
points, as well as the use method
in conjunction with EVB
Peripheral circuit schematic and
9 A76XX_Series_CAT1_Module_Schematic&Layout_checklist
PCB checklist

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NOTE

This current revision is an early release to support initial product developers. The content is subject
to change without advance notice.

Product Outline

The module supports LTE-FDD. The supported radio frequency bands are described in the following table.

Table 2: Module frequency bands

Standard Frequency A7663E-MAXS

LTE-FDD B1 
LTE-FDD B3 
LTE-FDD B5 
LTE-FDD LTE-FDD B7 
LTE-FDD B8 
LTE-FDD B20 
LTE-FDD B28 
Category CAT1

Table 3: Overview of module functionality

A7663E Series
Function
MAXS
GNSS 
USIM 
MMC 
VoLTE 
SMS 
Analog audio input 
Analog audio output 
Wi-Fi Scan 
FOTA 

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With a small physical dimension of 19.6*19.6*2.4mm, the module can meet almost any space requirement
in customers’ applications, such as telematics, surveillance devices, industrial routers remote diagnostics,
etc.
The module provides 85 pins, including 50 LGA pins in the outer ring and 35 LGA pins in the inner ring. This
document will introduce all the functional pins.

NOTE

The functions supported by the module depend on the actual hardware model and software version.

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Hardware Interface Overview

The interfaces are described in detail in the following chapters, including:

● Power supply
● USB 2.0 interface
● Three UART interfaces, one full function serial port, one ordinary serial port and one debug serial port
● Two USIM interfaces
● I2C interface
● ADC interface
● General input and output interfaces (GPIOs)
● USB boot download and guidance interface
● Two audio interfaces, one MIC port and one Receiver port
● SD/MMC interface
● Module operation status indication interface
● Network status indication interface
● LTE and GNSS Antenna interface
● GNSS interface

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Hardware Block Diagram

The block diagram of the module is shown in the figure below.

Application processor PWR2

VBAT
RESET
PWRKEY
Control
PMU LTE MMPA TX
Tx DA
LDOs
RF Macro MAIN ANT
DUP/SAW TRX
VBAT
XO
Tx module
USB2.0
High speed RX
Interface Modem
AFE

Modem
baseband

low speed RTC GNSS ANT

USIM LDOs
Interface and (Option)
GPIOs

GNSS LNA SAW

VBAT Audio UART3

ADC×1 ADC Codec
ADC

A7663E Module
GNSS_UART

1PPS
RCV output

Figure 1: The block diagram

Functional Overview

Table 4: General features

Feature Implementation
Power supply VBAT: 3.4V~4.2V, Recommended VBAT: 3.8V
Current in Sleep mode@DRX=0.32S typical: 1.69mA
Current in Sleep mode@DRX=0.64S typical: 1.33mA
Power saving Current in Sleep mode@DRX=1.28S typical: 1.12mA
Current in Sleep mode@DRX=2.56S typical: 0.98mA
Current in PSM mode typical: 124uA

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Please refer to the table 61

Radio frequency bands Please refer to the table 2

Transmitting power LTE power level: 3 (23dBm±2.7dB)
Data Transmission Throughput TDD/FDD-LTE category 1 : 10 Mbps (DL), 5 Mbps (UL)
LTE antenna interface
Antenna
GNSS antenna interface (Option)
 MT,MO, CB, Text, PDU mode
 Short Message (SMS) storage device: USIM Card, CB does not
SMS
support saving in SIM Card
 Support CS and PS domain SMS

USIM interface Support identity card: 1.8V/ 3V

Support SAT class 3, GSM 11.14 Release 98
USIM application toolkit
Support USAT
Phonebook management Support phonebook types: SM/FD/ON/AP/SDN
SD/MMC interface Support SD3.0 and MMC/EMMC 4.5.1
Support analog audio input interface
Audio feature
Support analog audio output interface
Support I2C interface
I2C interface Comply with I2C bus protocol specification
Multi host mode not supported
 Full function serial port
Baud rate support from 300bps to 3686400bps
AT command and data can be sent through serial port
Support RTS/CTS hardware flow control
Support serial port multiplexing function conforming to GSM 07.10
UART interface protocol
 Debug serial port
Support debug function, the baud rate is 115200
 UART3 serial port
Ordinary two-wire serial port, default for GNSS transparent
transmission, the baud rate is 115200
Compliant with USB 2.0 specification and supports slave mode but
not master mode.
USB
This interface can be used for AT command sending, data
transmission, software debugging and upgrading.
Support GNSS function interface
GNSS interface  One GNSS UART interface
 One pulse synchronous clock signal interface
Firmware upgrade Firmware upgrade via USB/FOTA
Size: 19.6*19.6*2.4mm
Physical characteristics
Weight: 1.9g (Typical)
Normal operation temperature: -30°C to +75°C
Temperature range Extended operation temperature: -40°C to +85°C*
Storage temperature: -45°C to +90°C

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NOTE

When the module is within the extended operation temperature range, module is able to establish and
maintain data transmission, SMS, etc. The performance may deviate slightly from the 3GPP specifications,
but will meet 3GPP specifications again when the temperature returns to normal operating temperature
levels. It is strongly recommended that customers take heat dissipation measures to ensure that the
normal operating temperature of the module can't be exceeded.

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2. Package Information

Pin Assignment Overview

The following figure is a top view of the pin assignment of the module.
84 DEBUG_RXD
85 DEBUG_TXD

82 BOOT_CFG
41 NETLIGHT

40 VDD_EXT

39 PWRKEY
42 STATUS

83 RESET
35 VBAT

34 VBAT
37 GND

36 GND
38 ADC

23.50 23.50 23.50 23.50 23.50 23.50

09 09 09 09 09 09
68 GNSS_ANT

64 I2C_SDA
65 I2C_SCL
67 GND

66 GND

63 GND

UART1_TXD 1 33 GND

23.50
UART1_RXD 2 32 ANT_MAIN

09
UART1_RTS 3 31 GND
NC 43

UART1_CTS 4 69 76 75 30 GND
NC 44
GND GND GND

23.50
UART1_DCD 5

09
29 NC
GND 45
62 GNSS_RXD
23.50

UART1_DTR 6 28 NC
09

MCCA3 46
70 77 74
UART1_RI 7 61 GNSS_TXD 27 GND
GND GND GND
MCCA2 47
GND 8 26 USB_DM
60 1PPS

MCCA1 48
MICP 9 25 USB_DP
59 NC
71 72 73
MCCA0 49 GND GND GND
MICN 10 24 USB_VBUS
58 GPIO2
MCCLK 50
SPK1P 11 23 UART3_RXD

SPK1N 12 22 UART3_TXD
SIM2_DATA 53

SIM2_VDD 56

GPIO1 57
SIM2_CLK 54
MCCMD 51

SIM2_DET 52

SIM2_RST 55

23.50
09
GPIO3 78

GPIO4 79

GND 13

SIM1_DET 14

SIM1_DATA 15

SIM1_CLK 16

SIM1_RST 17

SIM1_VDD 18

GND 19

NC 20

GND 21

GPIO6 81

GPIO5 80

VBAT GPIO SIM card MMC GNSS

USB UART GND I2C Audio

Figure 2: Pin assignment overview

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Table 5: Pin Description

PIN NO PIN NAME PIN NO PIN NAME

1 UART1_TXD 2 UART1_RXD
3 UART1_RTS 4 UART1_CTS
5 UART1_DCD 6 UART1_DTR
7 UART1_RI 8 GND
9 MICP 10 MICN
11 SPK1P 12 SPK1N
13 GND 14 SIM1_DET
15 SIM1_DATA 16 SIM1_CLK
17 SIM1_RTS 18 SIM1_VDD
19 GND 20 NC
21 GND 22 UART3_TXD
23 UART3_RXD 24 USB_VBUS
25 USB_DP 26 USB_DM
27 GND 28 NC
29 NC 30 GND
31 GND 32 ANT_MAIN
33 GND 34 VBAT
35 VBAT 36 GND
37 GND 38 ADC
39 PWRKEY 40 VDD_EXT
41 NETLIGHT 42 STATUS
43 NC 44 NC
45 GND 46 MCCA3
47 MCCA2 48 MCCA1
49 MCCA0 50 MCCLK
51 MCCMD 52 SIM2_DET
53 SIM2_DATA 54 SIM2_CLK
55 SIM2_RST 56 SIM2_VDD
57 GPIO1 58 GPIO2
59 NC 60 1PPS
61 GNSS_TXD 62 GNSS_RXD
63 GND 64 I2C_SDA
65 I2C_SCL 66 GND
67 GND 68 GNSS_ANT
69 GND 70 GND
71 GND 72 GND
73 GND 74 GND

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75 GND 76 GND
77 GND 78 GPIO3
79 GPIO4 80 GPIO5
81 GPIO6 82 BOOT_CFG●
83 RESET 84 DEBUG_RXD
85 DEBUG_TXD

NOTE

'●' Indicates that the pin cannot be pulled down before the module powered down. Otherwise, it will affect
the normal start-up of the module.
NC: NOT CONNECT. Do not connect them to GND.

Pin Description

Table 6: Pin parameter abbreviation

Pin type Description

PI Power input
PO Power output
AI Analog input
AIO Analog input/output
I/O Bidirectional input /output
DI Digital input
DO Digital output
DOH Digital output with high level
DOL Digital output with low level
PU Pull up
PD Pull down
OD Open Drain

Table 7: 1.8V IO parameters definition

Power
Parameter Description Min Typ. Max
Domain
VIH High level input VCC * 0.7 1.8V VCC+0.2

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VIL Low level input -0.3V 0V VCC *0.3

Rpu Pull up resistor 55KΩ 79KΩ 121KΩ
Rpd Pull down resistor 51KΩ 87KΩ 169 KΩ
IIL Input leakage current - - 10uA
VOH High level output range VCC-0.2 - -
1.8V
VOL Low level output range - - 0.2V
Maximum current driving
capacity at low level
output
Vpad=0.2V
IOL Iol DCS[1:0]=
00 13 mA
01 25 mA
10 37 mA
11 49 mA
Maximum current driving
capacity at high level
output
Vpad=VCC-0.2V
IOH Ioh DCS[1:0]=
00 11 mA
01 21 mA
10 32 mA
11 42 mA

Table 8: 3.0V IO parameters definition

Power
Parameter Description Min. Typ. Max.
Domain
VIH High level input 2V - VCC+0.3
VIL Low level input -0.3V 0V 0.8V
Rpu Pull up resistor 26KΩ 47KΩ 72KΩ
Rpd Pull down resistor 27KΩ 54KΩ 267KΩ
IIL Input leakage current - - 10uA
VOH High level output range 2.4V - -
VOL Low level output range - - 0.4V
3.0V
Maximum current
driving capacity at low
level output
Vpad=0.4V
LOL
Iol DS[2:0]=
000 7 mA
001 10 mA
010 14 mA

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011 18 mA
100 21 mA
101 24 mA
110 28 mA
111 31 mA
Maximum current
driving capacity at high
level output
Vpad=VCC-0.5V
Ioh DS[2:0]=
000 7 mA
001 10 mA
LOH
010 13 mA
011 16 mA
100 19 mA
101 23 mA
110 26 mA
111 29 mA

Table 9: Pin description

Pin parameter
Pin name Pin No. Description Note
Power
Type
domain
Power supply
Module input
voltage ranges
from 3.4V to 4.2V,
typical value is
3.8V, and the
VBAT 34,35 - PI Module power input
external power
supply must
provide 1A
continuous
current.
V(nom)=1.8V
VDD_EXT 40 - PO Internal power output
Io(max)=50mA
8,13,
19,21,
27,30,
31,33,
GND - - Ground
36,37,
45,63,
66,67,
69,70,

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71,72,
73,74,
75,76,
77
System Control
Default high
VIH: 0.7*VBAT
System power on/off VIL: 0.3*VBAT
PWRKEY 39 - DI,PU control input, active PMU has been
low. internally pulled up
to the VBAT with
50K (Typical).
Default high
VIH: 0.7*VBAT
VIL: 0.3*VBAT
System reset control
RESET 83 - DI,PU PMU has been
input, active low.
internally pulled up
to the VBAT with
50K (Typical).
USIM interface
It can be set to
high/low active
SIM1 card insert
SIM1_DET 14 1.8V DI with the AT
detect.
command, refer to
Document [18].
This pin has been
pull-up with 4.7KΩ
SIM1_DATA 15 1.8/3.0V DIO SIM1 data signal. resistor to
SIM1_VDD
internally.
SIM1_CLK 16 1.8/3.0V DO SIM1 clock signal.
SIM1_RST 17 1.8/3.0V DO SIM1 reset signal.
The voltage can
be dynamically
changed
SIM1 card power according to the
SIM1_VDD 18 1.8/3.0V PO
supply output. type of external
card, output
current maximum
50mA.
It can be set to
high/low active
SIM2 card insert
SIM2_DET 52 1.8V DI with the AT
detect.
command, refer to
Document [18].

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This pin has been

pull-up with 4.7KΩ
SIM2_DATA 53 1.8/3.0V DIO SIM2 data signal. resistor to
SIM2_VDD
internally.
SIM2_CLK 54 1.8/3.0V DO SIM2 clock signal.
SIM2_RST 55 1.8/3.0V DO SIM2 reset signal.
The voltage can
be dynamically
changed
SIM2 card power according to the
SIM2_VDD 56 1.8/3.0V PO
supply output. type of external
card, output
current maximum
50mA.
USB interface
Valid USB detection
input. Active high,
VBUS 24 - PI
Vmin=3.0V, Vmax=5.2V,
Vnorm=5V.
Negative electrode of
the differential, bi-
USB_DM 26 - AIO
directional USB
signal.
Positive electrode of
the differential, bi-
USB_DP 25 - AIO
directional USB
signal.
Full function UART interface
UART1_TXD 1 1.8V DOH Data output
UART1_RXD 2 1.8V DI Data input
UART1_RTS 3 1.8V DI DTE request sent
If unused, keep it
UART1_CTS 4 1.8V DO DTE clears sending
open.
UART1_DCD 5 1.8V DO Carrier detection
UART1_DTR 6 1.8V DI DTE Ready
UART1_RI 7 1.8V DO Ringing indicator
Debug UART
DEBUG_RXD 84 1.8V DI Debug UART, the
Default used as
boot log will be output
DEBUG_TXD 85 1.8V DOH debug port.
during boot up.
Serial Port UART3
UART3_TXD 22 1.8V DO Data output

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Default for GNSS

UART3_RXD 23 1.8V DI Data input transparent
transmission.
SD/MMC interface
MCCA3 46 1.8/3.0V IO SD and MMC data
MCCA2 47 1.8/3.0V IO SD and MMC data
MCCA1 48 1.8/3.0V IO SD and MMC data
If unused, keep it
MCCA0 49 1.8/3.0V IO SD and MMC data
open.
MCCLK 50 1.8/3.0V DO SD and MMC clock
SD and MMC
MCCMD 51 1.8/3.0V IO
command
I2C interface
I2C_SCL 65 1.8V OD I2C clock output If unused, keep it
open. Need pull up
I2C_SDA 64 1.8V OD I2C data I/O to VDD_EXT.
Analog audio interface
MICP 9 - AI MIC input positive
MICN 10 - AI MIC input negative
If unused, keep it
Audio receiver output
SPK1P 11 - AO open.
positive
Audio receiver output
SPK1N 12 - AO
negative
GPIO
If unused, keep it
GPIO1 57 1.8V IO,PD General purpose I/O
open.
If unused, keep it
GPIO2 58 1.8V IO,PD General purpose I/O
open.
If unused, keep it
GPIO3 78 1.8V IO,PD General purpose I/O
open.
If unused, keep it
GPIO4 79 1.8V IO,PD General purpose I/O
open.
If unused, keep it
GPIO5 80 1.8V IO,PD General purpose I/O
open.
If unused, keep it
GPIO6 81 1.8V IO,PD General purpose I/O
open.
GNSS interface
1PPS pulse signal If unused, keep it
1PPS 60 1.8V DO
output open.
GNSS_TXD 61 1.8V DO GNSS UART TX The GNSS serial
port has been
GNSS_RXD 62 1.8V DI GNSS UART RX connected to
UART3.
ANT interface
ANT_MAIN 32 - AIO Main antenna

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GNSS_ANT 68 - AIO GNSS antenna

Other pins
General Purpose Voltage input
ADC 38 - AI
ADC range 0-1.2 V.
Network registration
If unused, keep it
NETLIGHT 41 1.8V DO status indicator
open.
(LED).
Module status If unused, keep it
STATUS 42 1.8V DO
indicator (LED). open.
Firmware download It is recommended
guide control input. to place a test
When pull-down to point for easy
BOOT_CFG 82 1.8V DI GND and press debugging and
PWRKEY, module upgrade. Do not
will access in USB pull down before
download mode. normal boot.

NOTE

1. Please reserve a test point for BOOT_CFG, GND, DEBUG_TXD and VDD_EXT. If there is no USB
connector, please also reserve a test point for USB_VBUS, USB_DP, and USB_DN for firmware
upgrading.
2. '●' Indicates that the pin cannot be pulled down before the module powered on. Otherwise, it will affect
the normal start-up of the module.

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Mechanical Information

The following figure shows the package outline drawing of the module.

Figure 3: Dimensions (Unit: mm)

NOTE

The side length dimension is 19.60*19.60±0.15mm excluding the burr area.

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3. Interface Application

Power Supply

The module offers 2 power supply pins (34, 35) as VBAT power input pin. The module supplies power to the
internal RF and baseband circuits through these two pins.

When the module is transmitting at maximum power in LTE mode, the current can reach up to a peak
current, please ensure that the external power supply capacity is no less than 1A.

Table 10: Power interface pins definition

Pin name Pin No. Type Description Note

The input voltage range is
3.4V~4.2V, and the external power
VBAT 34,35 PI Module power input
supply needs to provide a current
carrying capacity of 1A.
GND 8,13,19,21,27,30,31,33,36,37,45,63,66,67,69,70,71,72,73,74,75,76,77

Table 11: VBAT pins electronic characteristic

Parameter Description Min. Typ. Max. Unit

VBAT Module supply voltage 3.4 3.8 4.2 V
IVBAT (peak) Module consumption peak current - - 700 mA
IVBAT (IDLE) Module average consumption current (IDLE mode) - 11 - mA
Current in Sleep mode@DRX=0.32S - 1.69 - mA
Current in Sleep mode@DRX=0.64S - 1.33 - mA
IVBAT (sleep)
Current in Sleep mode@DRX=1.28S - 1.12 - mA
Current in Sleep mode@DRX=2.56S - 0.98 - mA
IVBAT (PSM) Current in PSM mode - 124 - uA
Module average consumption current (off leakage
IVBAT (power-off) - 13 - uA
current)

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NOTE

Test condition: VBAT power supply 3.8V, the module is tested on EVB board, and the power input has a
200uF tantalum capacitor.

3.1.1. Power Supply Design Guide

In the customer's design, special attention must be paid to the design of the power supply. If the voltage
drops below 3.4V, the RF performance of the module will be affected, the module will shut down if the
voltage is too low. It is recommended to select an LDO or DC-DC chip with an enable pin, and the enable
pin is controlled by the MCU.

NOTE

When the power supply can provide a continuous current of 1A, the total capacity of the external power
supply capacitor is recommended to be no less than 200uF.

It is recommended to place four 10pF/33pF/0.1uF/1uF ceramic capacitors near VBAT to improve RF

performance and system stability. At the same time, it is recommended that the VBAT layout routing width
from the power supply on the PCB to the module be at least 2mm.The recommended reference design is as
follows:

FB VBAT
VBAT
VBAT
Cf Ce Cd Cc Cb Ca TVS
VBAT 10pF 33pF 0.1uF 1uF 100uF 100uF
GND
Module

Figure 4: Power supply application circuit

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If the VBAT input contains high-frequency interference, it is recommended to add magnetic beads for filtering.
The recommended types of magnetic beads are BLM21PG300SN1D and MPZ2012S221A.

In addition, in order to prevent the damage of the module caused by surge and overvoltage, it is
recommended to parallel one TVS on the VBAT pin of the module.

Table 12: TVS for VBAT part number list

Manufacturer Part Number VRWM VC(Max) PPP(Max) CJ(Max) Package

WILL ESD56301D05-2/TR 5V 9.5V 1500W 700pF DFN1610-2L
WILL ESD56301D04-2/TR 4.85V 11V 2000W 480pF DFN1610-2L
WAYON WS2057KP 5V 12V 2040W 700pF DFN1610-2L
WAYON WS4.5DPHXM 4.85V 11V 2255W 700pF DFN1610-2L

NOTE

When selecting TVS by customers, it is necessary to pay attention to the clamping voltage in the case of
surge protection. The clamping voltage should not be higher than 10V when 100V surge input.

3.1.2. Recommended Power Supply Circuit

In order to avoid damaging the module, please do not cut off the power supply when module works normally.
Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off.

It is suggested that customer's design should have the ability to cut off the power supply for module in
abnormal state, and then switch on the power supply to restart the module.

When the input power is greater than 5V, it is recommended to use DCDC chip. When the input is less than
5V, use the LDO power supply. If the OPEN LINUX secondary development function of the module is used,
since there is no MCU, a low-cost MCU can be added to play the role of the hardware watchdog that can
pull PWRKEY to start up and power off.

It is recommended that a switching mode power supply is used. The following figure shows the DC-DC
regulator reference circuit:

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UPZ1608E300-5R0TF

30ohm@100MHz
DC input L101 VBAT

Fuse U1 4 5 3.3UH FB1

C1 C2 C3 C4 6 C5 C8 C9
R3 C6
10uF 100nF
IN LX BS
10uF 10uF 100nF 160K 1%
100pF 22uF 10uF
SY8105IADC

2 1
EN GND FB R4
30K 1%
PWR_CTRL 3

Figure 5: Power supply reference circuit

When the VBAT power is turned off, the voltage should decrease rapidly within 50ms. To avoid voltage
anomalies, when the VBAT is lower than the minimum value, the system must power on the VBAT at a
voltage which lower than 100mV for at least 2 second to restart the system.

<50ms <50ms
Less than
VBAT 100mV 2s

Power on
PWRKEY 50ms

UART available not available available

Figure 6: Power-off and power-on restart sequence

3.1.3. Voltage Monitor

AT command ‘AT+CBC’ can be used to monitor VBAT voltage.

AT command ‘AT+CVALARM’ can be used to set high/low voltage alarm, when the actual voltage exceeds
the preset range, a warning message will be reported through the AT port.

AT command ‘AT+CPMVT’ can be used to set high/low voltage power off, when the actual voltage exceeds
the preset range, the module will shut down automatically.

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NOTE

Overvoltage alarm and overvoltage shutdown are off by default. For details of AT commands, please refer
to document [1].

Power On/ Off and Reset

3.2.1. Power on

Table 13: PWRKEY interface pin definition

Pin name Pin No. Type Description Note

System power on/off It has been internally pulled up
PWRKEY 39 DI,PU
control input, active low. to the VBAT with 50K (Typical).

Customer can power on the module by pulling down the PWRKEY pin. It is recommended to add TVS
diode near the module pin for ESD performance. The recommended circuit is as follows:

Module
PWRKEY default high VBAT

50K
PWRKEY
impulse Power
1K PWRKEY on/off Logic
4.7K

47K

Figure 7: Reference power on/off circuit

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NOTE

1. It is forbidden to pull down both RESET and PWRKEY to power on the module at the same time.
2. If the customer does not need to start the PWRKEY automatically, do not connect a capacitor larger
than 10pF on the PWRKEY and RESET. Otherwise, the module will start automatically if the low level is
detected during the power-on.

VBAT Ton(wait)

Ton
PWRKEY

RESET
Ton(VDD_EX T)
VDD_EXT
Ton(USB)
USB Undefined Active

Ton(UART)

UART Undefined Act ive

Ton(STAT US)
STATUS

Figure 8: Power on sequence

Table 14: Power on timing and electronic characteristic

Symbol Parameter Min. Typ. Max. Unit

The time from VBAT power-on stabilization to
Ton(wait) 40 - - ms
PWRKEY pin pull-down validity
The time of active low-level impulse of PWRKEY pin
Ton 50 - - ms
to power on module
Ton(VDD_EXT) Output time of VDD_EXT - 10 - ms
Ton(USB) The time from power-on issue to USB port ready - 9 - s
Ton(UART) The time from power-on issue to UART port ready - 8 - s
The time from power-on issue to STATUS pin output
Ton(STATUS) - 7 - s
high level (indicating power up ready)
VIH Input high level voltage on PWRKEY pin 0.7*VBAT - VBAT V
VIL Input low level voltage on PWRKEY pin 0 0 0.3*VBAT V

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3.2.2. Power off

The following methods can be used to power off the module.

● Power off by pulling the PWRKEY pin down to a low level for 2.5s.
● Power off Module by AT command ‘AT+CPOF’.
● Over-voltage or under-voltage automatic power off, the voltage range can be set by ‘AT+CPMVT’.
● Over-temperature or under-temperature automatic power off.

It is strongly recommended that the customer use PWRKEY or ‘AT+CPOF’ to shut down, and then cut off
VBAT (especially when the module does not need to work). In addition, the customer cannot shut down
VBAT by disconnecting it, which may cause damage to flash.

NOTE

When the temperature exceeds the range of - 30 ~ + 75 ℃, the module will report warning information
through AT port. When the temperature exceeds the range of - 40 ~ + 85 ℃, the module will shut down
automatically. For a detailed description of ‘AT+ CPOF’ and ‘AT+ CPMVT’, please refer to document [1].

PWRKEY can be used to power off the module. For power off sequence, please see the following figure:

VBAT

Toff-on
Toff Ton

PWRKEY

STATUS
Toff(STATUS)

VDD_EXT
Toff(VDD_EXT)

UART Active Power-off program Undefined

USB Active Power-off program Undefined

Figure 9: Power off timing sequence

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Table 15: Power off sequence parameters

Symbol Parameter Min. Typ. Max. Unit

Toff Power off low level pulse width 2.5 - - s
Toff(VDD_EXT) VDD_EXT shutdown time - 2.5 - s
Power off time (according to status
Toff(status) - 2.5 - s
interface)
Toff-on Power off - power on buffer time 2 - - s

NOTE

The status pin can be used to judge whether the module is powered on or not. When the module is
powered on and initialization is completed, the status outputs a high level. Otherwise, the low level will be
maintained all the time.

3.2.3. Reset Function

Table 16: RESET interface pin definition

Pin name Pin No. Type Description Note

System reset control input, It has been internally pulled up
RESET 83 DI,PU
active low. to the VBAT with 50K (Typical).

The module can be reset by pulling down the reset pin to a low level. It is recommended to add TVS diode
near the module pin for ESD performance. The recommended circuit is shown as follows:

Module
VBAT

Treset 50K
Reset impulse Reset Logic
1K RESET
4.7K

47K

Figure 10: Reference reset circuit

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VBAT

TRESET
RESET

Module
status Active Reset program Restart

Figure 11: Reset timing sequence

Table 17: RESET pin electronic characteristic

Symbol Description Min. Typ. Max. Unit

The active low level time impulse on RESET pin to
TRESET 2 2.5 - s
reset module
VIH Input high level voltage 0.7*VBAT - VBAT V
VIL Input low level voltage 0 0 0.3*VBAT V

NOTE

1. It is recommended to use the reset pin only in case of emergency, such as the module is not responding.
The reset time is recommended to be 2.5s.
2. Do not connect a capacitor larger than 10pF on the PWRKEY and RESET. Otherwise, the module will
start automatically if the low level is detected during the power-on.

UART Interface

The module provides three serial ports, one main communication serial port (UART1), one ordinary serial
port (UART3), and one debug UART (DEBUG_UART) dedicate to print log.

Table 18: UART information

Default Baud
Interface Support Baud Rate (bps) Function Description
Rate (bps)
Full function 300 600 1200 2400 4800 9600 19200 115200 Data transmission and AT

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UART 38400 57600 115200 230400 460800 command transmission.

921600 1842000 and 3686400
Debug UART 115200 115200 Module partial log output.
Default for GNSS
Two-wire UART 115200 115200
transparent transmission.

Table 19: UART interface pins definition

Power
Pin name No. Type Description Note
domain
Full function UART interface
UART1_TXD 1 1.8V DOH Data output
If unused, keep it open.
UART1_RXD 2 1.8V DI Data input
Connect to the RTS of
UART1_RTS 3 1.8V DI DTE request sent DTE.
If unused, keep it open.
Connect to the CTS of
UART1_CTS 4 1.8V DO DTE clears sending DTE.
If unused, keep it open.
UART1_DCD 5 1.8V DO Carrier detection
UART1_DTR 6 1.8V DI DTE Ready If unused, keep it open.
UART1_RI 7 1.8V DO Ringing indicator
Debug UART
DEBUG_TXD 85 1.8V DOH Debug UART, the
Default used as debug
boot log will be output
DEBUG_RXD 84 1.8V DI port.
during boot up.
UART3
UART3_TXD 22 1.8V DOH Data output Default for GNSS
transparent
UART3_RXD 23 1.8V DI Data input
transmission.

NOTE

In order to ensure the stability of UART data transmission, it is recommended that the baud rate of the
serial port should not exceed 38400bps when the continuous transmission is set (without inserting delay)
and the flow control function is not enabled. When the baud rate does not exceed 460800bps, it is
recommended to insert 50ms delay for every 256 bytes sent, and whether to add flow control can be
decided according to requirements. When the baud rate is greater than or equal to 921600bps, it is
recommended to insert 50ms delay for every 256 bytes sent, and adopt UART hardware flow control
design.

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3.3.1. UART Design Guide

When customer uses full-function serial port, please refer to the following connection mode:

MODULE (DCE) HOST (DTE)

Serial port Serial port
100R
TXD RXD
100R
RXD TXD
RTS RTS
CTS CTS
DTR DTR
DCD DCD

RI RING

Figure 12: Serial port connection diagram (Full-function mode)

When using 2-wire serial port, please refer to the following connection mode:

MODULE (DCE) HOST(DTE)

100R
TXD RXD
100R
RXD TXD
RTS RTS
UART UART
CTS CTS

Figure 13: Serial port connection diagram (NULL mode)

When the level translator chip is used to connect the module and the host (the interface level does not
match), the reference design is shown as followed.

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VDD_EXT
MODULE (DCE) HOST (DTE)
Translator
VCCA VCCB VDD
0.1uF 0.1uF
GND OE

TXD A1 B1 RXD
RXD A2 B2 TXD
RI A3 B3 GPIO

GND GND

Figure 14: The reference design of level translator

The following figure shows the use of triode for level shifter circuits. Please pay special attention to the
direction of signal. The recommended triode model is MMBT3904.

VDD_EXT

VIO_MCU
4.7K
1nF

470pF_NM

1K~4.7K

MODULE HOST
100R
TXD MCU_RXD
100R
RXD MCU_TXD
1K~4.7K

4.7K

1nF

VDD_EXT
CTS CTS

RTS RTS
GPIO GPIO

GND GND

Figure 15: Triode level conversion circuit

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NOTE

1. The parasitic capacitance of the transistor will affect the edge of the high-speed digital signal. It is not
recommended to use this circuit when the signal speed is higher than 115200bps.
2. It is recommended that the TXD and RXD are connected with 100R resistors in series on the module
end to prevent damage to module pins caused by static electricity or surge.

3.3.2. RI Function Description

RI usually keeps high level output. When receiving a short message or URC report, RI outputs a low level
for 120ms (short message)/60ms (URC), and then returns to a high-level state.
RI will continues to output a 5.9s (high level)/100ms (low level), when receiving a phone call as the called
party. Until the host accepts the call with the "ATA" command, or the caller stops the call, the RI will resume
holding the high output after the next 100ms high level.

RI 120ms/60ms low voltage

Idle output when receiving
High level SMS /any URC report.

Low level

RI 100ms incoming voice call only. Clear by end the call or

5.9s
Idle answer.
Hign level

Low level
Figure 16: RI behaviour (SMS and URC report)

3.3.3. DTR Function Description

The DTR can be used as the sleep-wake pin of the module. After the module enters sleep mode, pull down
the DTR to wake up the module. DTR defaults to high level.

When the customers set "AT+CSCLK=1", the module will automatically enter sleep mode. After entering
sleep mode, the serial port function cannot communicate normally, and external pulling down the DTR can
wake up the module.

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After setting the AT command “AT+CSCLK=0”, pulling the DTR pin to a high level will not have any effect,
and the normal communication of the serial port function will not be affected.

USB Interface

The module contains a USB interface, which complies with the USB2.0 specification as a peripheral, but
does not support USB charging function and USB HOST mode.

USB supports high speed mode (480Mbps) and full speed mode (12Mbps), it is used for AT command
communication, data transmission, firmware upgrade and software debugging.

Table 20: USB interface pins definition

Power
Pin name No. Type Description Note
domain
Valid USB detection input. Active high,
VBUS 24 - PI
Vmin=3.0V, Vmax=5.2V, Vnorm=5.0V.
Positive electrode of the differential, bi-
USB_DP 25 - AIO
directional USB signal.
Negative electrode of the differential,
USB_DM 26 - AIO
bi-directional USB signal.

3.4.1. USB Reference Design

USB is the main debugging port and software upgrade interface. It is recommended that customers reserve
USB test points for debugging during design. If a main control chip is connected, 0R resistors must be
reserved for switching external test points during design. The recommended reference design is as follows:

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The branch wiring should not exceed 2mm

USB_VBUS
Module 0R_NM
Host
0R_NM Tes t point

USB_VBUS

USB_DN 0R D-

USB_DP 0R D+
Place close to the module
GND GND

D3 D1 D2

Figure 17: USB circuit diagram

Customers should pay attention to the selection of D3 devices. It is recommended to choose anti-static and
anti-surge two-in-one devices, and one TVS tube can be placed, recommended model AZ9707-01F. D+/D-
trace impedance is controlled according to 90Ω and covered with ground; D1/D2 select TVS tube with
capacitance value <1pf, and they should be placed near the USB connector or test point, recommended
models ESD73131CZ and ESD9L5.0ST5G.
USB_VBUS is the USB detection pin for module, it's active high and the available identification voltage is
3.0V~5.2V, generally recommend to connect to the VBUS signal of external USB connector or of MCU, it
also can be connected to other power supplies, such as the VBAT. If the USB_VBUS pin is connected to the
power supply, it's recommended to reserve a switch circuit to ensure that the power supply can be turned
off then turn it on, that make USB enumerating afresh.

Table 21: TVS for USB part number list

Manufacturer Part Number VRWM VC(Max) CJ(Max) Package

WILL ESD73131CZ-2/TR 5V 6.5V 0.45pF DWN0603-2L
ON ESD9L5.0ST5G 5V 9.8V 0.9pF SOD-923
NXP PESD5V0F1BSF 5V 10V 0.3pF DSN0603-2
AMAZING AZ9707-01F 7V 12.5V 950pF DFN1610

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NOTE

1. The USB data cable must be strictly routed in 90Ω differential. The TVS devices D1 and D2 on the data
line must be selected with equivalent capacitance less than 1pF. TVS should be placed near USB
connectors or test points, and the recommended models are ESD73131CZ, ESD9L5.0ST5G, or
PESD5V0F1BSF.
2. Route away from other sensitive signals (RF, audio, and XO).
3. The USB 2.0 speed detection is automatically determined through the USB protocol. Customer does
not need to additionally pull up the DP. Otherwise, it may affect the USB enumeration of the module.

3.4.2. BOOT_CFG Interface

The module provides one forced download boot interface ‘BOOT_CFG’.

Table 22: BOOT_CFG interface pin definition

Power
Pin name No. Type Description Note
domain
Firmware download guide
Please reserve 2 test
control input. When pull-
points for debug.
down to GND and press Do not pull down
BOOT_CFG 82 1.8V DI
PWRKEY, module will BOOT_CFG during
access in USB download normal power on!
mode.

If the module fails to boot, customers can force upgrade through the BOOT_CFG port.

Before the module is powered on, pull down the BOOT_CFG pin to GND, then apply VBAT power to the
module, and press PWRKEY to enter the download mode. After entering the download mode, release
BOOT_CFG and remove the pull-down.

It is recommended to place TVS protection devices to prevent external static electricity from damaging the
module.

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Module Disconnect when

download start
1K
BOOT_CFG
TVS

Figure 18: Reference BOOT_CFG circuit

Customers will see the download port in the device manager port of the windows system.

Force-download port:

The port after powering on normally:

Figure 19: The USB port

NOTE

1. BOOT_CFG is the download control pin, this pin cannot be pulled down before the normal power on.
Otherwise, it will enter the download mode.
2. It is recommended to reserve test point to facilitate debugging and upgrading.

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USIM Interface

The module supports both 1.8V and 3.0V USIM cards. The interface power of the USIM card is provided by
the voltage regulator inside the module.

Table 23: USIM interface pins definition

Power
Pin name No. Type Description Note
domain
It can be set to high/low
active with the AT
SIM1_DET 14 1.8V DI SIM1 card insert detect.
command, refer to
Document [18].
This pin has been pulled
SIM1_DATA 15 1.8/3.0V DIO SIM1 data signal. up with 4.7KΩ resistor to
SIM1_VDD internally.
SIM1_CLK 16 1.8/3.0V DO SIM1 clock signal.
SIM1_RST 17 1.8/3.0V DO SIM1 reset signal.
The voltage can be
dynamically changed
SIM1 card power supply
SIM1_VDD 18 1.8/3.0V PO according to the type of
output.
external card, output
current maximum 50mA.
It can be set to high/low
active with the AT
SIM2_DET 52 1.8V DI SIM2 card insert detect.
command, refer to
Document [18].
This pin has been pull-
SIM2_DATA 53 1.8/3.0V DIO SIM2 data signal. up with 4.7KΩ resistor to
SIM2_VDD internally.

SIM2_CLK 54 1.8/3.0V DO SIM2 clock signal.

SIM2_RST 55 1.8/3.0V DO SIM2 reset signal.

The voltage can be

dynamically changed
SIM2 card power supply
SIM2_VDD 56 1.8/3.0V PO according to the type of
output.
external card, output
current maximum 50mA.

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Table 24: USIM electronic characteristic in 1.8V mode (VSIM_VDD=1.8V)

Symbol Parameter Min. Typ. Max. Unit

VSIM_VDD LDO power output voltage 1.62 1.8 1.98 V
VIH High-level input voltage 0.7*VSIM_VDD - VSIM_VDD+0.4 V
VIL Low-level input voltage -0.4 0 0.25*VSIM_VDD V
VOH High-level output voltage VSIM_VDD-0.4 - VSIM_VDD V
VOL Low-level output voltage - 0 0.2 V

Table 25: USIM electronic characteristic in 3.0V mode (VSIM_VDD=3V)

Symbol Parameter Min. Typ. Max. Unit

VSIM_VDD LDO power output voltage 2.7 3 3.3 V
VIH High-level input voltage 0.7*VSIM_VDD - VSIM_VDD+0.4 V
VIL Low-level input voltage -0.4 0 0.25*VSIM_VDD V
VOH High-level output voltage VSIM_VDD-0.45 - VSIM_VDD V
VOL Low-level output voltage - 0 0.3 V

NOTE

The SIM card functions supported by the module depend on the actual hardware and software versions.

3.5.1. SIM Hot Swap Function

The (U)SIM card supports the hot swap function. You can use AT+UIMHOTSWAPON=1 to turn on the hot
swap detection function.

If the (U)SIM card holder is of the normally open type, the AT command “AT+UIMHOTSWAPLEVEL=0” can
be sent to set the detection level to a low level, when SIM_DET is pulled down, the (U)SIM card is considered
inserted.

If the (U)SIM card holder is of the normally closed type, the AT command “AT+UIMHOTSWAPLEVEL=1”
can be sent to set the detection level to a high level, when SIM_ DET is pulled up, it is considered that the
(U)SIM card is inserted.

For more detailed information on (U)SIM card AT operation, please refer to the document [1]. If the (U)SIM
card hot swap function is not used, the customer can maintain the SIM_DET pin is disconnected.

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3.5.2. SIM Application Guide

It is recommended to use ESD protection component. Note that the USIM peripheral circuit should be close
to the USIM card socket. The following figure shows the 6-pin SIM card holder reference circuit.

MODULE
SIM Socket
SIM_VDD VCC GND
22Ω
SIM_RST RST VPP
22Ω
SIM_CLK CLK I/O

22Ω
SIM_DATA
22pF_NM
22pF_NM

22pF_NM

100nF

33pF

Figure 20: SIM interface reference circuit

MODULE 100K (NC)

VDD_EXT SIM Socket
SIM_VDD VCC GND
22Ω
SIM_RST RST VPP
22Ω
SIM_CLK CLK I/O
22Ω
SIM_DET PRESENCE GND
22Ω
SIM_DATA
22pF_NM
22pF_NM
22pF_NM

100nF

33pF

Figure 21: SIM interface reference circuit (8PIN)

NOTE

1. SIM_DATA has been pulled up with a 4.7KΩ resistor to SIM_VDD in module.

2. A 100nF capacitor on SIM_VDD is used to reduce interference.
3. For more details of AT commands about USIM, please refer to document [1].

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The circuit of the USIM card is easy to be interfered with, resulting in the failure to recognize or drop the
card, etc. so please follow the following principles during the design:
 Be sure to keep the USIM socket away from the main antenna during the PCB layout phase.
 USIM card traces should be away from RF, VBAT and high speed signals, at the same time the USIM
card traces should be as short as possible.
 Keep the USIM socket’s GND pin directly connected to the main ground.
 To prevent SIM_CLK from other signal interference, it is suggested to make separate package to
protect SIM_CLK processing.
 Place TVS near the USIM socket, and the parasitic capacitance of TVS should not be greater than
15pF, such as WS03DTUMS-B.
 Connect 22 Ω resistors in series between USIM socket and module can enhance ESD protection
performance.
 The rise/fall time of SIM_CLK should not exceed 40ns.

Table 26: TVS for USIM socket part number list

Manufacturer Part Number VRWM VC(Max) PPP(Max) CJ(Max) Package

WAYON WS03DTUMS-B 3.3V 8V 35W 0.7pF DFN0603-2L
WILL ESD9X5VU-2/TR 5V 8V 72W 0.9pF DFN1006-2L

SD/MMC Interface

The module provides SD/MMC interface, which supports 208MHz SDR and 50MHz DDR clock frequency
and 128GB SD.
Following mode are supported: DS, HS, HS200, SDR12, SDR25, SDR50, SDR104 and DDR50.
Conforming to specifications: SDIO Card Specification version 3.0, eMMC Specification version 4.5.

Table 27: SD/MMC interface pins definition

Power
Pin name No. Type Description Note
domain
MCCA3 46 1.8/3.0V IO SD and MMC data
MCCA2 47 1.8/3.0V IO SD and MMC data
MCCA1 48 1.8/3.0V IO SD and MMC data
MCCA0 49 1.8/3.0V IO SD and MMC data If unused, keep it open.
MCCLK 50 1.8/3.0V DO SD and MMC clock
SD and MMC
MCCMD 51 1.8/3.0V IO
command

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Table 28: SD/MMC interface electrical specifications

Parameter Description Min. Typ. Max. Unit

1.8V
VIH High-level input VCC*0.7 1.8 VCC+0.2 V
voltage
Low-level input
VIL -0.3 0 0.3*VCC V
voltage
High-level output VCC-0.2V 1.8 -
VOH V
voltage
Low-level output
VOL 0 0 0.2V V
voltage
3.0V
VIH High-level input 2 - VCC+0.3 V
voltage
Low-level input
VIL -0.3 0 0.8 V
voltage
High-level output
VOH 2.4 - - V
voltage
Low-level output
VOL 0 - 0.4 V
voltage
The recommended reference design is as follows:

VDD_SD

MODULE SD CARD
VCC
MCCMD CMD
0R GND
MCCA3 D3
0R
MCCA2 D2
MCCA1 D1
0R GND
MCCA0 D0
MCCLK 0R CLK
22R
TVS

TVS
TVS

TVS

TVS

TVS

100nF

4.7uF

Figure 22: SD/MMC reference circuit

NOTE

The VDD_SD requires an external 3V power supply, and ensure that the power supply can provide a
continuous current capacity of not less than 350mA.

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Precautions for SD card routing:

 Protect other sensitive signal cables away from SD card signals.

 Protect SD card signal line away from other signals that may cause interference (e.g., clock signal,
switching power supply light).
 The clock frequency of the SD card is up to 200MHZ, and 50 ohm impedance control is required for
routing.
 The difference between the length of the CLK signal of the SD card and the length of the DATA/CMD
signal must be less than 1mm.
 Connect a 22-ohm resistor in series with the clock signal near the end of the module.
 The cable length should be less than 50mm.
 The distance between signal cables must be twice the cable width.
 The load capacitance of signal cables must be less than 15pf.

Analog Audio Interface

3.7.1. Analog Audio Input Interface

The module provides an analog audio MIC input interface, which can be connected to an external handle for
voice calls.

Table 29: Analog audio MIC interface definition

Power
Pin name No. Type Description Note
domain
MICP 9 - AI Microphone input channel (+)
If unused, keep it open.
MICN 10 - AI Microphone input channel (-)

3.7.2. Analog Audio Output Interface

The module provides an analog audio output interface, which can be connected to an external
Receiver/Speaker for voice calls or multimedia playback.

Table 30: Analog audio output interface definition

Power
Pin name No. Type Description Note
domain

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Handset differential output

SPK1P 11 - AO
channel (+)
If unused, keep open.
Handset differential output
SPK1N 12 - AO
channel (-)

3.7.3. Analog Audio Electrical Characteristics

The module Integrates High quality audio codec and audio front-end. The main features are as follows.
ADC: 90dB SNR@20~20kHz
DAC: 95dB SNR@20~20kHz
(Class-AB): THD<-85dB@32-ohm loading

Table 31: Analog audio output (AVDD_AUD=1.8V,T=25°C)

Max
Feature Details DR (Typ) THD+N (Typ)
power(1%THD)
DAC RL=10K 101dBA -96dB(@vout -2dBv) 1.59Vp
Mono,32Ω, -90dB (0.00316%)
Class-AB 100dBA 37mW
Differential (@20mW output)

3.7.4. Analog Audio Reference Design

The recommended reference design is as follows:

MODULE MIC_BIAS
AGND AGND AGND
Ground shielding for
1K 33pF 100pF
differential routing TVS

MIC_P
33pF 100pF
MIC_N
TVS Analog MIC
33pF 100pF AGND AGND
1K AGND
AGND
AGND AGND
33pF 100pF TVS
SPK_P 47uF
33pF 100pF
47uF
SPK_N
Ground shielding for TVS
33pF 100pF Receiver (32Ω)
differential routing

AGND AGND AGND

Figure 23: Analog audio interface reference circuit

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I2C Interface

The module provides one I2C interface, which supports standard speed clock frequency 100Kbps and high
speed clock frequency 400Kbps. Its operation voltage is 1.8V.

Table 32: I2C interface pins definition

Power
Pin name No. Type Description Note
domain
I2C_SCL 65 1.8V OD I2C clock output If unused, keep it open. Need
I2C_SDA 64 1.8V OD I2C data I/O to pull up to VDD_EXT.

The recommended reference design is as follows:

VDD__EXT

Module Host
4.7K 4.7K

100R
I2C_SCL SCL
I2C_SDA SDA
100R

GND GND

Figure 24: I2C reference circuit

NOTE

1. The SCL and SDA pins require pull-up resistors, and the pull-up power supply must be VDD_EXT of
the module output.
2. Connecting a 100R resistor in series with the I2C signal line close to the module terminal is
recommended to reduce overshoot on the signal line.

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GPIO Interface

The module provides multiple GPIOs.

Table 33: Standard GPIO Resources of the module

AT command
Pin Pin Power Default Pad Edge
Pin No. operation GPIO
name typ. domain function wakeup
number
57 GPIO1 GPIO1 IO,PD 1.8V GPIO YES
58 GPIO2 GPIO2 IO,PD 1.8V GPIO YES
78 GPIO3 GPIO3 IO,PD 1.8V GPIO YES
79 GPIO4 GPIO4 IO,PD 1.8V GPIO YES
80 GPIO5 GPIO5 IO,PD 1.8V GPIO YES
81 GPIO6 GPIO6 IO,PD 1.8V GPIO YES

STATUS Interface

The STATUS pin can be used to determine whether the module is powered on or not. When the module is
powered on and initialization is complete, the status output is high. Otherwise, it will remain low.

Table 34: STATUS interface pin definition

Power
Pin name No. Type Description Note
domain
Module operation status
STATUS 42 1.8V DO If unused, keep it open.
indication

The recommended reference design is as follows:

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Module VBAT

R
2.2K

4.7K
STATUS

47K

Figure 25: STATUS reference circuit

NOTE

The value of the resistor named “R” depends on the LED characteristic.

NETLIGHT Interface

NETLIGHT can indicate the current network status. It is usually used to drive the LED light indicating the
network status.

Table 35: NETLIGHT interface pin definition

Power
Pin name No. Type Description Note
domain
NETLIGHT 41 1.8V DO Network registration status indicator (LED).

The recommended reference design is as follows:

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Module VBAT

R
2.2K

4.7K
NETLIGHT

47K

Figure 26: NETLIGHT reference circuit

NOTE

The value of the resistor named “R” depends on the LED characteristic.

The NETLIGHT signal is used to control the LED light that indicates the status of the network. The working
status of this pin is shown in the table below.

Table 36: LTE mode NETLIGHT pin status

NETLIGHT pin status Module status

Always On Searching Network
200ms ON, 200ms OFF Data Transmit/Registered
OFF Power off / Sleep

GNSS Interface

The module provides a highly integrated, stable and reliable positioning solution. The GNSS information
related to the module is as follows.
 Supports GPS, BeiDou, and GLONASS navigation systems.
 The GNSS functions are turned off by default. Customers can turn on the GNSS by “AT+CGNSSPWR=1”,
and obtain NEMA data by “AT+CGNSSTST=1”.

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The module supports GNSS function, and provides 1 UART interface, 1 pulse synchronous clock signal
interface and 1 GNSS antenna interface, which are described in detail as follows.

Table 37: GNSS interface description

Pin Name No. Type Description Note

GNSS_RXD 62 DI GNSS UART RX 1.8V power domain.
The GNSS serial port has
GNSS_TXD 61 DO GNSS UART TX
been connected to UART3.
Second pulse signal, can be
used for accurate timing,
GNSS pulse synchronous clock
1PPS 60 DO about 30 seconds after
signal
successful positioning began
to output pulse signal.
Refer to Section 4.5 for
GNSS_ANT 68 AI GNSS_ANT Input
antenna design.

AT commands about GNSS are as following table.

Table 38: AT commands about GNSS

AT Command Description
GNSS power control
AT+CGNSSPWR=<n> <n>=1: Active GNSS
<n>=0: Close GNSS
Send data received from UART3 to NMEA port
AT+CGNSSTST=<n> <n>=1: Start sending data to NMEA port
<n>=0: Stop sending data to NMEA port
AT+CGPSCOLD Cold start GNSS
AT+CGPSWARM Warm start GNSS
AT+CGPSHOT Hot start GNSS
AT+CGPSINFO Get GPS fixed position information
AT+CGNSSINFO Get GNSS fixed position information

NOTE

1. When GNSS is working, the module cannot enter sleep mode completely, and the module can only
enter sleep after turning off GNSS.
2. The GNSS serial port has been connected to UART3.
3. For more details of AT commands about GNSS, please refer to document [1].

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Other Interface

3.13.1. ADC

The module has 1 general ADC pins. Built-in VBAT ADC interface.

Table 39: ADC interface pins definition

Power
Pin name No. Type Description Note
domain
ADC 38 0V-1.2V AI General Purpose ADC If unused, keep it open.

The electrical characteristics are as follows:

Table 40: General ADC electronic characteristics

Characteristics Min. Typ. Max. Unit

Resolution - 12 - Bits
Input Range 0 - 1.2 V
Input Resistance Hi-Z

NOTE

1. “AT+CADC=2” can be used to read the voltage of the ADC pin.

2. “AT+CBC” can be used to read the voltage of the VBAT.
3. For more details, please refer to document [1].

3.13.2. VDD_EXT

The module provides 1 LDO outputs: VDD_EXT.

VDD_EXT can only provide a current capacity of 50mA. It cannot be used as a high current drive source.

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Table 41: VDD_EXT interface pin definition

Power
Pin name No. Type Description Note
domain
1.8V power output,
VDD_EXT 40 - PO output current up to Default on. If unused, keep it open.
50 mA.

Table 42: VDD_EXT electrical characteristics

Symbol Description Min. Typ. Max. Unit

VDD_EXT Output voltage - 1.8 - V
IO Output current - - 50 mA

The recommended reference design is as follows:

MODULE
2.2R
VDD_EXT

TVS 1UF

Figure 27: VDD_EXT reference circuit

NOTE

VDD_EXT is the module power supply. If the damage will affect the system startup, it is recommended
that customers add TVS protection. The recommended model is ESD56051N.

Table 43: TVS for VDD_EXT part number list

Manufacturer Part Number VRWM VC(Max) CJ(Max) Package

WILLSEMI ESD56051N-2/TR 3.3V 10V 65F DFN1006-2L

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3.13.3. ANT_CTRL

The module provides a set of LTE antenna GRFC dedicated signals lines. It can be used to control the
antenna tuner to improve antenna performance. If the customer needs to use antenna tuner, please refer to
the design document “Antenna Tuning Reference Design" for detailed design. For circuit design, please refer
to Section 4.5.1.

Table 44: ANT_CTRL interface pins definition

Power
Pin name No. Type Description Note
domain
ANT_CTLR1(GPIO3) 78 1.8V DO RF switch IO
The default is GPIO.
ANT_CTLR2(GPIO4) 79 1.8V DO RF switch IO

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4. RF Specifications

LTE Specifications

Table 45: Conducted transmission power

Frequency Power Min.

LTE-FDD B1 23dBm +/-2.7dB <-40dBm
LTE-FDD B3 23dBm +/-2.7dB <-40dBm
LTE-FDD B5 23dBm +/-2.7dB <-40dBm
LTE-FDD B7 23dBm +/-2.7dB <-40dBm
LTE-FDD B8 23dBm +/-2.7dB <-40dBm
LTE-FDD B20 23dBm +/-2.7dB <-40dBm
LTE-FDD B28 23dBm +/-2.7dB <-40dBm

Table 46: E-UTRA operating bands

E-UTRA UL Freq. DL Freq. Duplex Mode

1 1920~1980 MHz 2110~2170 MHz FDD
3 1710~1785 MHz 1805~1880 MHz FDD
5 824～849 MHz 869～894MHz FDD
7 2500~2570MHz 2620~2690MHz FDD
8 880~915 MHz 925~960 MHz FDD
20 832~862MHz 791~821MHz FDD
28 703~748MHz 758~803MHz FDD

Table 47: Conducted receive sensitivity

Frequency Receive sensitivity(Typical) Receive sensitivity(MAX)

LTE FDD/TDD Refer to the table 46 3GPP

Table 48: Reference sensitivity (QPSK)

E-UTRA 3GPP TS36.521-1 Actual Duplex

Band 1.4 MHz 3MHz 5MHz 10MHz 15 MHz 20 MHz 10 MHz Mode

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1 - - -99.3 -96.3 -94.5 -93.3 -99 FDD

3 -101 -98 -96.3 -93.3 -91.5 -90.3 -97 FDD
5 -102 -99 -97.3 -94.3 - - -99 FDD
7 - - -97.3 -94.3 -92.5 -91.3 -98 FDD
8 -101 -98 -96.3 -93.3 - - -99.5 FDD
20 - - -96.3 -93.3 -91.5 -90.3 -99.5 FDD
28 - -99.5 -97.8 -94.8 -93 -91.8 -99.5 FDD

LTE Antenna Requirements

For better overall performance, it is recommended that the antenna design should refer to the index
requirements in the following table.

Table 49: LTE antenna requirements

Passive Recommended standard

Operating band Please refer to the table 45 and table 46
Direction Omnidirectional
Gain > -3dBi (Avg)
Input impedance 50 ohm
Efficiency > 50 %
Maximum input power 50W
VSWR <2
Isolation >20dB
PCB insertion loss(<1GHz) <0.5dB
PCB insertion loss(1GHz~2.2GHz) <1dB
PCB insertion loss(2.3GHz~2.7GHz) <1.5dB

GNSS Specifications

Table 50: GNSS operating bands

Type Frequency
GPS L1 1575.42±1.023MHz
GLONASS L1 1597.5~1605.8MHz
BeiDou B1 1561.098±2.046MHz

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Table 51: GNSS performance

Parameter Test condition GPS GPS+GLO GPS+BD GPS+BD+GLO

C/N0 @GSS7000 -130dB 40dB±1dB
Tracking
@GSS7000 -130dB -163 dBm -163 dBm -163 dBm -163 dBm
sensitivity
Reacquisition
@GSS7000 -130dB -156.5 dBm -157 dBm -158 dBm -157 dBm
sensitivity
Cold start
@GSS7000 -130dB -146.5 dBm -146.5 dBm -146.5 dBm -146.5 dBm
sensitivity
@GSS7000 -130dB
Hot start TTFF <1s
@GSS7000 -140dB
@GSS7000 -130dB 27s (Avg) 18s (Avg) 27s (Avg) 19s (Avg)
@GSS7000 -140dB 35s (Avg) 30s (Avg) 31s (Avg) 35s (Avg)
Cold start TTFF
@GSS7000 -146dB 53s (Avg)
@GSS7000 -147dB 194s(Avg)
Accuracy @GSS7000 -130dB <2m CEP50

GNSS Antenna Requirements

Table 52: Recommended Antenna Characteristics (GNSS)

Passive Recommended standard

Operating band L1: 1559~1609MHZ
Direction Hemisphere, face to sky
Input impedance 50 ohm
Maximum input power 50W
VSWR <2
Plan category RHCP or Linear
Passive antenna gain 0dBi
Active antenna gain -2dBi
Active antenna noise figure <1.5
Built-in antenna LNA gain 20dB(Typ.)
Total antenna gain <18 dB
Coaxial insertion loss <1.5dB

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Antenna Reference Design

4.5.1. Passive Antenna for LTE/GNSS

Matching circuit
Module
ANT_MAIN
R1 C3 D1
GND
C1 C2
TVS

ANT
ANT_CTRL1(GPIO3) VC1 Antenna
ANT_CTRL2(GPIO4) VC2
Tuner RF1

Depends on C4
RF2
customer needs
C5
External VDD RF3
VDD C6
GND RF4
C7

Figure 28: Passive antenna reference

The matching circuit R1 is labeled 0Ω by default, and C1 and C2 are reserved by default, and the specific
value is determined by the antenna optimization, usually provided by the antenna manufacturer.

The Pins 78 and 79 are reserved for the LTE Antenna tuner, which is dependent on the specific requirements
of the customer. If there is a need to use the antenna tuner, please refer to the design document "Antenna
Tuning Reference Design" for design details.

The antenna port is easy to introduce static electricity, to avoid the internal components of the module being
damaged by static electricity, C3 is pasted with a 100pF capacitor by default to enhance ESD protection
capability.

It is recommended that D1 choose a suitable two-way TVS protection device placed close to the antenna. It
especially needs to pay attention to the influence of TVS junction capacitance value on RF signals.
Recommended TVS models are as follows:

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Table 53: TVS for RF main antenna part number list

Manufacturer Part Number VRWM VC(Max) CJ(Max) Package

BilLSEMI BLE5V0CR05UB 5V 40V 0.05pF DFN1006-2L

4.5.2. Active Antenna for GNSS

If active antenna is used, there should be an external power supply. Reference design is shown as bellow:

VDD

Module
0.1uF
10R
Active Antenna

47nH

GNSS_ANT
0R
100pF
GND
NC TVS
NC

Figure 29: Active antenna reference

Table 54: TVS for GNSS antenna part number list

Manufacturer Part Number VRWM VC(Max) CJ(Max) Package

WAYON WE05DGCF-B 5V 23V 0.3pF DFN1006-2L

PCB layout

Customers should pay attention to the impedance design of PCB layout from the module ANT port to the
antenna connector, and the length of the PCB trance should be within 20 mm, and far away from interference
signals such as power & clock. It is recommended to reserve RF Switch Connector for conduction test. If it

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use IPEX connector, you must ensure that the projection area is hollowed out and the reference layer is
used when performing impedance control.

Figure 30: Reference PCB layout

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5. Electrical Specifications

Absolute maximum ratings

Absolute maximum rating for digital and analog pins of the module are listed in the following table, exceeding
these limits may cause permanent damage to the module.

Table 55: Absolute maximum ratings

Parameter Min. Typ. Max. Unit

Voltage on VBAT -0.5 - 4.8 V
Voltage on USB_VBUS -0.5 - 5.4 V
Voltage at digital pins
-0.3 - 2.0 V
(GPIO, I2C, UART, PCM)
Voltage at l/O pins -0.3 - 2.0 V
(USIM) -0.3 - 3.9 V
Voltage at PWRKEY\RESET -0.3 - 4.8 V

Operating conditions

Table 56: Recommended operating ratings

Parameter Min. Typ. Max. Unit

Voltage at VBAT 3.4 3.8 4.2 V
Voltage at USB_VBUS 3.0 5.0 5.2 V

Table 57: 1.8V Digital I/O characteristics*

Parameter Description Min. Typ. Max. Unit

VIH High-level input voltage VCC*0.7 1.8 VCC+0.2 V
VIL Low-level input voltage -0.3 0 VCC*0.3 V
VOH High-level output voltage VCC-0.2 - - V
VOL Low-level output voltage 0 - 0.2 V
IOH High-level output current (no pull - - 42 mA

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down resistor)
Low-level output current (no pull
IOL - - 49 mA
up resistor)
Input high leakage current (no
IIH - - 10 uA
pull-down resistor)
Input low leakage current (no pull
IIL -10 - - uA
up resistor)

NOTE

These parameters are for digital interface pins, such as GPIO, I2C and UART.

The operating temperature of the module is listed in the following table.

Table 58: Operating temperature

Parameter Min. Typ. Max. Unit

Normal operation temperature -30 25 75 ℃
Extended operation temperature* -40 - 85 ℃
Storage temperature -45 - 90 ℃

NOTE

When Module is within the extended operation temperature range, Module is able to establish and
maintain data transmission, SMS, etc. The performance may deviate slightly from the 3GPP specifications,
but will meet 3GPP specifications again when the temperature returns to normal operating temperature
levels. It is strongly recommended that customers take heat dissipation measures to ensure that the
normal operating temperature of the module can't be exceeded.

Operating Mode

5.3.1. Operating Mode Definition

The table below summarizes the various operating modes of the module.

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Table 59: Operating mode Definition

Mode Function
AT command “AT+CSCLK=1” can be used to set the module to
sleep mode. In this case, the current consumption of module
LTE Sleep
will be reduced to the minimal level and the module can still
receive paging message and SMS.
Software is active. The module is registered to the network, and
LTE Idle
the module is ready to communicate.
Normal
Two customers are connected. In this case, the power
operation
LTE Talk consumption of the module depends on the network and
module configuration.
There is data transmission in progress. In this case, power
LTE Data consumption is related to network settings (e.g., power control
transmission level); uplink/downlink data rates (e.g., multi-slot configuration),
etc.
AT command ‘AT+CFUN=0’, ‘AT+CSCLK=1’ can be used to set
the module to a minimum functionality mode without removing
the power supply. In this mode, the RF part of the module will not
Minimum functionality mode
work and the USIM card will not be accessible, and the UART
does not work properly. The power consumption in this mode is
lower than normal mode.
AT command ‘AT+CFUN=4’ can be used to set the module to
flight mode without removing the power supply. In this mode, the
Flight mode RF part of the module will not work, but the serial port and USB
port are still accessible. The power consumption in this mode is
lower than normal mode.
The module can be set to PSM mode by AT command without
removing the power supply. In this mode, the CPU is powered
off, only the clock circuit inside the module works, the network is
PSM mode
not connected, and the serial port and USB are unavailable. In
this case, the power consumption of the module is reduced to the
minimum.
Module will go into power off mode by sending the AT
command ‘AT+CPOF’ or pull down the PWRKEY pin, normally.
Power off In this mode the power management unit shuts down the power
supply, and software is not active. The serial port and USB are
not accessible.

5.3.2. Sleep mode

In sleep mode, the current consumption of module will be reduced to the minimal level, and module can

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still receive paging message and SMS.

Both hardware and software should meet several conditions simultaneously so that the module will enter
into sleep mode:
 USB condition: Send ‘AT+CSCLK=1’ and unplug USB.
 Software condition: Software must support sleep mode configuration.
 UART condition: Send ‘AT+CSCLK=1’.

NOTE

Before designing, please pay attention to how to realize sleeping/waking function and refer to document
[17] for more details.

5.3.3. Minimum functionality mode and Flight mode

Minimum power consumption mode ceases a majority function of Module, to enable the module enter the
minimum power consumption mode, the following hardware and software conditions must be followed:

(1) Module is in normal mode.

(2) Send AT command "AT+CFUN=0".
(3) Send AT command "AT+CSCLK=1".
(4) DTR pin pulled to high level and USB_ VBUS pulled to low level.

This mode is set by the AT command which provides a choice of the functionality levels.

 AT+CFUN=0: Minimum functionality

 AT+CFUN=1: Full functionality (Default)
 AT+CFUN=4: Flight mode

If the module has been set to minimum functionality mode, the RF function and SIM card function will be
closed. In this case, the serial port and USB are still accessible, but RF function and SIM card will be
unavailable.

If the module has been set to flight mode, the RF function will be closed. In this case, the serial port and
USB are still accessible, but RF function will be unavailable.

When the module is in minimum functionality or flight mode, it can return to full functionality by the AT
command “AT+CFUN=1”.

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5.3.4. PSM mode

The PSM mode can be set by “AT+CPSMS”, and it can minimize the current consumption.

The module is initially in the RRC connect state, and it will enter idle mode after disconnecting RRC Connect
by “end call”, while the timer T3324/T3412 starts timing. After the timer T3324 expires, the module enters
the PSM mode. The module will wake up automatically after the timer T3412 expiring, and it will enter TAU
mode.
The AT command for entering the PSM mode are as follows:
AT*COMCFG=1,,,,,254//Enable the 1bis
AT+CFUN=0
AT+CPSMS=1,,,"01100101","00000101"//Open the PSM
AT+MEDCR=0,103,1
AT+MEDCR=0,71,2//Set the wake-up time to 2 minutes
AT+CFUN=1

After entering the PSM mode, the module will terminate the network connection, and unable to respond to
requests. Customers can send AT command when the timer T3412 expiring or pull down the PWRKEY to
wake up the module. The module will exit the PSM mode by “AT+CPSMS=0”.

5.3.5. RTC mode

Module supports RTC mode for alarm clock, timer, auto power-on by alarm clock or other functions, it can
track or record the current date and time by sending "AT+CCLK?". There is no independent 32K crystal
oscillator and RTC backup power supply for RTC clock inside the module, and the RTC logic requires VBAT
power supply to PMU to generate the RTC clock, so the power supply for VBAT should not be turned off.
Module can enter the RTC mode even in shutdown or sleep mode as long as the correct power supply
connected to VBAT.
RTC clock is generated by the divider, and LDO is always on for power supply to 26M XO, so LDO will occur
some current consumption. The RTC block diagram is shown as follow.

SoC

VBAT LDO 26M 26MHz Divider ~32KHz RTC

PMU
XO ÷793 Logic

Figure 31: RTC block diagram

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Table 60: RTC characteristics

Operating conditions RTC time accuracy VBAT current consumption

VBAT=3.8V
+/- 3 S within 24H(Typical) 110uA (Typical)
Module shutdown

NOTE

For current software version, LDO will be turned off by default after module turned off, so RTC function is
not supported; If need to keep LDO always on after module turned off, please contact SIMCom FAE to get
customized software version.

Current Consumption of LTE Operation

The current consumption is listed in the table below.

Table 61: Current consumption on VBAT Pins (VBAT=3.8V, GNSS off)

PSM mode
PSM supply current Typical: 124uA
LTE sleep/Idle mode
Idle mode Typical: 11mA
LTE supply current Sleep mode@DRX=0.32S typical: 1.69mA
Sleep mode@DRX=0.64S typical: 1.33mA
(Without USB connection) Sleep mode@DRX=1.28S typical: 1.12mA
Sleep mode@DRX=2.56S typical: 0.98mA
Minimum functionality mode
Typical: 0.80mA (With simcard)
AT+CFUN=0, AT+CSCLK=1
Typical: 0.82mA (Without simcard)
LTE Cat1
LTE-FDD B1 @5MHz 23dBm Typical :624mA
LTE-FDD B3 @5MHz 23dBm Typical :630mA
LTE-FDD B5 @5MHz 23dBm Typical :614mA
LTE-FDD B7 @5MHz 23dBm Typical :615mA
LTE-FDD B8 @5MHz 23dBm Typical :571mA
LTE-FDD B20 @5MHz 23dBm Typical :600mA
LTE-FDD B28 @5MHz 23dBm Typical :634mA

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Current Consumption of GNSS Operation

Table 62: VBAT current consumption during GNSS operation

(VBAT=3.8V, @AT+CFUN=0, AT+CSCLK=1, without USB connection)

Mode Positioning system Condition Typical value (mA)

-130dBm/Tracking 30
-145dBm/Tracking 29
GPS
-130dBm/ Cold start 29
-145dBm/ Cold start 29
-130dBm/Tracking 33
-145dBm/Tracking 32
GNSS signal generator GPS+BD
-130dBm/ Cold start 31
-145dBm/ Cold start 29
-130dBm/Tracking 32
-145dBm/Tracking 34
GPS+GLONASS+BD
-130dBm/ Cold start 32
-145dBm/ Cold start 29
Acquisition 29
GPS
Tracking 30
Actual network passive Acquisition 30
GPS+BD
antenna Tracking 31
Acquisition 31
GPS+GLONASS+BD
Tracking 31
Acquisition 30
GPS
Tracking 30
Actual network active Acquisition 33
GPS+BD
antenna Tracking 32
Acquisition 33
GPS+GLONASS+BD
Tracking 34

ESD Notes

The module is sensitive to ESD in the process of storage, transporting, and assembling. When the module

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is mounted on the customers’ mother board, the ESD components should be placed beside the connectors
which human body may touch, such as SIM card holder, audio jacks, switches, keys, etc. The following table
shows the ESD measurement performance.

Table 63: The ESD performance measurement table (Temperature: 25℃, Humidity: 45%)

Part Contact discharge Air discharge

VBAT, GND ±4KV ±8KV
Antenna port ±4KV ±8KV
USB interface ±4KV ±6KV
UART interface ±3KV ±6KV
USIM interface ±3KV ±6KV
Other PADs ±1KV ±2KV

NOTE

Test conditions:
 The external of the module has surge protection diodes and ESD protection diodes.
 The data in table above were tested using SIMCom EVB.

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6. SMT Production Guide

Top and Bottom View of the module

Figure 32: Top and bottom view of the module

NOTE

The above is the design effect diagram of the module for reference. The actual appearance is subject to
the actual product.

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Label Information

Figure 33: Label description of the module

Table 64: The description of label information

No. Description
A Project name
B Part number
C Serial number
D IMEI number
E QR code

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Recommended PCB Footprint

Figure 34: Footprint recommendation (Unit: mm)

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Recommended SMT Stencil

The following figure shows the SMT stencil of the module.

Figure 35: Recommended SMT stencil (Unit: mm)

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Recommended reflow furnace temperature curve

It is recommended to lead free.

During the furnace temperature test, the thermocouple test point should be connected to the module position
to ensure that the module position reaches the required temperature. Recommended furnace temperature
profile (lead-free SMT reflow) is as follows:

Figure 36: Recommended reflow furnace temperature curve (lead-free)

Table 65: The main board reflux temperature curve requirements (lead-free)

Temperature range Time Critical parameter

Preheating zone (Room temperature~150 ℃) NA Temperature rise slope 1~2℃/s
T1(150~180℃) 60-120s /
T2(180-220℃) 15-20s /
T3(≥220℃) 40-60s Peak temperature 240~245℃
Cooling Zone NA Cooling slope -2~-5℃/s

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NOTE

 The maximum times of refluxes for the module is once.

 Recommended lead-free process.
 In the table above, the temperature testing location includes the solder mask of the module MCU pins,
bottom LGA pins, and external LCC pins.
 The actual welding temperature is affected by other external factors, such as the presence of furnace
carriers, solder paste, size and thickness of the substrate, and component resistance. Thermal
requirements and panel design, etc. Please confirm with our engineering and technical personnel in time
if the recommended parameters cannot be reached. Otherwise, the module may be damaged.
 For boards with thickness less than 1.2mm, it is recommended to use board supported by furnace
carrier or materials with high Tg to prevent warping when heated. Deformation, thus affecting module
welding. For modules larger than 35.0 mm *35.0 mm and 5G products, it is recommended to use the
furnace carrier to pass through the furnace to reduce the cause of the bottom plate and mold. Due to
the difference of Tg value of block, the phenomenon of unbalanced thermal stress appears in the
process of high temperature welding reflow, resulting in the defect rate of virtual welding and little tin.
 After the module is welded, X-ray and optical inspection methods shall be used to check the welding
quality. For specific standards, please refer to relevant standards of IPC-A-610H.
 For more information about shipping and manufacturing, please refer to Module Secondary SMT
Process User Guide.
 Due to the complexity of the SMT process, in case of uncertainty or processes not mentioned in this
document (such as selective wave soldering, ultrasonic welding), please contact SIMCom support team
before SMT process starts.

Moisture Sensitivity Level (MSL)

The modules are shipped in vacuum-sealed aluminum foil bag bags, vacuum packaging according to
IPC/JEDEC standard J-STD-020C specification.

 Recommended storage conditions: temperature 23℃± 5℃, and relative humidity 35%~60%.
 Storage period: 12 months (Under recommended storage conditions and in sealed vacuum packaging).

The module meets the humidity sensitivity level 3 (MSL-3), and the storage period after unpacking is shown
in table below.
The out-of-bag floor life of the module with MSL-3 is 168 hours. If the workshop temperature is 23℃±5℃
and the relative humidity is less than 60%, the module needs to be unpacked within 168 hours of reflux
production or other high temperature operations. Otherwise, the module shall be stored in an environment
with relative humidity less than 10% (for example, a moisture-proof cabinet) to keep the product dry.

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Table 66: Moisture Sensitivity Level

MSL Out-of-bag floor life Comment

1 Unlimited ≤+30℃/85% RH
2 1 year
2a 4 weeks
3 168 hours
≤+30℃/60% RH
4 72 hours
5 48 hours
5a 24 hours
Mandatory bake before use. After bake, it must be
6
reflowed within the time limit specified on the label.

Before using, it is necessary to confirm whether the package is in good condition. After unpacking, check
the status of humidity indicator card in vacuum bag (Figure 37). The module needs to be baked before use
if any of the following conditions occur.

 Explanation Humidity indicator card: 30%, 40%, and 50% of any indicator circle has discolouring.
 The module has been un-packed and the module exceeds the humidity sensitivity level corresponding to
the exposed workshop time. For example, MSL=3 is 168.
 Packed, but the Shelf Life exceeds 12 months.
 Exceeds the Floor Life.
 Unable to track and determine the status of the module.

Figure 37: Humidity card

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The following conditions also need to be pre-baked.

 The storage temperature and humidity do not meet the recommended storage conditions.
 Vacuum sealed bag leak, bulk materials.
 Before repairing the module.
 After unpacking, the module failed to complete production or storage under the control of humidity
sensitive level 3.

Baking Requirements

If baking is required, proceed according to the requirements in the table below. Preferentially choose a
nitrogen-filled oven.

Table 67: Module baking requirements

Baking conditions Baking time Comment

120℃±5℃, <5% RH 8 hours Not applicable to original packaging pallets

NOTE

 In order to prevent and reduce the occurrence of poor welding caused by moisture, such as foaming
and delamination, the module should be strictly controlled. It is not recommended to expose the module
to air for a long time after unpacking the vacuum package.
 Before baking, it is necessary to remove the module from the package and place the bare module on
the high temperature resistant device to avoid high temperature damage to the plastic tray or coil. The
modules for secondary baking must be welded within 24 hours after baking. Otherwise, they need to be
stored in vacuum packaging or in a drying oven.
 Please pay attention to ESD protection when unpacking and placing modules, such as wearing anti-
static gloves.

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7. Packaging
The module support tray packaging.

Figure 38: Packaging diagram

Module tray drawing:

Figure 39: Tray drawing

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Table 68: Tray size

Length (±3mm) Width (±3mm) Module number

242.0 161.0 24

Small carton drawing:

Figure 40: Small carton drawing

Table 69: Small Carton size

Length (±10mm) Width (±10mm) Height (±10mm) Module number

270 180 120 24*20=480

Big carton drawing:

Figure 41: Big carton drawing

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Table 70: Big Carton size

Length (±10mm) Width (±10mm) Height (±10mm) Module number

380 280 280 480*4=1920

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8. Appendix

Coding Schemes and Maximum Net Data Rates over Air Interface

Table 71: Coding Schemes and Maximum Net Data Rates over Air Interface

LTE-FDD device category

Max data rate (peak) Modulation type
(Downlink)
Category 1 10Mbps QPSK/16QAM/64QAM
LTE-FDD device category
Max data rate (peak) Modulation type
(Uplink)
Category 1 5Mbps QPSK/16QAM

Related Documents

Table 72: Related Documents

NO. Title Description

A1602 & 1606_Series_AT_Command
[1] AT Command Manual
Manual_V1.03
Serial asynchronous automatic dialing and
[2] ITU-T Draft new recommendationV.25ter
control
Digital cellular telecommunications system
[3] 3GPP TS 51.010-1 (Release 5); Mobile Station (MS)
conformance specification
Electromagnetic Compatibility (EMC) for
[4] 3GPP TS 34.124
mobile terminals and ancillary equipment.
Electromagnetic Compatibility (EMC) for
[5] 3GPP TS 34.121
mobile terminals and ancillary equipment.
Technical Specification Group Radio
Access Network; Terminal conformance
[6] 3GPP TS 34.123-1
specification; Radio transmission and
reception (FDD)

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User Equipment (UE) conformance

[7] 3GPP TS 34.123-3
specification; Part 3: Abstract Test Suites.
Electromagnetic compatibility and Radio
spectrum Matters
(ERM); Base Stations (BS) and User
Equipment (UE) for
IMT-2000. Third Generation cellular
[8] EN 301 908-02 V2.2.1 networks; Part 2:
Harmonized EN for IMT-2000, CDMA
Direct Spread
(UTRA FDD) (UE) covering essential
requirements of article
3.2 of the R&TTE Directive
Electromagnetic compatibility and Radio
Spectrum Matters (ERM); Electromagnetic
Compatibility (EMC) standard for radio
[9] EN 301 489-24 V1.2.1 equipment and services; Part 24: Specific
conditions for IMT-2000 CDMA Direct
Spread (UTRA) for Mobile and portable
(UE) radio and ancillary equipment.
Safety of information technology
[10] IEC/EN60950-1(2001)
equipment (2000)
Digital cellular telecommunications system
[11] 3GPP TS 51.010-1 (Release 5); Mobile Station (MS)
conformance specification
Global Certification Forum - Certification
[12] GCF-CC V3.23.1
Criteria
Directive of the European Parliament and
of the Council of 27 January 2003 on the
[13] 2002/95/EC restriction of the use of certain hazardous
substances in electrical and electronic
equipment (RoHS)
Module Secondary SMT Process User
[14] Module secondary SMT Guidelines
Guide_V1.xx
This document describes how to use UART
[15] A76XX Series_UART_Application Note_V1.00
interface of SIMCom modules.
Antenna design guidelines for diversity receiver Antenna design guidelines for diversity
[16]
system receiver system
A76XX Series_Sleep Mode_Application
[17] Sleep Mode Application Note
Note_V1.00
A76XX Series_UIM HOT SWAP_Application This document introduces UIM card
[18]
Note_V1.00 detection and UIM hot swap.

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Terms and Abbreviations

Table 73: Terms and Abbreviations

Abbreviation Description
ADC Analog-to-Digital Converter
ARP Antenna Reference Point
BER Bit Error Rate
BD BeiDou
BTS Base Transceiver Station
CS Coding Scheme
CSD Circuit Switched Data
CTS Clear to Send
DAC Digital-to-Analog Converter
DSP Digital Signal Processor
DTE Data Terminal Equipment (typically computer, terminal, printer)
DTR Data Terminal Ready
DTX Discontinuous Transmission
DAM Downloadable Application Module
DPO Dynamic Power Optimization
EFR Enhanced Full Rate
EGSM Enhanced GSM
EMC Electromagnetic Compatibility
ESD Electrostatic Discharge
ETS European Telecommunication Standard
FCC Federal Communications Commission (U.S.)
FD SIM fix dialing phonebook
FDMA Frequency Division Multiple Access
FR Full Rate
GMSK Gaussian Minimum Shift Keying
GNSS Global Navigation Satellite System
GPRS General Packet Radio Service
GPS Global Positioning System
GSM Global Standard for Mobile Communications
HR Half Rate
I2C Inter-Integrated Circuit
IMEI International Mobile Equipment Identity

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LTE Long Term Evolution

MO Mobile Originated
MS Mobile Station (GSM engine), also referred to as TE
MT Mobile Terminated
NMEA National Marine Electronics Association
PAP Password Authentication Protocol
PBCCH Packet Switched Broadcast Control Channel
PCB Printed Circuit Board
PCS Personal Communication System, also referred to as GSM 1900
RF Radio Frequency
RMS Root Mean Square (value)
RTC Real Time Clock
SIM Subscriber Identification Module
SMS Short Message Service
SMPS Switched-mode power supply
TDMA Time Division Multiple Access
TE Terminal Equipment, also referred to as DTE
TX Transmit Direction
UART Universal Asynchronous Receiver & Transmitter
VSWR Voltage Standing Wave Ratio
EDGE Enhanced data rates for GSM evolution
ZIF Zero intermediate frequency
WCDMA Wideband Code Division Multiple Access
VCTCXO Voltage control temperature-compensated crystal oscillator
USIM Universal subscriber identity module
UMTS Universal mobile telecommunications system
UART Universal asynchronous receiver transmitter
PSM Power saving mode
FD SIM fix dialing phonebook
LD SIM last dialing phonebook (list of numbers most recently dialed)
MC Mobile Equipment list of unanswered MT calls (missed calls)
ON SIM (or ME) own numbers (MSISDNs) list
RC Mobile Equipment list of received calls
SM SIM phonebook
NC Not connect

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Safety Caution

Table 74: Safety Caution

Marks Requirements
When in a hospital or other health care facility, observe the restrictions about the use of
mobiles. Switch the cellular terminal or mobile off, medical equipment may be sensitive
and not operate normally due to RF energy interference.
Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it is
switched off. The operation of wireless appliances in an aircraft is forbidden to prevent
interference with communication systems. Forgetting to think much of these instructions
may impact the flight safety, or offend local legal action, or both.
Do not operate the cellular terminal or mobile in the presence of flammable gases or
fumes. Switch off the cellular terminal when you are near petrol stations, fuel depots,
chemical plants or where blasting operations are in progress. Operation of any electrical
equipment in potentially explosive atmospheres can constitute a safety hazard.
Your cellular terminal or mobile receives and transmits radio frequency energy while
switched on. RF interference can occur if it is used close to TV sets, radios, computers
or other electric equipment.

Road safety comes first! Do not use a hand-held cellular terminal or mobile when driving
a vehicle, unless it is securely mounted in a holder for hands free operation. Before
making a call with a hand-held terminal or mobile, park the vehicle.

GSM cellular terminals or mobiles operating over radio frequency signals and cellular
networks cannot be guaranteed to connect in all conditions, especially with a mobile fee
or an invalid SIM card. While you are in this condition and need emergent help, please
remember to use emergency calls. In order to make or receive calls, the cellular terminal
or mobile must be switched on and in a service area with adequate cellular signal
strength.
Some networks do not allow for emergency call if certain network services or phone
features are in use (e.g. lock functions, fixed dialing etc.). You may have to deactivate
those features before you can make an emergency call.
Also, some networks require that a valid SIM card be properly inserted in the cellular
terminal or mobile.

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