0% found this document useful (0 votes)
62 views

Chapter 3 Computer Architecture

Uploaded by

ekanshtoocaram8
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
62 views

Chapter 3 Computer Architecture

Uploaded by

ekanshtoocaram8
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

O Level Hardware: Computer Architecture © N.

A DMC SC 2023

Computer Architecture
CPU architecture refers to the internal logical structure and organisation of the computer hardware.

The central processing unit (CPU)


• The CPU has the responsibility for the execution and processing of all the instructions and
data in a computer.
• The central processing unit (CPU) is also known as a microprocessor or processor.
• The CPU is very often installed as an integrated circuit on a single microchip.

The CPU consists of:

• Control Unit (CU)


• Arithmetic and Logic Unit (ALU)
• registers and buses.

Von Neumann Architecture

It uses the stored program concept; i.e,

• instructions and data are stored in the main memory


• instructions are fetched and executed in sequence

Page 1 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Components of the Central Processing Unit (CPU)


ALU

The Arithmetic & Logic Unit (ALU) allows the required arithmetic or logic (e.g. AND, OR) operations
to be carried out while a program is being run.

Control Unit

• The control unit reads instructions from memory.


• Signals are generated to control all components of the computer.
• The control unit ensures synchronisation of data flow and program instructions throughout
the computer.
• System clock is used to produce timing signals on the control bus to ensure this vital
synchronisation takes place.

Registers

• Registers can be general or special purpose.


• These are high-speed areas of memory used to store small amounts of data, address of next
instruction to be executed or current instruction being executed.

Specific purpose registers

Page 2 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

System buses and memory

Memory

The computer memory is made up of a number of partitions.

Each partition consists of an address and its contents.

The address will uniquely identify every location in the memory and the contents will be the binary
value stored in each location.

How the MAR and MDR registers can be used when carrying out a read and write operation to and
from memory

✓ The READ operation

Suppose we want to read the contents of memory location 1111 0001.

The two registers are used as follows:

• The address of location 1111 0001 to be read from is first written into the MAR (Memory
Address Register):

Page 3 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

• A ‘read signal’ is sent to the computer memory


• The contents of memory location 1111 0001 are then put into the MDR
(Memory Data Register):

✓ The WRITE operation

We want to show how the value 1001 0101 was written into memory location 1111 1101:

• The data to be stored is first written into the MDR (Memory Data Register):

• This data has to be written into location with address: 1111 1101; so this address is now
written into the MAR:

• Finally, a ‘write signal’ is sent to the computer memory and the value 10010101 will then be
written into the correct memory location.

(System) buses
• (System) buses are used in computers as parallel transmission components.
• Each wire in the bus transmits one bit of data.

There are three common buses used in the von Neumann architecture:

i. address bus,
ii. data bus and
iii. control bus.

Page 4 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Address bus

• Carries addresses throughout the computer system.


• Between the CPU and memory, the address bus is unidirectional (i.e. bits can travel in one
direction only).
• The wider the bus, the more memory locations that can be directly addressed at any given
time.

Data bus

• It is bidirectional (allowing data to be sent in both directions along the bus). This means data
can be carried from CPU to memory (and vice versa) and to and from input/output devices.
• The wider the bus, the larger the word length that can be transported.

Control bus

• It is bidirectional.
• It carries signals from the control unit (CU) to all the other computer components.
• It is usually 8-bits wide.
• There is no real need for it to be any wider since it only carries control signals.

Fetch–Decode–Execute cycle
To carry out a set of instructions,

• The CPU first of all fetches some data and instructions from memory.
• The CPU then stores them in suitable registers.
• Both the address bus and data bus are used in this process.
• Once this is done, each instruction needs to be decoded before finally being executed.

Page 5 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Page 6 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Factors that determine the performance of a CPU


i. Clock speed
• The system clock defines the clock cycle that synchronises all computer operations.
• By increasing clock speed, the processing speed of the computer is also increased.
• Overclocking. The clock speed can be changed by accessing the BIOS (Basic
Input/Output System) and altering the settings.

Using a clock speed higher than the computer was designed for can lead to problems:

a. can lead to seriously unsynchronised operations, resulting to the computer to


frequently crash and become unstable.
b. can lead to serious overheating of the CPU, again leading to unreliable performance.

ii. The width of the address bus and data bus


iii. The use of cache memories
iv. The use of a different number of cores

Instruction set
• Instruction sets are low-level language instructions that instruct the CPU how to carry out an
operation.
• A limited number of opcodes can be used by a computer.
• Instructions are a set of operations which are decoded in sequence.
• Each operation will instruct the ALU and CU (which are part of the CPU).
• An operation is made up of an opcode and an operand.

The opcode informs the CPU what operation needs to be done.

The operand is the data which needs to be acted on or it can refer to a register in the memory.

Page 7 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Embedded systems
• An embedded system is a combination of hardware and software designed to carry out a
specific set of functions.
• The hardware is electronic, electrical or electro-mechanical.
• Embedded systems are either programmable or non-programmable.

Embedded systems can be based on:

• Microcontrollers
• Microprocessor
• system on chips (SoC)

Non-programmable devices need, in general, to be replaced if they require a software upgrade.


Programmable devices permit upgrading by two methods:

i. connecting the device to a computer and allowing the download of updates to the software
ii. automatic updates via a Wi-Fi, satellite or cellular (mobile phone network) link

Benefits and drawbacks of using embedded systems

Page 8 of 9
O Level Hardware: Computer Architecture © N.A DMC SC 2023

Examples of the use of embedded systems


i. Security systems (monitor intruders, sound alarm etc…)
ii. Set-top box to record and play back television programmes
iii. Lighting applications (control lighting levels etc…)
iv. Vending machines (monitor selection, money entered, delivery of items etc…)
v. Washing machines (select wash programs)
vi. Motor vehicles (fuel injection system, GPS navigation, in-car entertainment etc…)

References: Cambridge IGCSE & O Level Computer Science (D. Watson & H. Williams)

Page 9 of 9

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy