Precision Picoampere Input Current

Quad Operational Amplifier

OP497
FEATURES PIN CONNECTIONS
Low offset voltage: 75 μV maximum OUT A 1 16 OUT D
Low offset voltage drift: 1.0 μV/°C maximum –IN A 2 15 –IN D

Very low bias current +IN A 3 14 +IN D

25°C: 150 pA maximum V+ 4 OP497 13 V–

−40°C to +85°C: 300 pA maximum +IN B 5 12 +IN C

Very high open-loop gain: 2000 V/mV minimum –IN B 6 11 –IN C

Low supply current (per amplifier): 625 μA maximum OUT B 7 10 OUT C

Operates from ±2 V to ±20 V supplies NC 8 9 NC

00309-001
High common-mode rejection: 114 dB minimum NC = NO CONNECT

Figure 1. 16-Lead Wide Body SOIC (RW-16)

APPLICATIONS
OUT A 1 14 OUT D
Strain gage and bridge amplifiers –IN A 2 13 –IN D
High stability thermocouple amplifiers +IN A 3 12 +IN D
Instrumentation amplifiers V+ 4 OP497 11 V–
Photocurrent monitors +IN B 5 10 +IN C
High gain linearity amplifiers –IN B 6 9 –IN C

00309-002
Long-term integrators/filters OUT B 7 8 OUT C
Sample-and-hold amplifiers
Figure 2. 14-Lead PDIP (N-14)
Peak detectors
1k
Logarithmic amplifiers VS = ±15V
VCM = 0V
Battery-powered systems

GENERAL DESCRIPTION
INPUT CURRENT (pA)

The OP497 is a quad op amp with precision performance in

the space-saving, industry standard 16-lead SOlC package. 100
Its combination of exceptional precision with low power and
extremely low input bias current makes the quad OP497 useful –IB

in a wide variety of applications.

+IB
Precision performance of the OP497 includes very low offset
(<50 μV) and low drift (<0.5 μV/°C). Open-loop gain exceeds IOS

2000 V/mV ensuring high linearity in every application. Errors 10

00309-003
–75 –50 –25 0 25 50 75 100 125
due to common-mode signals are eliminated by its common- TEMPERATURE (°C)
mode rejection of >120 dB. The OP497 has a power supply Figure 3. Input Bias, Offset Current vs. Temperature
rejection of >120 dB which minimizes offset voltage changes
experienced in battery-powered systems. The supply current Combining precision, low power, and low bias current, the OP497
of the OP497 is <625 μA per amplifier, and it can operate with is ideal for a number of applications, including instrumentation
supply voltages as low as ±2 V. amplifiers, log amplifiers, photodiode preamplifiers, and long-
term integrators. For a single device, see the OP97 data sheet,
The OP497 uses a superbeta input stage with bias current and for a dual device, see the OP297 data sheet.
cancellation to maintain picoamp bias currents at all temperatures.
This is in contrast to FET input op amps whose bias currents
start in the picoamp range at 25°C but double for every 10°C
rise in temperature to reach the nanoamp range above 85°C.
The input bias current of the OP497 is <100 pA at 25°C.

Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©1991–2009 Analog Devices, Inc. All rights reserved.
OP497

TABLE OF CONTENTS
Features .............................................................................................. 1 AC Performance ......................................................................... 10
Applications ....................................................................................... 1 Guarding And Shielding ........................................................... 11
General Description ......................................................................... 1 Open-Loop Gain Linearity ....................................................... 11
Pin Connections ............................................................................... 1 Applications Circuit ....................................................................... 12
Revision History ............................................................................... 2 Precision Absolute Value Amplifier ......................................... 12
Specifications..................................................................................... 3 Precision Current Pump ............................................................ 12
Absolute Maximum Ratings............................................................ 4 Precision Positive Peak Detector .............................................. 12
Thermal Resistance ...................................................................... 4 Simple Bridge Conditioning Amplifier ................................... 12
ESD Caution .................................................................................. 4 Nonlinear Circuits ...................................................................... 13
Typical Performance Characteristics ............................................. 5 Outline Dimensions ....................................................................... 14
Applications Information .............................................................. 10 Ordering Guide .......................................................................... 15

REVISION HISTORY
2/09—Rev. D to Rev. E 11/01—Rev. C to Rev. D
Deleted 14-Lead CERDIP............................................. Throughout Edits to Pin Connection Headings ..................................................1
Changes to Features Section and General Description Deleted Wafer Test Limits ................................................................3
Section ................................................................................................ 1 Edits to Absolute Maximum Ratings ..............................................5
Delete Military Processed Devices Text, SMD Part Number, Edits to Outline Dimensions......................................................... 16
ADI Part Number Table, and Dice Characteristics Figure ......... 3 Edits to Ordering Guide ................................................................ 17
Changes to Table 1 ............................................................................ 3
Changes to Absolute Maximum Ratings Section ......................... 4
Changes to Figure 12 ........................................................................ 6
Changes to Figure 18 and Figure 19 ............................................... 7
Changes to Figure 26 and Figure 28 ............................................... 8
Deleted OP497 Spice Macro-Model Section............................... 10
Changes to Applications Information Section............................ 10
Moved Figure 33 ............................................................................. 10
Deleted Table I. OP497 SPICE Net-List....................................... 11
Changes to Open-Loop Gain Linearity Section and
Figure 35 .......................................................................................... 11
Changes to Figure 40 ...................................................................... 13
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15

Rev. E | Page 2 of 16
 OP497

SPECIFICATIONS
TA = 25°C, VS = ±15 V, unless otherwise noted.

Table 1.
F Grade G Grade
Parameter Symbol Condition Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 40 75 80 150 μV
−40°C ≤ +85°C 70 150 120 250 μV
Average Input Offset Voltage Drift TCVOS TMIN − TMAX 0.4 1.0 0.6 1.5 μV/°C
Long-Term Input Offset Voltage 0.1 0.1 μV/Month
Stability
Input Bias Current IB VCM = 0 V 40 150 60 200 pA
−40° ≤ TA ≤ +85°C 60 200 80 300 pA
Average Input Bias Current Drift TCIB −40° ≤ TA ≤ +85°C 0.3 0.3 pA/°C
Input Offset Current IOS VCM = 0 V 30 150 50 200 pA
−40° ≤ TA ≤ +85°C 50 200 80 300 pA
Average Input Offset Current Drift TCIOS 0.3 0.4 pA/°C
Input Voltage Range 1 IVR ±13 ±14 ±13 ±14 V
TMIN − TMAX ±13 ±13.5 ±13 ±13.5 V
Common-Mode Rejection CMR VCM = ±13 V 114 135 114 135 dB
TMIN − TMAX 108 120 108 120 dB
Large Signal Voltage Gain AVO VO = ±10 V, RL = 2 kΩ 1500 4000 1200 4000 V/mV
−40° ≤ TA ≤ +85°C 800 2000 800 2000 V/mV
Input Resistance Differential Mode RIN 30 30 MΩ
Input Resistance Common Mode RINCM 500 500 GΩ
Input Capacitance CIN 3 3 pF
OUTPUT CHARACTERISTICS
Output Voltage Swing VO RL = 2 kΩ ±13 ±13.7 ±13 ±13.7 V
RL = 10 kΩ, TMIN − TMAX ±13 ±14 ±13 ±14 V
RL = 10 kΩ ±13 ±13.5 ±13 ±13.5 V
Short Circuit ISC ±25 ±25 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±2 V to ±20 V 114 135 114 135 dB
VS = ±2.5 V to ±20 V, TMIN − TMAX 108 120 108 120 dB
Supply Current (per Amplifier) ISY No load 525 625 525 625 μA
TMIN − TMAX 580 750 580 750 μA
Supply Voltage Range VS Operating range ±2 ±20 ±2 ±20 V
TMIN − TMAX ±2.5 ±20 ±2.5 ±20 V
DYNAMIC PERFORMANCE
Slew Rate SR 0.05 0.15 0.05 0.15 V/μs
Gain Bandwidth Product GBW 500 500 kHz
Channel Separation CS VO = 20 V p-p, fO = 10 Hz 150 150 dB
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 0.3 0.3 μV/p-p
Voltage Noise Density en en = 10 Hz 17 17 nV/√Hz
en = 1 kHz 15 15 nV/√Hz
Current Noise Density in in = 10 Hz 20 20 fA/√Hz
1
Guaranteed by CMR test.

Rev. E | Page 3 of 16
OP497

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply to packaged parts. THERMAL RESISTANCE
θJA is specified for the worst-case mounting conditions, that is,
Table 2. θJA is specified for a device in socket for the PDIP package, and
Parameter Rating θJA is specified for a device soldered to the printed circuit board
Supply Voltage ±20 V (PCB) for the SOIC package.
Input Voltage1 20 V
Differential Input Voltage1 40 V Table 3.
Output Short-Circuit Duration Indefinite Package Type θJA θJC Unit
Storage Temperature Range −65°C to +150°C 14-Lead PDIP (N-14) 76 33 °C/W
Operating Temperature Range −40°C to +85°C 16-Lead SOIC (RW-16) 92 23 °C/W
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
1
For supply voltages less than ±20 V, the absolute maximum input voltage is –
1/4
equal to the supply voltage. OP497 V1 20V p-p @ 10Hz
+
2kΩ
50kΩ
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress 50Ω
–
1/4
rating only; functional operation of the device at these or any OP497 V2
other conditions above those indicated in the operational +

section of this specification is not implied. Exposure to absolute

00309-004
V1
maximum rating conditions for extended periods may affect CHANNEL SEPARATION = 20 log ( V2/10,000 )
device reliability. Figure 4. Channel Separation Test Circuit

ESD CAUTION

Rev. E | Page 4 of 16
 OP497

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VS = ±15 V, unless otherwise noted.

50 50
TA = 25°C VS = ±15V
VS = ±15V VCM = 0V
VCM = 0V
40 40

PERCENTAGE OF UNITS
PERCENTAGE OF UNITS

30 30

20 20

10 10

0 0
00309-006

00309-009
–100 –80 –60 –40 –20 0 20 40 60 80 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
INPUT OFFSET VOLTAGE (µV) TCVOS (µV/°C)

Figure 5. Typical Distribution of Input Offset Voltage Figure 8. Typical Distribution of TCVOS

50 1k
TA = 25°C VS = ±15V
VS = ±15V VCM = 0V
VCM = 0V
40
PERCENTAGE OF UNITS

INPUT CURRENT (pA)

30

100

20
–IB

10 +IB

IOS
0 10

00309-010
00309-007

–100 –80 –60 –40 –20 0 20 40 60 80 100 –75 –50 –25 0 25 50 75 100 125
INPUT BIAS CURRENT (pA) TEMPERATURE (°C)

Figure 6. Typical Distribution of Input Bias Current Figure 9. Input Bias, Offset Current vs. Temperature

60 70
TA = 25°C TA = 25°C
VS = ±15V VS = ±15V
VCM = 0V 60
50
–IB
INPUT BIAS CURRENT (pA)
PERCENTAGE OF UNITS

50
40

40
+IB
30
30

20
20

10
10

0 0
00309-008

00309-011

0 10 20 30 40 50 60 –15 –10 –5 0 5 10 15
INPUT OFFSET CURRENT (pA) COMMON-MODE VOLTAGE (V)
Figure 7. Typical Distribution of Input Offset Current Figure 10. Input Bias Current vs. Common-Mode Voltage

Rev. E | Page 5 of 16
OP497
±3 1k
TA = 25°C TA = 25°C
VS = ±15V VS = ±2V TO ±20V
DEVIATION FROM FINAL VALUE (µV)

VCM = 0V

VOLTAGE NOISE DENSITY (nV/ Hz)

CURRENT NOISE DENSITY (fA/ Hz)

±2 100

CURRENT NOISE

VOLTAGE NOISE

±1 10

0 1

00309-012

00309-015
0 1 2 3 4 5 1 10 100 1k
TIME AFTER POWER APPLIED (Minutes) FREQUENCY (Hz)

Figure 11. Input Offset Voltage Warm-Up Drift Figure 14. Voltage Noise Density vs. Frequency

10k 10
BALANCED OR UNBALANCED TA = 25°C
VS = ±15V VS = ±2V TO ±20V
VCM = 0V
EFFECTIVE OFFSET VOLTAGE (µV)

TOTAL NOISE DENSITY (µV/ Hz)

1k 1

10Hz

1kHz

100 TA = 25°C 0.1

10 0.01
00309-013

00309-016
10 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M
SOURCE RESISTANCE (Ω) SOURCE RESISTANCE (Ω)
Figure 12. Effective Offset Voltage vs. Source Resistance Figure 15. Total Noise Density vs. Source Resistance

100
BALANCED OR UNBALANCED
VS = ±15V 5mV 1s
EFFECTIVE OFFSET VOLTAGE (µV/°C)

VCM = 0V
100
NOISE VOLTAGE (100mV/DIV)

90

10

1
10
0%
VS = ±15V
TA = 25°C

0.1
00309-014

00309-017

100 1k 10k 100k 1M 10M 100M

0 2 4 6 8 10
SOURCE RESISTANCE (Ω) TIME (Seconds)
Figure 13. Effective TCVOS vs. Source Resistance Figure 16. 0.1 Hz to 10 Hz Noise Voltage

Rev. E | Page 6 of 16
 OP497

100 160
VS = ±15V VS = ±15V
CL = 30pF TA = 25°C
80 RL = 1MΩ 140

COMMON-MODE REJECTION (dB)

TA = 25°C
GAIN
120
OPEN-LOOP GAIN (dB)

60

PHASE (Degrees)
PHASE 100
40 90
80
20 135
60

0 180
40

–20 225 20

–40 0

00309-018

00309-021
100 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 17. Open-Loop Gain and Phase vs. Frequency Figure 20. Common-Mode Rejection vs. Frequency

10k 160
VS = ±15V
TA = 25°C TA = 25°C
140

POWER SUPPLY REJECTION (dB)

120
OPEN-LOOP GAIN (V/mV)

TA = 125°C –PSR
100
+PSR
1k 80

60

40

20
VS = ±15V
VO = ±10V
100 0
00309-019

00309-022
1 10 20 1 10 100 1k 10k 100k 1M
LOAD RESISTANCE (kΩ) FREQUENCY (Hz)
Figure 18. Open-Loop Gain vs. Load Resistance Figure 21. Power Supply Rejection vs. Frequency

35
RL = 2kΩ VS = ±15V
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)

VS = ±15V TA = 25°C
VCN = ±10V 30 AVCL = +1
1% THD
TA = 125°C RL = 10kΩ
OUTPUT SWING (V p-p)

25

TA = 25°C 20

15

10

0
00309-020

00309-023

–15 –10 –5 0 5 10 15 100 1k 10k 100k

OUTPUT VOLTAGE (V) FREQUENCY (Hz)
Figure 19. Open-Loop Gain Linearity Figure 22. Maximum Output Swing vs. Frequency

Rev. E | Page 7 of 16
OP497
+VS 700
TA = 25°C NO LOAD

SUPPLY CURRENT (PER AMPLIFIER) (µA)

–0.5
INPUT COMMON-MODE VOLTAGE (V)
(REFERRED TO SUPPLY VOLTAGES)

600 125°C
–1.0
25°C
–1.5
500

400
1.5

1.0
300
0.5

–VS 200

00309-024

00309-027
0 ±5 ±10 ±15 ±20 0 ±5 ±10 ±15 ±20
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
Figure 23. Input Common-Mode Voltage Range vs. Supply Voltage Figure 26. Supply Current (per Amplifier) vs. Supply Voltage

35 1k
VS = ±15V VS = ±15V
TA = 25°C TA = 25°C
30 AVCL = +1
1% THD 100
fO = 1kHz
OUTPUT SWING (V p-p)

25
IMPEDANCE (Ω) 10

20
1
15 AV = +1

0.1
10

0.01
5

0 0.001

00309-028
00309-025

10 100 1k 10k 1 10 100 1k 10k 100k

LOAD RESISTANCE (Ω) FREQUENCY (Hz)

Figure 24. Maximum Output Swing vs. Load Resistance Figure 27. Closed-Loop Output Impedance vs. Frequency

+VS 35
TA = 25°C
RL = 10kΩ 30
–0.5
(REFERRED TO SUPPLY VOLTAGES)

SHORT-CIRCUIT CURRENT (mA)

25
OUTPUT VOLTAGE SWING (V)

TA = 25°C
–1.0
20 TA = 125°C
–1.5 15
VS = ±15V
OUTPUT SHORTED
TO GROUND
–15
1.5
–20 TA = 125°C
1.0
–25
TA = 25°C
0.5 –30

–VS –35
00309-029
00309-026

0 ±5 ±10 ±15 ±20 0 1 2 3 4

SUPPLY VOLTAGE (V) TIME FROM OUTPUT SHORT (Minutes)

Figure 25. Output Voltage Swing vs. Supply Voltage Figure 28. Short-Circuit Current vs. Time at Various Temperatures

Rev. E | Page 8 of 16
 OP497
70
VS = ±15V
TA = 25°C
60 AVCL = +1
VOUT = 100mV p-p

50
OVERSHOOT (%)

40

30

20

10

00309-030
10 100 1k 10k
LOAD CAPACITANCE (pF)
Figure 29. Small-Signal Overshoot vs. Load Capacitance

Rev. E | Page 9 of 16
OP497

APPLICATIONS INFORMATION
Extremely low bias current makes the OP497 attractive for use
in sample-and-hold amplifiers, peak detectors, and log amplifiers
100
that must operate over a wide temperature range. Balancing 90
input resistances is not necessary with the OP497. High source
resistance, even when unbalanced, only minimally degrades the
offset voltage and TCVOS.
The input pins of the OP497 are protected against large differential
voltage by back-to-back diodes and current-limiting resistors. 10
0%
Common-mode voltages at the inputs are not restricted and

00309-033
may vary over the full range of the supply voltages used. 20mV 5µs

The OP497 requires very little operating headroom about the Figure 31. Small Signal Transient Response (CLOAD = 1000 pF, AVCL = +1)
supply rails and is specified for operation with supplies as low as
±2 V. Typically, the common-mode range extends to within 1 V
of either rail. When using a 10 kΩ load, the output typically
swings to within 1 V of the rails.
100

AC PERFORMANCE 90

The ac characteristics of the OP497 are highly stable over its full
operating temperature range. Figure 30 shows the unity-gain
small signal response. Extremely tolerant of capacitive loading
on the output, the OP497 displays excellent response even with
10
1000 pF loads (see Figure 31). 0%

00309-034
2V 50µs

100 Figure 32. Large Signal Transient Response (AVCL = +1)

90

10
0%
00309-032

20mV 5µs

Figure 30. Small Signal Transient Response (CLOAD = 100 pF, AVCL = +1)

V+

VOUT

2.5kΩ
–IN

2.5kΩ
+IN
00309-031

V–

Figure 33. Simplified Schematic Showing One Amplifier

Rev. E | Page 10 of 16
 OP497
GUARDING AND SHIELDING OPEN-LOOP GAIN LINEARITY
To maintain the extremely high input impedances of the OP497, The OP497 has both an extremely high gain of 2000 V/mV
care must be taken in circuit board layout and manufacturing. typical and constant gain linearity. This enhances the precision
Board surfaces must be kept scrupulously clean and free of of the OP497 and provides for very high accuracy in high
moisture. Conformal coating is recommended to provide a closed-loop gain applications. Figure 35 illustrates the typical
humidity barrier. Even a clean PCB can have 100 pA of leakage open-loop gain linearity of the OP497.
currents between adjacent traces; therefore, use guard rings RL = 10kΩ

DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)

around the inputs. Guard traces are operated at a voltage close VS = ±15V
VCM = 0V
to that on the inputs, as shown in Figure 34, so that leakage
TA = 125°C
currents become minimal. In noninverting applications, connect
the guard ring to the common-mode voltage at the inverting
input. In inverting applications, both inputs remain at ground; TA = 25°C
therefore, the guard trace should be grounded. Place guard
traces on both sides of the circuit board.
UNITY-GAIN FOLLOWER NONINVERTING AMPLIFIER

– –
1/4 1/4
OP497 OP497
+ +

00309-036
–15 –10 –5 0 5 10 15
OUTPUT VOLTAGE (V)

INVERTING AMPLIFIER PDIP Figure 35. Open-Loop Gain Linearity

BOTTOM VIEW

8 1
–
1/4 A
OP497
+ B
00309-035

Figure 34. Guard Ring Layout and Connections

Rev. E | Page 11 of 16
OP497

APPLICATIONS CIRCUIT
PRECISION ABSOLUTE VALUE AMPLIFIER PRECISION POSITIVE PEAK DETECTOR
The circuit in Figure 36 is a precision absolute value amplifier In Figure 38, the CH must be of polystyrene, Teflon®, or
with an input impedance of 30 MΩ. The high gain and low polyethylene to minimize dielectric absorption and leakage.
TCVOS of the OP497 ensure accurate operation with microvolt The droop rate is determined by the size of CH and the bias
input signals. In this circuit, the input always appears as a common- current of the OP497.
mode signal to the op amps. The CMR of the OP497 exceeds 1kΩ
+15V
120 dB, yielding an error of less than 2 ppm.
0.1µF
1N4148
+15V 2

+
6
1/4 1 8
OP497 2N930 1/4 7
C2 R1 R3 1kΩ 3 VOUT
VIN 1kΩ 5 OP497
0.1µF 1kΩ 1kΩ
+ 4
0.1µF
CH
C1 D1 6

+
30pF 1N4148
2 8 1/4 7 1kΩ

00309-039
1/4 OP497 –15V
1 5 0V < VOUT < 10V RESET
OP497
3 D2
VIN C3 R2
4 0.1µF 1N4148 2kΩ Figure 38. Precision Positive Peak Detector
00309-037

SIMPLE BRIDGE CONDITIONING AMPLIFIER

–15V
Figure 39 shows a simple bridge conditioning amplifier using
Figure 36. Precision Absolute Value Amplifier
the OP497. The transfer function is
PRECISION CURRENT PUMP
⎛ ΔR ⎞ RF
Maximum output current of the precision current pump shown VOUT = VREF ⎜ ⎟
⎜ R + ΔR ⎟ R
in Figure 37 is ±10 mA. Voltage compliance is ±10 V with ±15 V ⎝ ⎠
supplies. Output impedance of the current transmitter exceeds The REF43 provides an accurate and stable reference voltage for
3 MΩ with linearity better than 16 bits. the bridge. To maintain the highest circuit accuracy, RF should
R3
10kΩ
be 0.1% or better with a low temperature coefficient.
R1 +5V
10kΩ 2
– R5 2
1/4 10kΩ IOUT
VIN R2 1
6 2.5V VREF RF
10kΩ OP497 ±10mA REF43
3 R
+ +15V R
4
2
8
R4 5 1/4 1
10kΩ VOUT
7 1/4 R R + ΔR 3
OP497
OP497
6
VIN VIN
IOUT = = = 10mA/V 4 +5V
R5 100Ω
00309-038

RF
–15V
6
1/4
8
7
VOUT = VREF ( R ΔR
+ ΔR ) R
OP497
Figure 37. Precision Current Pump 5
4
00309-040

–5V

Figure 39. Simple Bridge Conditioning Amplifier Using the OP497

Rev. E | Page 12 of 16
 OP497
NONLINEAR CIRCUITS A similar analysis made for the square root amplifier circuit in
Due to its low input bias currents, the OP497 is an ideal log Figure 41 leads to its transfer function
amplifier in nonlinear circuits, such as the squaring amplifier (V IN )(I REF )
and square root amplifier circuits shown in Figure 40 and VOUT = R2
R1
Figure 41. Using the squaring amplifier circuit in Figure 40
as an example, the analysis begins by writing a voltage loop In these circuits, IREF is a function of the negative power supply. To
equation across Transistors Q1, Q2, Q3, and Q4. maintain accuracy, the negative supply should be well regulated.
For applications where very high accuracy is required, a voltage
⎛I ⎞ ⎛I ⎞ ⎛ I ⎞ ⎛I ⎞ reference can be used to set IREF. An important consideration for
VT1In⎜⎜ IN ⎟⎟ + VT2In⎜⎜ IN ⎟⎟ = VT3In⎜⎜ I O ⎟⎟ + VT4In⎜⎜ REF ⎟⎟
⎝ IS1 ⎠ ⎝ IS2 ⎠ ⎝ IS3 ⎠ ⎝ IS4 ⎠ the squaring circuit is that a sufficiently large input voltage can
force the output beyond the operating range of the output op
All the transistors in the MAT04 are precisely matched and at
amp. Resistor R4 can be changed to scale IREF, or R1 and R2 can
the same temperature; therefore, the IS and VT terms cancel,
be varied to keep the output voltage within the usable range.
giving
R2
33kΩ
2InIIN = InIO + InIREF = In (IO × IREF)
Exponentiating both sides of the thick equation lead to C2
100pF
(I IN )
6
2
1/4
IO =
7 VOUT
IO OP497
I REF 5

Op amp A2 forms a current-to-voltage converter which results IIN

Q1 1 MAT04 IREF
2
in VOUT = R2 × IO. Substituting (VIN/R1) for IIN and the previous
C1 3
equation for IO yields 100pF 13
14

Q4
7 8
⎛ R2 ⎞ ⎛ V IN ⎞ 2 12
VOUT = ⎜⎜ ⎟⎜
V+ 6 9
⎟ ⎝ R1 ⎟⎠
Q2 Q3
R1
⎝ I REF ⎠ VIN
33kΩ 2 8
5 10

1/4 1
OP497
3 R5 R3
2kΩ 50kΩ R4
4
C2 50kΩ

00309-042
100pF
V– –15V
Figure 41. Square Root Amplifier
R2
A2 33kΩ
6
1/4
Unadjusted accuracy of the square root circuit is better than
7
VOUT
1
IO
5
OP497 0.1% over an input voltage range of 100 mV to 10 V. For a similar
2
Q1
input voltage range, the accuracy of the squaring circuit is better
7
3 6
Q2
than 0.5%.
5 MAT04 14
8 13
IREF Q4
9
Q3
V+ C1 12
R1 A1
133kΩ IIN 100pF 10
2
VIN 8
1/4 1
OP497 R3
3
4 50kΩ R4
50kΩ
00309-041

V– –15V

Figure 40. Squaring Amplifier

Rev. E | Page 13 of 16
OP497

OUTLINE DIMENSIONS
0.775 (19.69)
0.750 (19.05)
0.735 (18.67)

14 8 0.280 (7.11)
0.250 (6.35)
1 0.240 (6.10)
7
0.325 (8.26)
0.310 (7.87)
0.100 (2.54) 0.300 (7.62)
BSC
0.060 (1.52) 0.195 (4.95)
0.210 (5.33) MAX 0.130 (3.30)
MAX 0.115 (2.92)
0.015
0.150 (3.81) (0.38) 0.015 (0.38)
0.130 (3.30) MIN GAUGE
0.110 (2.79) PLANE 0.014 (0.36)
SEATING
PLANE 0.010 (0.25)
0.022 (0.56) 0.008 (0.20)
0.005 (0.13) 0.430 (10.92)
0.018 (0.46) MIN MAX
0.014 (0.36)
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

070606-A
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 42. 14-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body
(N-14)
Dimensions shown in inches and (millimeters)

10.50 (0.4134)
10.10 (0.3976)

16 9
7.60 (0.2992)
7.40 (0.2913)

1 10.65 (0.4193)
8
10.00 (0.3937)

1.27 (0.0500) 0.75 (0.0295)

BSC 45°
2.65 (0.1043) 0.25 (0.0098)
0.30 (0.0118) 2.35 (0.0925)
8°
0.10 (0.0039) 0°
COPLANARITY
0.10 0.51 (0.0201) SEATING 1.27 (0.0500)
PLANE 0.33 (0.0130)
0.31 (0.0122) 0.20 (0.0079) 0.40 (0.0157)

COMPLIANT TO JEDEC STANDARDS MS-013- AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
032707-B

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 43. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)

Rev. E | Page 14 of 16
 OP497
ORDERING GUIDE
Model Temperature Range Package Description Package Option
OP497FP −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
OP497FPZ 1 −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
OP497GP −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
OP497GPZ1 −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
OP497FS −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497FS-REEL −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497FSZ1 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497FSZ-REEL −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497GS −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W RW-16
OP497GS-REEL −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497GSZ1 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
OP497GSZ-REEL1 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
1
Z = RoHS Compliant Part.

Rev. E | Page 15 of 16
OP497

NOTES

©1991–2009 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D00309-0-2/09(E)

Rev. E | Page 16 of 16