3.

3 8051 Instruction set

3.3 8051 Instruction set

Module:3 Microcontroller Architecture: Intel 8051

Course: BECE204L – Microprocessors and Microcontrollers
-Dr Richards Joe Stanislaus
Assistant Professor - SENSE
Email: richards.stanislaus@vit.ac.in
 3.3 8051 Instruction set

Module:3 Microcontroller Architecture:

Intel 8051

• Microcontroller 8051 - Organization and Architecture, RAM-ROM

Organization, Machine Cycle, Instruction set: Addressing modes,
Data Processing - Stack, Arithmetic, Logical; Branching –
Unconditional and Conditional, Assembly programming.

Mohammad Ali Mazidi, Janice G. Mazidi, Rolin D. McKinlay, The 8051 Microcontroller and
Embedded Systems, 2014, 2nd Edition, Pearson, India.
 3.3 8051 Instruction set

1. Instruction Set
• The process of writing program for the microcontroller mainly
consists of
giving instructions (commands) in the specific order in which
they should be executed
in order to carry out a specific task.
• As electronics cannot “understand” what for example an instruction
“if the push button is pressed- turn the light on” means,
then a certain number of simpler and precisely defined orders
that decoder can recognize must be used.
• All commands are known as INSTRUCTION SET.
 3.3 8051 Instruction set

1. Instruction Set
• All microcontrollers compatible with the 8051 have in total of 255
instructions, i.e. 255 different words available for program writing.
• Many instructions are considered to be “different”, even though they
perform the same operation,
so there are only 111 truly different commands.
• For example:
ADD A,R0,
ADD A,R1, ... ADD A,R7
are instructions that perform the same operation (addition of the
accumulator and register). Taking into account that all instructions
perform only 53 operations (addition, subtraction, copy etc.)
 3.3 8051 Instruction set

1. Instruction Set
8051 instructions have 8-bit opcode
• There are 256 possible instructions of which 255 are implemented
• Every 8-bit opcode from 00 to FF is used except for A5.
• Some instructions have one or two additional bytes for data or
address
• There are 139 1-byte instructions,
92 2-byte instructions, and
24 3-byte instruction
 3.3 8051 Instruction set

1. Instruction Set
Depending on operation they perform, all instructions are divided in 5
groups:
• Arithmetic Instructions
• Logic Instructions
• Program Branching Instructions
• Boolean or Bit-oriented Instructions
• Data Transfer Instructions
 3.3 8051 Instruction set

1. Instruction Set
DATA PROGRAM
ARITHMETIC LOGICAL BOOLEAN
TRANSFER BRANCHING
JMP / SJMP / AJMP/
MOV ADD / ADDC ANL CLR
LJMP
MOVC SUBB ORL SETB LCALL / ACALL
MOVX INC XRL MOV RET / RETI
PUSH DEC ANL JZ / JNZ
POP MUL ORL JC /JNC
XCH DIV CPL JB / JNB
XCHD DA A JBC
CLR CJNE
CPL DJNZ
RL / RLC NOP
RR / RRC
SWAP
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• Using Arithmetic Instructions, you can perform addition,
subtraction, multiplication and division.
• The arithmetic instructions also include increment by one,
decrement by one and Decimal Adjust Accumulator.
• The arithmetic instructions has no knowledge about the data
format i.e. signed, unsigned, ASCII, BCD, etc.
• The operations performed by the arithmetic instructions affect flags
like carry, overflow, zero, etc. in the PSW
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• The Mnemonics associated with the Arithmetic Instructions of the
8051 Microcontroller Instruction Set are:
ADD CLR
ADDC CPL
SUBB RL
MUL RLC
DIV RR
INC RRC
DEC SWAP
DA A
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• ADD:
8 bit addition with accumulator (A) and second operand
Result is always in accumulator.
CY flag is set/reset appropriately
• ADDC
8 bit addition between accumulator, a second operand and the
previous value of CY flag
Useful for 16 bit addition in two steps.
CY flag is set/reset appropriately
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Decrement R2 and
Jump when Not zero to
AGAIN
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Analysis of 6.2
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 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• SUBB:
Subtract with borrow
Subtract an operand and previous value of borrow (carry) flag from
accumulator (A)
A = A - <operand> - CY
Result is always saved in accumulator.
CY flag is set/reset appropriately
3.3 8051 Instruction set
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• MUL AB / DIV AB
Multiply A by B and place the result in A:B
Divide A by B and place the result in A:B
• Multiplication – single byte product

• Result in A and B with

Lower byte in A and
Higher byte in B
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
• MUL AB / DIV AB
Multiply A by B and place the result in A:B
Divide A by B and place the result in A:B
• Divide – single byte division (If B is zero, A/B will set Over flow flag)
• Result in A and B with
Quotient byte in A and
Remainder byte in B
3.3 8051 Instruction set
3.3 8051 Instruction set
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
a. ARITHMETIC INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
b. LOGICAL INSTRUCTIONS
• The Logical Instructions perform logical operations like
AND, OR, XOR.
• Logical Instruction are performed on Bytes of data on a bit-by-bit
basis.
• ANL
• ORL
• XRL
 3.3 8051 Instruction set

1. Instruction Set
b. LOGICAL INSTRUCTIONS
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 3.3 8051 Instruction set

1. Instruction Set
c. BOOLEAN or BIT ORIENTED INSTRUCTIONS
• The Boolean or Bit Manipulation Instructions will deal with bit
variables.
• We know that there is a special bit-addressable area in the RAM
and some of the Special Function Registers (SFRs) are also bit
addressable.
• CLR
• SETB
• CPL
• MOV
• ANL
• ORL
 3.3 8051 Instruction set

1. Instruction Set
c. BOOLEAN or BIT ORIENTED INSTRUCTIONS
 3.3 8051 Instruction set

In Data
memory
(RAM), the
Addresses
of each bit
memory
 3.3 8051 Instruction set

1. Instruction Set
c. BOOLEAN or BIT ORIENTED INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
c. BOOLEAN or BIT ORIENTED INSTRUCTIONS
 3.3 8051 Instruction set

Single bit operations with carry

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Swap A
3.3 8051 Instruction set
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
• These instructions control the flow of program logic.

SJMP JZ / JNZ
LJMP JC / JNC
AJMP JB / JNB
JMP JBC
LCALL CJNE
ACALL DJNZ
RET NOP
RETI
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
• These instructions control the flow of program logic.
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
In 64KB memory: AJMP address; In this type of jump
instruction , the whole 64Kb memory is divided into 32
parts ( each part is known as page ) each consisting of
2KB of memory. Each page consists of 2048 locations.
Absolute jump is performed inside a page only.
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
d. PROGRAM BRANCHING INSTRUCTIONS
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Delay using nested loop

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1. Instruction Set
e. DATA TRANSFER INSTRUCTIONS
• The Data Transfer Instructions are associated with transfer with data
between registers or external program memory or external data
memory. MOV
MOVC
MOVX
PUSH
POP
XCH
XCHD
3.3 8051 Instruction set
 3.3 8051 Instruction set

1. Instruction Set
e. DATA TRANSFER INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
e. DATA TRANSFER INSTRUCTIONS
 3.3 8051 Instruction set

1. Instruction Set
e. DATA TRANSFER INSTRUCTIONS
3.3 8051 Instruction set
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2. Arithmetic Flags
• Flag: It is a 1-bit register that indicates the status of the result
from an operation
• Flags are either at a flag-state of value 0 or 1
• Arithmetic flags indicate the status of the results from mathematical
operations (+, -, *, /)
• There are 4 arithmetic flags in the 8051:
Carry (C), Auxiliary Carry (AC),
Overflow (OV), Parity (P)
• All the above flags are stored in the Program Status Word(PSW)
 3.3 8051 Instruction set

2. Arithmetic Flags
• Instructions that affect Flag
 3.3 8051 Instruction set

2. Arithmetic Flags
• Instructions that affect Flag
 3.3 8051 Instruction set

Show how the flag register is affected by the following

instructions.
MOV A, #0F5h ; A = F5h
ADD A, #0Bh ; A = F5 + 0B = 00

Solution F5h 1111 0101

+ 0Bh + 0000 1011
100h 0000 0000
After the addition, register A (destination) contains 00 and the flags
are:
CY = 1 since there is a carry out from D7
P = 0 because the number of 1s is zero
AC = 1 since there is a carry from D3 to D4
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Overflow problem
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Rotate left
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Rotate Right
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Rotate Right through carry

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Rotate left through carry

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Machine cycle examples: Loop

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3.3 8051 Instruction set