Basics

Microprocessor &
Microcontroller

1
 What is Microcontroller?

Micro Controller

Very Small A mechanism that controls

the operation of a machine

2
 Microprocessors
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example: Intel's x86, Motorola’s 680x0

3
 Microcontroller
A smaller computer
On-chip RAM, ROM, I/O ports...
Example: Motorola’s 6811, Intel’s 8051, Zilog’s Z8
and PIC

4
5
Microprocessor vs. Microcontroller

Microprocessor Microcontroller

• CPU is stand-alone, RAM, • CPU, RAM, ROM, I/O and timer are
all on a single chip
ROM, I/O, timer are separate
• Fix amount of on-chip ROM, RAM,
• Designer can decide on the I/O ports
amount of ROM, RAM and I/O
ports. • For applications in which cost,
power and space are critical
• Expansive
• Not Expansive
• General-purpose
• Single-purpose

6
 Microcontrollers Applications
• Home
– Appliances, intercom, telephones, security systems,
garage door openers, answering machines, fax machines,
home computers, TVs, cable TV tuner, VCR, camcorder,
remote controls, video games, cellular phones, musical
instruments, sewing machines, lighting control, paging,
camera, pinball machines, toys, exercise equipment etc.

Office
– Telephones, computers, security systems, fax machines,
microwave, copier, laser printer, color printer, paging etc.

• Auto
– Trip computer, engine control, air bag, ABS,
instrumentation, security system, transmission control,
entertainment, climate control, cellular phone, keyless
entry 7
8
 UNIT-4
8051
MICROCONTROLLER

9
 UNIT 4 Syllabus
• Architecture of 8051
• Special Function Registers(SFRs)
• I/O Pins Ports and Circuits {Pin Diagram}
• Instruction set
• Addressing modes
• Assembly language programming

10
 8051 Family
• The 8051 is a subset of the 8052
• The 8031 is a ROM-less 8051
– Add external ROM to it
– You lose two ports, and leave only 2 ports for I/O operations

11
 Introduction to
8051
MICROCONTROLLER

12
 8051 Microcontroller
• Intel introduced 8051, developed in the
year 1981.

• The 8051 is an 8-bit controller.

– D0-D7 DATA LINES
– A0-A15 ADDRESS LINES

13
 General Block Diagram of 8051
External Interrupts

Interrupt 4K 256 B
Control ROM RAM
Counter
Inputs

8bit
CPU

Bus Serial
OSC 4 I/O Ports
Control Port

TXD RXD 14
P0 P1 P2 P3
 8051 Features
• 8 bit CPU
• On-chip clock oscillator
• 4K bytes of on-chip Program Memory-
ROM
• 128 bytes of on-chip Data RAM
• 64KB Program Memory address space
• 64KB Data Memory address space
• 32 bidirectional I/0 lines (Port 0,1,2,3)
Port 0 { P0.0-P0.7 } – 8 pins
Port 1 { P1.0-P1.7 } – 8 pins
Port 2 { P2.0-P2.7 } – 8 pins
Port 3 { P3.0-P3.7 } – 8 pins 15
• Two 16-bit timer/counters(Timer 1,Timer 0)
• One serial port
UART(Universal Asynchronous Receiver Transmitter)
• 6-source interrupt structure
1. External interrupt INT0
2. Timer interrupt T0
3. External interrupt INT1
4. Timer interrupt T1
5. Serial communication interrupt
6. Timer Interrupt T2
– 4 Register Banks (Bank 0, Bank 1, Bank 2,
Bank 3)
each bank has R0-R7 registers

16
Pin Description
of the 8051
17
Pin Diagram of the 8051 / IO ports

18
 EA/VPP
• EA, “external access’’

• EA = 0, 8051 microcontroller access

from external program memory (ROM)
only.

• EA = 1, then it access internal and

external program memories (ROMS).

19
 I/O Port Pins
• The four 8-bit I/O ports

Port 0 { P0.0-P0.7 } – 8 pins

Port 1 { P1.0-P1.7 } – 8 pins
Port 2 { P2.0-P2.7 } – 8 pins
Port 3 { P3.0-P3.7 } – 8 pins

20
 Port 3
• Port 3 can be used as input or output.

• Port 3 has the additional function of

providing some extremely important
signals

21
 Pin Description Summary
PIN TYPE NAME AND FUNCTION
Vss I Ground: 0 V reference.
Vcc I Power Supply + 5V.

I/O Port 0: Port 0 is also the multiplexed low-order address and

P0.0 - data bus during accesses to external program and data
P0.7 memory.

P1.0 - I/O Port 1: Port 1 is an 8-bit bi-directional simple I/O port.

P1.7
I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
P2.0 - high order address byte
P2.7

P3.0 - I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
P3.7 serves special features as explained. 22
 Pin Description Summary
PIN TYPE NAME AND FUNCTION
RST I Reset: resets the device.
ALE O Address Latch Enable:
When ALE=0, it provides data D0-D7
When ALE=1, it has address A0-A7

PSEN* O Program Store Enable:

For External Code Memory, PSEN = 0
For External Data Memory, PSEN = 1

EA*/VPP I External Access Enable/Programming Supply Voltage:

EA = 0, 8051 microcontroller access from external program
memory (ROM) only.
EA = 1, then it access internal and external program
memories (ROMS).

23
Architecture of
8051
microcontroller

24
25
26
Program Counter(PC) : The program
counter always points to the address of the
next instruction to be executed.
Stack Pointer Register (SP) : It is
an 8-bit register which stores the address of
the stack top.
ALU: perform arithmetic & logical operations
Flags : Carry(C),Auxiliary Carry(AC),
Overflow(O) & Parity(P)

27
• Timing & Control: Timing and control unit
synchronises all microcontroller operations
with clock & generates control signals.
• DPTR: (Data Pointer) - 16 bit
• DPH-Data Pointer High – 8 bit
• DPL-Data Pointer Low – 8 bit
DPTR Register is usually used for storing data and
intermediate results.

28
 8051
Program Memory,
Data Memory
structure
29
 8051 Memory Structure

External

External
60K
64K 64K

SFR

EXT INT 4K 128

EA = 0 EA = 1

Program Memory Data Memory 30

Special Function
Registers [SFR]

31
• A Register (Accumulator)
• B Register
• Program Status Word (PSW) Register
• Data Pointer Register (DPTR)
– DPH (Data Pointer High) , DPL(Data Pointer
Low)
• Stack Pointer (SP) Register
• P0, P1, P2, P3 - Input/output port Registers
• Timer T0 - TH0 & TL0
• Timer T1 – TH1 & TL1
• Timer Control (TCON) Register
• Serial Port Control (SCON) Register
• Serial Buffer Control (SBUF) Register
• IP Register (Interrupt Priority)
• IE Register (Interrupt Enable)
32
 8051 Register Bank Structure
4 MEMORY BANKS

Bank R0 R1 R2 R3 R4 R5 R6 R7
3
Bank R0 R1 R2 R3 R4 R5 R6 R7
2
Bank R0 R1 R2 R3 R4 R5 R6 R7
1
Bank R0 R1 R2 R3 R4 R5 R6 R7
0

33
 Program Status Word [PSW]

C AC F0 RS1 RS0 OV F1 P
Carry Parity
Auxiliary Carry User Flag 1

User Flag 0 Register Bank Select Overflow

00-Bank 0
01-Bank 1
10-Bank 2
11-Bank 3
34
 Data Pointer Register (DPTR)
It consists of two separate registers:
DPH (Data Pointer High) &
DPL (Data Pointer Low).

35
 Stack Pointer (SP) Register

8 bit

P0, P1, P2, P3 – Input / Output Registers

8 bit

8 bit

8 bit

8 bit
36
INSTRUCTION
SET OF
8051
37
 8051 Instruction Set
• The instructions are grouped into 5
groups
– Arithmetic
– Logic
– Data Transfer
– Boolean
– Branching

38
1. Arithmetic Instructions
• ADD A, source
A  A + <operand>.

• ADDC A, source
A  A + <operand> + CY.
• SUBB A, source
A  A - <operand> -
CY{borrow}.

39
• INC
– Increment the operand by one. Ex: INC
DPTR

• DEC
– Decrement the operand by one. Ex: DEC B
• MUL Multiplication
AB Result
8 byte * 8 byte A*B A=low byte,
B=high byte

• DIV AB
Division Quotient Remainder
8 byte /8 byte
A/B A B
40
 Multiplication of Numbers
MUL AB ; A  B, place 16-bit result in B and A
A=07 , B=02
MUL AB ;07 * 02 = 000E where B = 00
and A = 0E

Division of Numbers
DIV AB ; A / B , 8-bit Quotient result in A &
8-bit Remainder result in B
A=07 , B=02
DIV AB ;07 / 02 = Quotient 03(A) Remainder
01 (B) 41
 2. Logical
instructions

42
• ANL D,S
-Performs logical AND of destination & source
- Eg: ANL A,#0FH ANL A,R5
• ORL D,S
-Performs logical OR of destination & source
- Eg: ORL A,#28H ORL A,@R0

• XRL D,S
-Performs logical XOR of destination & source
- Eg: XRL A,#28H XRL A,@R0

43
• CPL A
-Compliment accumulator
-gives 1’s compliment of accumulator data
• RL A
-Rotate data of accumulator towards left without
carry
• RLC A
- Rotate data of accumulator towards left with carry
• RR A
-Rotate data of accumulator towards right without
carry
• RRC A
- Rotate data of accumulator towards right with
carry
44
3. Data Transfer
Instructions

45
 MOV Instruction
• MOV destination, source ; copy source to
destination.

• MOV A,#55H ;load value 55H into reg. A

MOV R0,A ;copy contents of A into R0
;(now A=R0=55H)
MOV R1,A ;copy contents of A into R1
;(now A=R0=R1=55H)
MOV R2,A ;copy contents of A into R2
;(now A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3
;(now R3=95H)
MOV A,R3 ;copy contents of R3 into A
;now A=R3=95H
46
• MOVX
– Data transfer between the
accumulator and a byte from external
data memory.
• MOVX A, @DPTR
• MOVX @DPTR, A

47
• PUSH / POP
– Push and Pop a data byte onto the
stack.

• PUSH DPL
• POP 40H

48
• XCH
– Exchange accumulator and a byte
variable
• XCH A, Rn
• XCH A, direct
• XCH A, @Ri

49
4.Boolean variable
instructions

50
CLR:
• The operation clears the specified bit
indicated in the instruction
• Ex: CLR C clear the carry
SETB:
• The operation sets the specified bit to
1.
CPL:
• The operation complements the
specified bit indicated in the instruction
51
• ANL C,<Source-bit>

-Performs AND bit addressed with the carry bit.

- Eg: ANL C,P2.7 AND carry flag with bit 7
of P2

• ORL C,<Source-bit>

-Performs OR bit addressed with the carry bit.

- Eg: ORL C,P2.1 OR carry flag with bit 1 of
P2
52
• XORL C,<Source-bit>

-Performs XOR bit addressed with the carry bit.

- Eg: XOL C,P2.1 OR carry flag with bit 1 of P2

• MOV P2.3,C
• MOV C,P3.3
• MOV P2.0,C

53
5. Branching
instructions

54
 Jump Instructions
• LJMP (long jump):
– Original 8051 has only 4KB on-chip
ROM

• SJMP (short jump):

– 1-byte relative address: -128 to +127

55
 Call Instructions
• LCALL (long call):
– Target address within 64K-byte range

• ACALL (absolute call):

– Target address within 2K-byte range

56
• 2 forms for the return instruction:
– Return from subroutine – RET
– Return from ISR – RETI

57
58
 8051
Addressing
Modes
8051 Addressing Modes

60
 1. Immediate Addressing Mode
• The immediate data sign, “#”
• Data is provided as a part of instruction.

61
 2. Register Addressing Mode
• In the Register Addressing mode, the instruction
involves transfer of information between registers.

62
 3. Direct Addressing Mode
• This mode allows you to specify the operand by
giving its actual memory address

63
 4. Indirect Addressing Mode
• A register is used as a pointer to the data.
• Only register R0 and R1 are used for this purpose.
• R2 – R7 cannot be used to hold the address of an
operand located in RAM.
• When R0 and R1 hold the addresses of RAM
locations, they must be preceded by the “@” sign.

MOVX A,@DPTR
64
 5. Relative Addressing
• This mode of addressing is used with some type
of jump instructions, like SJMP (short jump) and
conditional jumps like JNZ

Loop : DEC A ;Decrement A

JNZ Loop ;If A is not zero, Loop

65
 6. Absolute Addressing
• In Absolute Addressing mode, the
absolute address, to which the
control is transferred, is specified by
a label.
• Two instructions associated with this
mode of addressing are ACALL and
AJMP instructions.
• These are 2-byte instructions

66
 7. Long Addressing
• This mode of addressing is used with
the LCALL and LJMP instructions.
• It is a 3-byte instruction
• It allows use of the full 64K code
space.

67
 8. Indexed Addressing
• The Indexed addressing is useful
when there is a need to retrieve data
from a look-up table (LUT).

68
 8051
Assembly
Language
Programming(ALP)
69
ADDITION OF TWO 8 bit Numbers
ADDRESS LABEL MNEMONICS

9100: MOV A,#05

MOV B,#03
ADD A,B
MOV DPTR,#9200
MOVX @DPTR,A
HERE SJMP HERE

After execution: A=08 70

SUBTRACTION OF TWO 8 bit Numbers
ADDRESS LABEL MNEMONICS

9100: CLR C

MOV A,#05
MOV B,#03
SUBB A,B
MOV DPTR,#9200
MOVX @DPTR,A
HERE SJMP HERE
After execution: A=02 71
 MULTIPLICATION OF TWO 8 DIVISION OF TWO 8 bit
bit Numbers Numbers
Address Label Mnemonics Address Label Mnemonics

START MOV A,#05 9000 START MOV A,#05

9000

MOV B,#03 MOV B,#03

MUL AB DIV AB

MOV DPTR,#9200 MOV DPTR,#9200

MOVX @ DPTR,A MOVX @ DPTR,A

INC DPTR INC DPTR

MOV A,B MOV A,B

MOVX @DPTR,A MOVX @DPTR,A

HERE SJMP HERE HERE SJMP HERE

After execution: A=0F , B=00 After execution: A=01 , B=02

 Average of N (N=5) 8 bit Numbers
MOV 40H, #02H store 1st number in location 40H
MOV 41H, #04H
MOV 42H, #06H
MOV 43H, #08H
MOV 44H, #01H
MOV R0, #40H store 1 st number address 40H in R0
MOV R5, #05H store the count {N=05} in R5
MOV B,R5 store the count {N=05} in B
CLR A Clear Acc
LOOP: ADD A,@R0
INC R0
DJNZ R5,LOOP
DIV AB
MOV 55H,A Save the quotient in location 55H
HERE SJMP HERE

Answer: 02+04+06+08+01 = 21(decimal) = 15 (Hexa)

SUM = 15 H Average = 21(decimal) / 5 = 04 (remainder) , 01 (quotient)
55 quotient