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These PowerPoint color

diagrams can only be used by


instructors if the 3rd Edition
has been adopted for his/her
course. Permission is given to
individuals who have
purchased a copy of the third
edition with CD-ROM
Electronic Materials and
Devices to use these slides in
seminar, symposium and
conference presentations
provided that the book title,
author and © McGraw-Hill are
displayed under each diagram.
pn Junction Si solar cells at work. Honda‘s two seated Dream car is
powered by photovoltaics. The Honda Dream was first to finish 3,010 km
in four days in the 1996 World Solar Challenge.

|SOURCE: Courtesy of Centre for Photovoltaic Engineering, University of New South Wales,
Sydney, Australia.
p n
B- As+
h+ (a)
e-
M
Metallurgical Junction
Neutral p-region Eo Neutral n-region

(b)

M
Space charge region
Wp Wn
log(n), log(p)
ppo
nno
ni (c)

npo pno
x=0
x
 net
M

eNd
-Wp

Wn
x (d)

-eNa

Properties of the pn junction


M
E(x)
-W p 0 Wn
x
(e)

Eo
V(x)
Vo
(f)

x
PE(x)
eV o
Hole PE(x)

x (g)

Electron PE(x)

-eVo
Log(Concentration)
Neutral p-region Eo - E Neutral n-region

ppo Minute increase


nno

(a) Excess holes


pn(0)
Excess electrons Hole
np(0) diffusion
Electron
diffusion pno
npo SCL
x' x

V
M
eVo
e(Vo-V)

(b) W
Wo

x
Forward biased pn junction and the injection of minority carriers. (a) Carrier
concentration profiles across the device under forward bias. (b) The hole potential
energy with and without an applied bias. W is the width of the SCL with forward bias
Fig 6.2
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
J
p-region SCL n-region

J=J +J
elec hole
Total current
Majority carrier
diffusion and drift
current J
hole
J Minority carrier diffusion
elec current

x
-Wp Wn

The total current anywhere in the device is constant. Just outside


the depletion region it is due to the diffusion of minority carriers.

Fig 6.3
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Current
Ge Si GaAs

~0.1 mA
Voltage
0 0.2 0.4 0.6 0.8 1.0
Schematic sketch of the I-V characteristics of Ge, Si and GaAs pn Junctions

Fig 6.4
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Minority Carrier
Concentration
Eo -E

pn(0)
Excess
Excess holes
electrons
Holes
np(0)
Electrons

pno
npo
x
x'
p W n

V
Minority carrier injection and diffusion in a short diode.
Fig 6.5
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Log (carrier concentration)

p-side n-side
SCL
ppo nno
C
nM pM
Electrons Holes
np(0) pn(0)
npo pno
A B D
Wp Wn
x
M

V
Forward biased pn junction and the injection of carriers and their
recombination in the SCL
Fig 6.6
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
I

100 mA =1 Minority =1 Series


carrier resistance
1 mA diffusion limitation
Ge
=2
10 A
Si
GaAs
100 nA =2 Recombination
current
1 nA V
0 0.2 0.4 0.6 0.8 1.0

Schematic sketch of typical I-V characteristics of Ge, Si and GaAs


pn junctions as log(I) vs V. The slope indicates e/( kT)

Fig 6.7
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
a b

Minority Carrier
Concentration
Neutral p-region E o +E Neutral n-region M
e(Vo +Vr)

H ole P E (x)
Thermall
eVo
y
generated
EHP

Holes
Electrons pno x
npo Wo
Wo x
W(V = -Vr )
W Diffusion
Drift

V
r

Reverse biased pn junction. (a) Minority carrier profiles and the origin of the reverse
current. (b) Hole PE across the junction under reverse bias

Fig 6.8
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
I Reverse diode current (A) at V = 5 V

mA 10-4
323 K Ge Photodiode
10-6 Slope = 0.63 eV

10-8

10-10
V 238 K
Ideal diode 10-12

10-14
nA
Space charge layer 10-16
generation, surface leakage 0.002 0.004 0.006 0.008
current, etc.
(a) (b) 1/Temperature (1/K)

(a) Reverse I-V characteristics of a pn junction (the positive and negative current axes have
different scales). (b) Reverse diode current in a Ge pn junction as a function of temperature
in a ln(Irev) vs 1/T plot. Above 238 K, Irev is controlled by ni2 and below 238 K it is
controlled by ni. The vertical axis is a logarithmic scale with actual current values. (From
D. Scansen and S.O. Kasap, Cnd. J. Physics. 70, 1070-1075, 1992.)
Fig 6.9
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
a b

p-Type Semiconductor n-Type Semiconductor Eo


p n
E
c
CB CB n M
eVo =  p -  n
p
E E Donors in SCL
c
E c E E
Fp c
E Fn
g E
E E Fn
E Fp E v
v v
Acceptors in SCL

VB VB M E
v

Bulk

(a) Two isolated p and n-type semiconductors (same material). (b) A pn junction
band diagram when the two semiconductors are in contact. The Fermi level must be
uniform in equilibrium. The metallurgical junction is at M. The region around M
contains the space charge layer (SCL). On the n-side of M, SCL has the exposed
positively charged donors whereas on the p-side it has the exposed negatively
charged acceptors.

Fig 6.10
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Eo (a) (b)
Eo-E
p n
M
E E
c c e(Vo -V)
eVo E
c
E
E E
c E eV Fn
Fp Fp
E
E Fn E
v v
E
v
E
v
p n p n

I
V

Energy band diagrams for a pn junction under (a) open circuit and (b) forward bias

Fig 6.11
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Eo+E (c) Eo+E (d)
E
c E
c
e(Vo +Vr)
e(Vo+Vr)
Thermal
E generation
Fp E E
E c Fp E
v E E c
Fn v E
Fn

E E
v
v
p n p n

Vr Vr I = Very Small

Energy band diagrams for a pn junction under (c) reverse bias conditions. (d) Thermal generation of electron hole
pairs in the depletion region results in a small reverse current.

Fig 6.11
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Net Space Charge Diode voltage = -Vr
Density
dQ = Incremental charge
a C dep
eN d
b

(10-103) pF/mm2

Space charge region

Diode voltage = -(Vr+dVr) Reverse Forward

-eNa M
M
Diode Voltage 0 Vo

The depletion region behaves like a capacitor. (a) The charge in the
depletion region depends on the applied voltage just as in a capacitor
(b) The incremental capacitance of the depletion region increases with
forward bias and decreases with reverse bias. Its vaue is typically in
the range of picofarads per mm2 of device area.

Fig 6.12
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
SCL Neutral n-region

pn'(0) when V+dV


pn(0) when V
I = Q /h dQ

Q
pno
x'

V to V+dV
Consider the injection of holes into the n-side during forward bias.
Storage or diffusion capacitance arises because when the diode
voltage increases from V to V+dV then more minority carriers are
injected and more minority carrier charge is stored in the n-region.
Fig 6.13
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Current
1 = dI Tangent
rd dV

I+dI
dI
I

dV

Voltage
0 0.5 V V+dV

The dynamic resistance of the diode is defined as dV/dI which is the


inverse of the tangent at I.
Fig 6.14
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
I
Vbr

Reverse I-V characteristics of a pn junction.

Fig 6.15
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Eo+E

p h+ n

e-

I = M Io

W
Depletion region (SCL)

V
r

Avalanche breakdown by impact ionization.

Fig 6.16
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
A Vbr B
I = (Vr -Vbr )/R

R
Vr > Vbr

Vr
If the reverse breakdown current when Vr > Vbr is limited by an
external resistance, R, to prevent destructive power dissipation then
the diode can be used to clamp the voltage between A and B to remain
approximately Vbr.

Fig 6.17
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
SCL
p n
E
c

CB
e(V +V )
o r
E
Fp
Tunneling
E
v Ec
a E
Fn

VB
E
v

p Tunneling n

Vr

Zener breakdown involves electrons tunneling from the VB of p side to


the CB of n-side when the reverse bias reduces Ec to line up with Ev.
Fig 6.18
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
200

E br (V / m )
100

Avalanche Tunneling
0 Nd (cm-3)
14 15 16 17 18
10 10 10 10 10

The breakdown field Ebr in the depletion layer for the onset of reverse
breakdown vs. doping concentration Nd in the lightly doped region in
a one-sided (p+n or pn+) abrupt pn junction. Avalanche and tunneling
mechanisms are separated by the arrow [data extracted from M. Sze
and G. Gibbons, Solid. State. Electronics, 9, 831 (1966)]

From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
The Bipolar Junction Transistor: BJT

From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
p+ n p

(a)
Emiter Base Collector
E B C

x E

p (0)
I n
I
E
p (x) C
n
n (0)
p
(b) n (x) p
p no
n
po
W W W
EB B BC
I
V B V
EB CB
I I
E
C
(a) A schematic illustration of the pnp bipolar transistor with three differently doped regions. (b) The pnp bipolar
operated under normal and active conditions.

Fig 6.20
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Input E pnp C Output
circuit circuit (c)
B I
B

V V
EB CB
E B C
E
Electron
I Diffusion I
E Hole
C
Hole diffusion
drift

Recombination
(d)
Electrons Leakage current

IB
(c) The CB configuration with input and output circuits identified. (d) The illustration of various current components
under normal and active conditions.

Fig 6.20
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
IC (mA)

3 IE = 3 mA

2 IE = 2 mA

1 IE = 1 mA
IE = 0
-VCB
0 5 10 ICBO

DC I-V characteristics of the pnp bipolar transistor (exaggerated to


highlight various effects).

Fig 6.21
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Base SCL
p (0)
n
p (x)
n
V = -5 V
CB

V = -10 V
CB

x
W W
B BC

W' W'
B BC

The Early effect. When the BC reverse bias increases, the depletion
width WBC increases to W'BC which reduces the base width WB to W'B
As pn(0) is constant (constant VEB), the minority carrier concentration
gradient becomes steeper and the collector current IC increases.
Fig 6.22
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
E B C
p+ n E p
Input pn(0) Output
I E + ie IC + i c
pn(x)
E C
veb(t) RC
x vcb(t)

VEE B VCC
I B + ib

A pnp transistor operated in the active region in the common base amplifier
configuration. The applied (input) signal veb modulates the dc voltage across the
BE junction and hence modulates the injected hole concentration up and down
about the dc value pn(0). The solid line shows pn(x) when only the dc bias VEE
is present. The dashed lines show how pn(x) is modulated up and down by the
signal veb superimposed on VEE.
Fig 6.23
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
IC Output

IC (mA)
C E
4 IB = 0.03 mA
IB Electron
x
B diffusion 3 IB = 0.02 mA
VCE
np(0) 2 IB = 0.01 mA
Input
np(x) 1
IB = 0
VBE
E ICEO V
0 5 10 CE

IE

(a) (b)
(a) An npn transistor operated in the active region in the common emitter configuration. The
dc voltage across the BE junction, VBE, controls the current IE and hence IB and IC. The
input current is the current that flows between VBE and the base which is IB. The output
current is the current flowing between VCE and the collector which is IC. (b) DC I-V
characteristics of the npn bipolar transistor in the CE configuration (exaggerated to
highlight various effects).
Fig 6.24
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
IC +ic

C RC

E
IC x Output
IB +ib B QB
Input
vce(t)
QB
np(x) VCC
vbe(t) n'p(0) np(0)

E
VBB
IE +ie

An npn transistor operated in the active region in the common emitter amplifier configuration. The
applied signal vbe modulates the dc voltage across the BE junction and hence modulates the injected
minority concentration up and down about the dc value np(0). The solid line shows np(x) when only the
dc bias VBB is present. The dashed line shows how np(x) is modulated up by a positive small signal
signal vbe superimposed on VBB.
Fig 6.25
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
AC source Small signal equivalent circuit Load

i
S B b C

R
s
R
r c
v v be i =gmvbe
in be c v
ce

v
s

S E E

Low frequency small signal simplified equivalent circuit of the


bipolar transistor in the CE configuration with a load resistor RC in
the collector circuit.
Fig 6.26
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Gate
p+ G
Basic structure
G

Source Circuit symbol


Drain
for n-channel FET
S n n -channel D
S D

p+
S G D
Depletion Metal electrode
p+
region
G Insulation
Cross section p+
(SiO2)
n
n n
Depletion
S n-channel D p regions
n-channel
Channel
thickness p+
(a) (b)

(a)The basic structure of the junction field effect transistor (JFET) with an n-channel. The two p+ regions are
electrically connected and form the gate. (b) A simplified sketch of the cross section of a more practical n-
channel JFET

Fig 6.27
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
G

Vch ID = 10 mA

VDS S D

0 x
A B

VGS = 0
G
p+ VDS = VP = 5 V
ID = 6 mA
n n (b)
S G
A B D

ID = 10.1 mA

Depletion S D
n-channel A
region
Pinched off
channel
VDS = 1 V P

(a) (c) VDS = 10 V

(a) The gate and source are shorted (VGS = 0) and VDS is small, (b), VDS has
increased to a value that allows the two depletion layers to just touch, when VDS =
VP (= 5 V) when the p+n junction voltage at the drain end, VGD = -VDS = -VP = -5
V. (c) VDS is large (VDS > VP) so that a short length of the channel is pinched off.

Fig 6.28
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
ID (mA) VDS(sat) = VP
IDSS
10 VGS = 0

5
IDS VGS = -2 V
VDS(sat) = VP+VGS VGS = -4 V
VGS = -5 V
0
0 4 8 12
VDS

Typical ID vs VDS characteristics of a JFET for various fixed gate


voltages VGS.

Fig 6.29
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
G
Pinched off channel

ID = 10 mA
P
S A D
E

Lch po

VDS > 5 V

The pinched-off channel and conduction for VDS > VP (=5 V).

Fig 6.30
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
VGS = -2 V VGS = -2 V
G G
p+
ID = 1.8 mA
A n B
S D S D

VDS = 0 V VDS = 1 V

VGS = -2 V
(a) G (b)

ID = 3.6 mA
A
(c) S D
P Pinched off
VDS = 3 V

(a) The JFET with a negative VGS voltage has a narrower n-channel at the start. (b) Compared to the
VGS = 0 case, the same VDS gives less ID as the channel is narrower. (c) The channel is pinched off at
VDS = 3 V sooner than the VGS = 0 case where it was VDS = 5 V.
Fig 6.31
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
VGS = -5 V
G
p+ SCL
n

S D

VDS
When VGS = -5 V the depletion layers close the whole channel from the
start, at VDS = 0. As VDS is increased there is a very small drain current
which is the small reverse leakage current due to thermal generation of
carriers in the depletion layers.

Fig 6.32
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
IDS (mA)
IDS
RD Output
10
C Signal
D v ds 8
B
G B id( t )
Input 6
VDS Q Time
Signal 4
S VDD +18 V A
v gs V GS A
2

V GG -1.5 V V GS 0
-4 -2 0

(a) A vgs(t)

B
(b)

Time

(a) Typical IDS versus VGS characteristics of a JFET. (b) The dc circuit where VGS in the
gate–source circuit (input) controls the drain current IDS in the drain–source (output)
circuit in which VDS is kept constant and large (VDS > VP).
Fig 6.33
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
IDS (mA)

10
IDS 8
RD Output B
B id(t)
C Signal 6
Q Time
D vds A 4
A
Input G 2
VDS
Signal VGS
0
S VDD +18 V -4 -2 0
vgs VGS
A vgs(t)
VGG -1.5 V B

Time
(a) (b)

(a) Common source (CS) ac amplifier using a JFET. (b) Explanation of


how ID is modulated by the signal vgs in series with the dc bias voltage
VGG.
Fig 6.34
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Fig 6.34
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
x
Fixed metal ions

Metal
+Q
(a) V
C E
-Q
Metal

Charge density
Mobile electrons
x

Metal
+Q
(b) V
E W
Depletion
-Q
region

Fixed acceptors Charge density


p-type semiconductor x

(c)
Inversion +Q
V > Vth layer
E Wn

Wa -Q

Conduction
electron Depletion Charge density
region
The field effect. (a) In a metal-air-metal capacitor, all the charges reside on the surface. (b) Illustration of
field penetration into a p-type semiconductor. (c) As the field increases eventually when V > Vth an
inversion layer is created near the surface in which there are conduction electrons.
Fig 6.35
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Source Gate Drain
S G D
Metal electrodes
D
SiO 2 insulation
n+ p n+ Heavily doped G Blk
n-region
p-type substrate S
Depletion layer
Blk Bulk (Substrate)

The basic structure of the enhancement MOSFET and its circuit


symbol.

Fig 6.36
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
SEM cross section of a MOS Transistor
|SOURCE: Courtesy of Don Scansen, Semicondutcor Insights, Kanata, Ontario, Canada

Fig 6.36
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
VDS = 4V
VDS
VGS =3V ID= 0 ID
Vth = 4 V VGS = 8 V ID = 4.2 mA
S G ID
D
S G D I
DS
VDS A P
Depletion VDS
n+ p n+ VDS(sat)
region n+ n+
p
(a) Below threshold VGS < Vth and VDS > 0
(c) Above threshold VGS > Vth and saturation, VDS = VDS(sat)
VDS = 0.5 V VDS = 10 V

VGS = 8 V ID = 1 mA ID ID = 4.5 mA
Vth = 4 V VGS = 8 V
ID
S G D D
S G
A n B
V DS A
VDS
n+ n+ n-channel is the n+ P' n+
p inversion layer p

(b) Above threshold VGS > Vth and VDS < VDS(sat) (d) Above threshold V GS > V th and saturation region, V DS > V DS(sat)

The MOSFET ID vs VDS characteristics

Fig 6.37
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
ID (mA) IDS (mA)

VDS(sat) VDS = 20 V
VGS=10V
10 10
Saturation, ID  IDS

8V
5 5
6V Vth = 4 V
5V
4V
0 0
0 10 20 30 0 5 10
VDS VGS
(a) (b)

(a) Typical ID vs VDS characteristics of an enhancement MOSFET


(Vth = 4 V) for various fixed gate voltages VGS.
(b) Dependence of ID on VGS at a given VDS ( >V DS(sat)).
Fig 6.38
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Metal x x
(a)
Oxide
+Q
Inversion
E layer
V = V1

Wa -Q V1
p-semiconductor Vsc Vox
Depletion
Charge density Voltage, V
region

Qmi
Qot
(b) V = V1 Qf
Qit

(a) The threshold voltage and the ideal MOS structure.


(b) In practice, there are several charges in the oxide and at the oxide-semiconductor interface that effect the threshold
voltage: Qmi = Mobile ionic charge (e.g. Na+), Qot = Trapped oxide charge, Qf = Fixed oxide charge, Qit = Charge
trapped at the interface.
Fig 6.39
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
VACUUM Implant ions

SiO insulation
2
Implanted Na
channel under
p Gate oxide
the gate
p-type substrate x

Wafer holder

Schematic illustration of ion implantation for the control of Vth.

Fig 6.40
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Donor ions
Gate overlaps the drain and source
S G D

n+ p n+ n+ p n+

Donor implanted n-regions


(a) (b)
(a) There is an overlap of the gate electrode with the source and drain
regions and hence additional capacitance between the gate and drain.
(b) n + type ion implantation extends the drain and source to line-up with
the gate.

Fig 6.41
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Donor ions

Doped Polycrystalline Si

SiO2 Donor
(thin) n+ n+
p implanted
p-type substrate p region

(a) (b)
S G D

Al electrode n+ n+
p

(c)
The poly-Si gate technology. (a) Poly-Si is deposited onto the oxide and the areas outside
the gate dimesions are etched away. (b) The poly-Si gate acts as a mask during ion
implantion of donors to form the n+ source and drain regions. (b) A simplified schematic
sketch of the final poly-Si MOS transistor.
Fig 6.42
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Electron energy
p
Ec n+ p n+
eVo
Ec
Eg
EF EF Eg
Ev h Eg
eVo
Ev

Distance into device V


Electron in CB
Hole in VB
(a) (b)
(a) The energy band diagram of a p-n+ (heavily n-type doped) junction
without any bias. Built-in potential Vo prevents electrons from diffusing
from n+ to p side. (b) The applied bias reduces Vo and thereby allows
electrons to diffuse, be injected, into the p-side. Recombination around
the junction and within the diffusion length of the electrons in the p-side
leads to photon emission.
Fig 6.43
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Light output

p Epitaxial
n+
layers
n+
Substrate

A schematic illustration of one possible LED device structure. First n+ is


epitaxially grown on a substrate. A thin p layer is then epitaxially grown on
the first layer.

Fig 6.44
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Ec
EN

Eg

Ev

(a) Photon emission in a direct bandgap semiconductor. (b) GaP is


an indirect bandgap semiconductor. When doped with nitrogen there
is an electron recombination center at EN. Direct recombination
between a captured electron at EN and a hole emits a photon.
Fig 6.45
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
AlGaAs GaAs p AlGaAs p
(a)

~ 0.2 m Ec
Ec
Electrons in CB
2 eV No bias
eV o 1.4 eV
EF EF
Ec Ev

(b) 2 eV
Ev Holes in VB

With forward
bias
(c)

n+ p p
(d)

AlGaAs GaAs AlGaAs

(a) A double heterostructure diode has two junctions which are between two different bandgap semiconductors
(GaAs and AlGaAs). (b) A simplified energy band diagram with exaggerated features. EF must be uniform. (c)
Forward biased simplified energy band diagram. (d) Forward biased LED. Schematic illustration of photons
escaping reabsorption in the AlGaAs layer and being emitted from the device.
Fig 6.46
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Relative intensity
Eg + kT
E 1
Electrons in CB (2.5-3)kT
CB
2kT h
1/ kT 0 h
Ec 2 h h h
  

Eg (c)
Eg
1 2 3 Relative intensity
Ev
1
VB Holes in VB

Carrier concentration
per unit energy 0 
  
 
(a) (b) (d)

(a) Energy band diagram with possible recombination paths. (b) Energy distribution of electrons in the CB and holes
in the VB. The highest electron concentration is (1/2)kT above Ec. (c) The relative light intensity as a function of
photon energy based on (b). (d) Relative intensity as a function of wavelength in the output spectrum based on (b)
and (c).
Fig 6.47
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Relative (a) (b)
intensity V (c)
655nm Relative light intensity

1.0 2


0.5 1
24 nm

0  0 0
0 20 40 0 20 40 I (mA)
600 650 700 I (mA)

(a) A typical output spectrum (relative intensity vs wavelength) from a red GaAsP LED. (b) Typical output
light power vs. forward current. (c) Typical I-V characteristics of a red LED. The turn-on voltage is around
1.5V

Fig 6.48
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Relative spectral output power
o
40 C

1 o
25 C

o
85 C

0
740 800 840 880 900
Wavelength (nm)

The output spectrum from AlGaAs LED. Values normalized to peak


emission at 25 oC
Solar Cells: Photovoltaics

|SOURCE: Courtesy of NASA, Dryden Flight Center


Solar cell inventors at Bell Labs (left to right) Gerald Pearson, Daryl Chapin
and Calvin Fuller are checking a Si solar cell sample for the amount of
voltage produced (1954).

|SOURCE: Courtesy of Bell Labs, Lucent Technologies


Neutral Neutral
n-region Eo p-region

Diffusion
Drift
Long

Medium Le Back
electrode
Short

Finger
electrode
Lh

Depletion
region
n W p

Voc

The principle of operation of the solar cell (exaggerated features to


highlight principles)
Fig 6.49
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Finger electrodes Bus electrode
for current collection

Finger electrodes on the surface of a solar cell reduce the series


resistance
Fig 6.50
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
EHPs

exp(x)

Lh W Le

Iph

Photogenerated carriers within the volume Lh + W + Le give rise to a photocurrent Iph. The variation in
the photegenerated EHP concentration with distance is also shown where a is the absorption coefficient
at the wavelength of interest.
Fig 6.51
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Light I = Id Iph
I Isc = Iph
I
d
V
V Iph V = 0 Iph

R R
(a) (b) (c)

(a) The solar cell connected to an external load R and the convention
for the definitions of positive voltage and positive current. (b) The
solar cell in short circuit. The current is the photocurrent, Iph. (c) The
solar cell driving an external load R. There is a voltage V and current I
in the circuit.
Fig 6.52
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
I (mA)

20

Dark

Voc
0 V
0.2 0.4 0.6
Iph
Light

Twice the light


-20

Typical I-V characteristics of a Si solar cell. The short circuit current is Iph
and the open circuit voltage is Voc. The I-V curves for positive current
requires an external bias voltage. Photovoltaic operation is always in the
negative current region
Fig 6.53
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
I (mA) V oc
0.1 0.2 0.3 0.4 0.5 0.6
I 0 V
V
I
I-V for a solar cell
under an illumination
V 100 of 700 W m-2
Slope = - 1/R
Operating point
I
The load line for
I R Isc = Iph P R=3
200 (I-V for the load)
(a) (b)

(a) When a solar cell drives a load R, R has the same voltage as the solar cell but the current through
it is in the opposite direction to the convention that current flows from high to low potential. (b) The
current I and voltage V in the circuit of (a) can be found from a load line construction. Point P is
the operating point (I, V). The load line is for R = 30 .

Fig 6.54
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Neutral Depletion Neutral
n-region region p-region

Back
Rs
Finger electrode
electrode

Rp

RL
Series and shunt resistances and various fates of photegenerated
EHPs.

Fig 6.55
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Rs
A I Iph A I

Iph Id Id

Iph V RL Iph Rp V RL

(a) (b)
B B

Ideal solar cell Load Solar cell Load

The equivalent circuit of a solar cell (a) Ideal pn junction solar cell
(b) Parallel and series resistances Rs and Rp.

Fig 6.56
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Oxide
n Light
p Le

Inverted pyramid textured surface substantially reduces reflection


losses and increases absorption probability in the device

Fig 6.58
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
AlGaAs window layer on GaAs passivates the surface states and
thereby increases the photogeneration efficiency

Fig 6.59
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Voc
0 0.2 0.4 0.6
0 V
Rs = 50 

Rs = 0
-5
Rs = 20 

Isc
Iph -10

I (mA)

The series resistance broadens the I–V curve and reduces the maximum available power and
hence the overall efficiency of the solar cell.The example is a Si solar cell with η ≈ 1.5 and
Io ≈ 3 × 10−6 mA. Illumination is such that the photocurrent Iph = 10 mA.
Fig 6.57
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
n p
(a)
AlGaAs GaAs

Ec

Ec 1.4 eV

Ev
2 eV
(b)

Ev

A heterojunction solar cell between two different bandgap


semiconductors (GaAs and AlGaAs)
Fig 6.60
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
p n p n

Cell 1 (Eg1) Cell 2 (Eg2 < Eg1)

A tandem cell. Cell 1 has a wider bandgap and absorbs energetic


photons with h > Eg1. Cell 2 absorbs photons that pass cell 1 and
have h > Eg2.

Fig 6.61
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
SiO2
Electrode
+ Electrode
p

(a) The schematic structure of an


+

(a)
i-Si n
idealized pin photodiode (b) The net
space charge density across the
net W
photodiode. (c) The built-in field
eNd
across the diode. (d) The pin
photodiode in photodetection is
(b)
x reverse biased.

eNa

E(x)

x
(c)

Eo

E
h > Eg

e
h+
(d)

Iph R Vout

Vr

Fig 6.62
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Energy

n p p CB
E Fn
(a) AlGaAs GaAs AlGaAs Ec Electrons in CB

(~0.1 m)

Electrons in CB ho
Ec
Ec Holes in VB = empty states
Ev
Ec
Stimulated 2 eV E Fp
emissions 1.4 eV
2 eV
VB
(b) E v (c)
Ev Density of states

Holes in VB

(a) A double heterostructure diode has two junctions which are


between two different bandgap semiconductors (GaAs and
AlGaAs).(b) Simplified energy band diagram under a large forward
bias. Lasing recombination takes place in the p-GaAs layer, the active
layer. (c) The density of states and energy distribution of electrons and
holes in the conduction and valence bands in the active layer

Fig 6.63
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Distrubted
Optical cavity Bragg reflector
containing
active layer Optical cavity
Distributed Bragg Current
reflector

Diffraction
limited
laser beam
Semiconductor
crystal
Corrugated Polished face
dielectric structure

Semiconductor lasers have an optical cavity to build up the required


electromagnetic oscillations. In this example, one end of the cavity
has a Bragg distrubuted reflector, a reflection grating, that reflects
only certain wavelengths back into the cavity.

Fig 6.64
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Optical output power

Optical Power
Laser diode

10 mW
LED

Laser

5 mW
~0.1 nm

Ith LED

0 I  (nm)
0 50 100 1475 1550 1625

Current (mA)
(a) (b)

(a) Typical optical power output vs. forward current for a laser diode
and an LED . (b) Comparison of spectral output characteristics.

Fig 6.65
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
NMOSFET amplifier.
Fig 6.67
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Relative spectral output power
o
40 C

1 o
25 C

o
85 C

0
740 800 840 880 900
Wavelength (nm)

The output spectrum from AlGaAs LED. Values normalized to peak


emission at 25 oC

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