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Lab Report 2 Sajid Hossain 703

Verification of kvl and kcl

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55 views5 pages

Lab Report 2 Sajid Hossain 703

Verification of kvl and kcl

Uploaded by

tasriftanim2002
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Experiment No - 02

Experiment Name: Verification of KVL and KCL .

Date of Experiment: 3 july 2024


Date of Submission: 4 july 2024

Submitted by-

Student ID: 41230100703


Student Name: Sajid Hossain Tusan
Course Code: CSE 1259
Course Name: Electrical Engineering Lab work
Section: 5D

Submitted to -

Dr. Mst. Najnin Sultana


Assistant Professor, Dept. of CSE
Northern University Bangladesh

Objective:

The objective of verifying Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KCL) is to
validate these foundational principles of circuit analysis through practical experimentation. KVL
states that the sum of all electrical voltages around a closed loop is zero, ensuring energy
conservation within that loop. KCL asserts that the total current entering a junction equals the
total current leaving, emphasizing charge conservation at the node. By experimentally confirming
these laws, we can ensure the reliability and accuracy of circuit design and analysis. This
verification helps in understanding the behavior of complex electrical networks and validates
theoretical predictions. Overall, it enhances the practical skills of students and professionals in
electrical and electronic engineering.

Theory :

KVL states that around any closed circuit the sum of the voltage rises equals the sum of
the voltage drops .

Sum of voltage drops = Sum of voltage rises

The voltage divider rule is given by ,

Vx =( Rx/Rs ) *Vs

The equivalent total resistance of a series circuit is given by ,


Rs = ∑Rx = R1 + R2 +R3
Where X= 1,2,3

KCL states that the sum of the currents entering any node equals the sum of the currents
leaving the node.
∑ I entering = ∑ I leaving
The current divider rule is given by ,
Ix = ( Rp/Rx ) * Is
The equivalent total resistance of a parallel circuit is given by ,

1/Rp = 1/R1 +1/R2 +1/R3

Apparatus:

1. 1 DC Voltmeter (0-300v)
2. 1 DC Ammeter ( 0-5 A)
3. Three resistors
4. DC power supply and a Multimeter
5. Breadboard
6. Connecting Wires
7. DC power supply

Tools:

1. TinkerCAD (online)

Working Diagram:

For KCL :
For KVL :

Results:

Experimental data validated that both KVL and KCL hold true in the tested circuits,
with discrepancies within acceptable limits due to measurement errors.

Table :

For KCL :
For KVL :

Calculation :

KCL states that the algebraic sum of currents entering a junction in a circuit must equal the
algebraic sum of currents leaving the junction. Mathematically:

ΣI_in = ΣI_out

• Identify a junction in the circuit.


• Assign directions (positive or negative) to the currents entering and leaving the junction.
• Apply KCL by summing the currents entering the junction (ΣI_in) and equate it to the
sum of currents leaving (ΣI_out).
• A verified KCL equation will have a value close to zero due to rounding errors.

KVL states that the algebraic sum of the voltages (potential drops) around any closed loop in
a circuit must equal zero. Mathematically:

ΣV=0

• Identify a closed loop in the circuit.


• Assign polarities (positive or negative) to the voltages across each element in the
loop. Consistent convention (e.g., following current flow) is recommended.
• Apply KVL by summing the voltages around the loop.
• A verified KVL equation will have a value close to zero due to rounding errors.

Conclusion:

The conclusion of the verification of Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law
(KCL) underscores their fundamental importance in electrical circuit analysis. The experimental
results confirm that the sum of voltages around a closed loop equals zero, validating KVL, and
the sum of currents entering and exiting a junction equals zero, validating KCL. These findings
align with theoretical expectations, demonstrating the laws' reliability in predicting circuit behavior.
The successful verification of KVL and KCL reinforces their use as essential tools for designing
and analyzing electrical circuits. Consequently, these laws remain cornerstones in the study of
electrical engineering, ensuring accurate and consistent circuit analysis.

Reference:

1. Book - Fundamentals of Electric Circuits, Charles K. Alexander, Matthew N. O. Sadiku .

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