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DSPAA Assignment - 21EC723

Digital system

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nandeshgowda134
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83 views2 pages

DSPAA Assignment - 21EC723

Digital system

Uploaded by

nandeshgowda134
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ASSIGNMENT 1 (21EC723)

1.Explain the major architectural features of programmable digital signal processing


devices.
2.A signal whose spectrum is shown in figure is to be sampled so that no aliasing
results. Determine the minimum sampling rate that can be used to sample the
signal. If the sampling rate must be 16 KHz, determine the type and the cutoff
frequency of the antialiasing filter.

3.The signal is filtered and sampled using the sampling rate of 8KHz. If 512 samples
of this signal are to e used to compute the Fourier transform X(k), determine the
frequency spacing between elements. What is the analog frequency corresponding
to k=64,128 and 200. Repeat this problem using 1024 samples and an 8KHz
sampling rate.
4. Explain Braun and Baugh Wooley Multiplier with structure.
5. Explain different types of addressing modes with example.
6. Explain circular and bit reversed addressing mode.
7. Explain Address Generation Unit (AGU) and Program sequencer.
8. Explain the difference between TMS320C25, DSP 60000 and ADSP2100 of DSP
processors.
9. Explain the Functional architecture for TMS320C54xx processors
10. Explain the Pipeline Operation of TMS320C54xx Processors
ASSIGNMENT 2 (21EC723)
1. Describe DMA with respect to TMS320C54XX processor.
2. With a neat block diagram, explain the synchronous serial interface between
TMS320C54XX and CoDEC device.
3. Explain the DSP based biotelemetry Receiver system with a neat block
diagram.
4. Classify the interrupts and explain the interrupt handling sequence by the
TMS320C54XX processors with a flow chart.
5. Briefly explain clipping autocorrelation pitch detector.
6. Briefly explain JPEG Encoder and JPEG Decoder.
7. Explain with neat block diagram the PCM 3002 interfaced to TMS320VC5416
in the DSK.
8. With a neat block diagram and timing diagram for transmit and receive
operation of SSI. Explain the signals involved in synchronous serial interface.
9. Write a program to multiply two Q15 numbers.
10.Explain the implementation of FIR filter with block diagram.
11.Explain the implementation of second order IIR filter with block diagram.
12.Develop the subroutine to implement butterfly computation.

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