PIC14C000

EPROM Memory Programming Specification

This document includes the programming PIN DIAGRAM
specifications for the following devices:
• PIC14C000 PDIP, SOIC, SSOP, Windowed CERDIP

RA1/AN1 •1 28 RA2/AN2
RA0/AN0 2 27 RA3/AN3
RD3/REFB 3 26 RD4/AN4
1.0 PROGRAMMING THE RD2/CMPB 4 25 RD5/AN5

PIC14000
RD1/SDAB 5 24 RD6/AN6
PIC14C000 RD0/SCLB 6 23 RD7/AN7
OSC2/CLKOUT 7 22 CDAC
The PIC14C000 can be programmed using a serial OSC1/PBTN 8 21 SUM
method. In serial mode the PIC14C000 can be pro- VDD 9 20 VSS
VREG 10 19 RC0/REFA
grammed while in the users system. This allows for RC7/SDAA 11 18 RC1/CMPA
increased design flexibility. This programming specifi- RC6/SCLA 12 17 RC2
16
cation applies to PIC14C000 devices in all packages. RC5 13 RC3/T0CKI
MCLR/VPP 14 15 RC4

1.1 Hardware Requirements

The PIC14C000 requires two programmable power
supplies, one for VDD (2.0V to 6.5V recommended) and
one for VPP (12V to 14V).

1.2 Programming Mode

The programming mode for the PIC14C000 allows pro-
gramming of user program memory, configuration
word, and calibration memory.

 1999 Microchip Technology Inc. DS30555B-page 1

PIC14C000
2.0 PROGRAM MODE ENTRY In programming mode the program memory space
extends from 0x0000 to 0x3FFF, with the first half
2.1 User Program Memory Map (0x0000-0x1FFF) being user program memory and the
second half (0x2000-0x3FFF) being configuration
The program and calibration memory space extends memory. The PC will increment from 0x0000 to 0x1FFF
from 0x000 to 0xFFF (4096 words). Table 2-1 shows and wrap to 0x0000, or 0x2000 to 0x3FFF and wrap
actual implementation of program memory in the around to 0x2000 (not to 0x0000). Once in configura-
PIC14C000. tion memory, the highest bit of the PC stays a ’1’, thus
always pointing to the configuration memory. The only
TABLE 2-1: IMPLEMENTATION OF
way to point to user program memory is to reset the
PROGRAM AND
part and reenter program/verify mode, as described in
CALIBRATION MEMORY IN Section 2.2.
THE PIC14C000P
In the configuration memory space, 0x2000-0x20FF
Access to are utilized. When in configuration memory, as in the
Area Memory Space
Memory user memory, the 0x2000-0x2XFF segment is repeat-
Program 0x000-0xFBF PC<12:0> edly accessed as PC exceeds 0x2XFF (Figure 2-1).
Calibration 0xFC0 -0xFFF PC<12:0> A user may store identification information (ID) in four
ID locations. The ID locations are mapped in [0x2000 :
When the PC reaches address 0xFFF, it will wrap 0x2003]. All other locations are reserved and should
around and address a location within the physically not be programmed.
implemented memory (see Figure 2-1). The ID locations read out normally, even after code pro-
tection. To understand how the devices behave, refer to
Table 4-1.
To understand the scrambling mechanism after code
protection, refer to Section 4.1.

DS30555B-page 2  1999 Microchip Technology Inc.

 PIC14C000
FIGURE 2-1: PROGRAM MEMORY MAPPING

0
Program

0FBF
2000 ID Location 0FC0
Calibration
0FFF
2001 ID Location

2002 ID Location

2003 ID Location

Reserved
2004 Reserved

2005 Reserved

2006 Reserved

2007 Configuration Word 1FFF

2000

Test
20FF

Reserved

3FFF

2.2 Program/Verify Mode The sequence that enters the device into the program-
ming/verify mode places all other logic into the reset
The program/verify mode is entered by holding pins state (the MCLR pin was initially at VIL). This means
RC6 and RC7 low while raising MCLR pin from VIL to that all I/O are in the reset state (High impedance
VIHH (high voltage). Once in this mode the user pro- inputs).
gram memory and the configuration memory can be
accessed and programmed in serial fashion. The mode Note: The MCLR pin should be raised as quickly
of operation is serial, and the memory that is accessed as possible from VIL to VIHH. This is to
is the user program memory. RC6 and RC7 are both ensure that the device does not have the
Schmitt Trigger inputs in this mode. PC incremented while in valid operation
range.

 1999 Microchip Technology Inc. DS30555B-page 3

PIC14C000
2.2.1 PROGRAM/VERIFY OPERATION All commands are transmitted LSB first. Data words
are also transmitted LSB first. The data is transmitted
The RB6 pin is used as a clock input pin, and the RB7 on the rising edge and latched on the falling edge of the
pin is used for entering command bits and data input/ clock. To allow for decoding of commands and reversal
output during serial operation. To input a command, the of data pin configuration, a time separation of at least
clock pin (RC6) is cycled six times. Each command bit 1µs is required between a command and a data word
is latched on the falling edge of the clock with the least (or another command).
significant bit (LSB) of the command being input first.
The data on pin RC7 is required to have a minimum The commands that are available are listed in Table .
setup and hold time (see AC/DC specs) with respect to 2.2.1.1 LOAD CONFIGURATION
the falling edge of the clock. Commands that have data
associated with them (read and load) are specified to After receiving this command, the program counter
have a minimum delay of 1µs between the command (PC) will be set to 0x2000. By then applying 16 cycles
and the data. After this delay the clock pin is cycled 16 to the clock pin, the chip will load 14-bits a “data word”
times with the first cycle being a start bit and the last as described above, to be programmed into the config-
cycle being a stop bit. Data is also input and output LSB uration memory. A description of the memory mapping
first. Therefore, during a read operation the LSB will be schemes for normal operation and configuration mode
transmitted onto pin RC7 on the rising edge of the sec- operation is shown in Figure 2-1. After the configura-
ond cycle, and during a load operation the LSB will be tion memory is entered, the only way to get back to the
latched on the falling edge of the second cycle. A min- user program memory is to exit the program/verify test
imum 1µs delay is also specified between consecutive mode by taking MCLR low (VIL).
commands.
TABLE 2-1: COMMAND MAPPING
Command Mapping (MSB ... LSB) Data
Load Configuration 0 0 0 0 0 0 0, data(14), 0
Load Data 0 0 0 0 1 0 0, data(14), 0
Read Data 0 0 0 1 0 0 0, data(14), 0
Increment Address 0 0 0 1 1 0
Begin programming 0 0 1 0 0 0
End Programming 0 0 1 1 1 0
Note: The CPU clock must be disabled during in-circuit programming (to avoid incrementing the PC).

DS30555B-page 4  1999 Microchip Technology Inc.

 PIC14C000
FIGURE 2-2: PROGRAM FLOW CHART - PIC14C000 PROGRAM MEMORY AND CALIBRATION

Start

Set VDD = VDDP*

N=0

No
Yes Report Programming
Program Cycle N > 25
Failure

Read Data
Command N=N+1 N=#
of Program Cycles

No
Increment Address Data Correct?
Command
Yes
Apply 3N Additional
Program Cycles
Program Cycle

Load Data
No
All Locations Done? Command

Yes
Verify all Locations Begin Programming
@ VDD min.* Command
VPP = VIHH2

Wait 100 µs
No Report Verify
Data Correct?
@ VDD min. Error
Yes End Programming
Verify all Locations Command
@ VDD max.
VPP = VIHH2

No Report Verify
Data Correct?
@ VDD max. Error
Yes

Done

* VDDP = VDD range for programming (typically 4.75V - 5.25V).

VDDmin = Minimum VDD for device operation.
VDDmax = Maximum VDD for device operation.

 1999 Microchip Technology Inc. DS30555B-page 5

PIC14C000
FIGURE 2-3: PROGRAM FLOW CHART - PIC14C000 CONFIGURATION WORD & ID LOCATIONS

Start

Load Configuration
Command

N=0

No Yes Read Data

Program ID Loc? Program Cycle Command

Increment Address No
Command N=N+1 N=# Data Correct?
of Program Cycles
Yes
No
Address = 2004 No
N > 25
Yes
Yes
Increment Address
Command Report ID Apply 3N
Configuration Error Program Cycles

Increment Address
Command

Increment Address Program Cycle Read Data

Command 100 Cycles Command

No
Data Correct?

Yes

No Set VDD = VVDD

DDmin
min
Report Program Data Correct?
ID/Config. Error Read Data Command
Set VPP = VIHH2
Yes
No
Yes Set VDD = VVDD
DDmax
max
Done Data Correct? Read Data Command
Set VPP = VIHH2

DS30555B-page 6  1999 Microchip Technology Inc.

 PIC14C000
2.2.1.2 LOAD DATA 2.3 Programming Algorithm Requires
Variable VDD
After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as The PIC14C000 uses an intelligent algorithm. The
described previously. A timing diagram for the load data algorithm calls for program verification at VDDmin as
command is shown in Figure 5-1. well as VDDmax. Verification at VDDmin guarantees
good “erase margin”. Verification at VDDmax guaran-
2.2.1.3 READ DATA
tees good “program margin”.
After receiving this command, the chip will transmit The actual programming must be done with VDD in the
data bits out of the memory currently accessed starting VDDP range (4.75 - 5.25V).
with the second rising edge of the clock input. The RC7
VDDP = VCC range required during programming.
pin will go into output mode on the second rising clock
edge, and it will revert back to input mode (hi-imped- VDDmin = minimum operating VDD spec for the part.
ance) after the 16th rising edge. A timing diagram of VDDmax = maximum operating VDD spec for the part.
this command is shown in Figure 5-2.
Programmers must verify the PIC14C000 at its speci-
2.2.1.4 INCREMENT ADDRESS fied VDDmax and VDDmin levels. Since Microchip may
introduce future versions of the PIC14C000 with a
The PC is incremented when this command is broader VDD range, it is best that these levels are user
received. A timing diagram of this command is shown selectable (defaults are ok).
in Figure 5-3.
Note: Any programmer not meeting these
2.2.1.5 BEGIN PROGRAMMING requirements may only be classified as
“prototype” or “development” programmer
A load command (load configuration or load data) but not a “production” quality programmer.
must be given before every begin programming
command. Programming of the appropriate memory
(test program memory or user program memory) will
begin after this command is received and decoded.
Programming should be performed with a series of
100µs programming pulses. A programming pulse is
defined as the time between the begin programming
command and the end programming command.

2.2.1.6 END PROGRAMMING

After receiving this command, the chip stops program-

ming the memory (configuration program memory or
user program memory) that it was programming at the
time.

 1999 Microchip Technology Inc. DS30555B-page 7

PIC14C000
3.0 CONFIGURATION WORD
The PIC14C000 has several configuration bits. These
bits can be programmed (reads ’0’) or left unpro-
grammed (reads ’1’) to select various device configura-
tions. Figure 3-1 provides an overview of configuration
bits.

FIGURE 3-1: CONFIGURATION WORD BIT MAP

Bit 6 5 4 3 2 1 0
Number:
13 12 11 10 9 8 7
PIC14C000 CPC CPP1 CPP0 CPP0 CPP1 CPC CPC F CPP1 CPP0 PWRTE WDTE F FOSC

CPP<1:0>
11: All Unprotected
10: N/A
01: N/A
00: All Protected
bit 1,6: F Internal trim, factory programmed. DO NOT CHANGE! Program as ‘1’. Note 1.
bit 3: PWRTE, Power Up Timer Enable Bit
0 = Power up timer enabled
1 = Power up timer disabled (unprogrammed)
bit 2: WDTE, WDT Enable Bit
0 = WDT disabled
1 = WDT enabled (unprogrammed)
bit 0: FOSC<1:0>, Oscillator Selection Bit
0: HS oscillator (crystal/resonator)
1: Internal RC oscillator (unprogrammed)

Note 1: See Section 4.1.2 for cautions.

DS30555B-page 8  1999 Microchip Technology Inc.

 PIC14C000
4.0 CODE PROTECTION checksum is 0x0000, and the checksum of memory
[0x0000:0xFBF] is 0x2FBF, the part is effectively blank,
The memory space in the PIC14C000 is divided into and the programmer should indicate such.
two areas: program space (0-0xFBF) and calibration
space (0xFC0-0xFFF). If the CPC bits are set to ‘1’, but the checksum of the
calibration memory is 0x0000, the programmer should
For program space or user space, once code protection NOT program locations in the calibration memory
is enabled, all protected segments read ‘0’s (or “gar- space, even if requested to do so by the operator. This
bage values”) and are prevented from further program- would be the case for a new JW device.
ming. All unprotected segments, including ID locations
and configuration word, read normally. These locations If the CPC bits are set to ‘1’, and the checksum of the
can be programmed. calibration memory is NOT 0x0000, the programmer is
allowed to program the calibration space as directed by
4.1 Calibration Space the operator.
The calibration space contains specially coded data
The calibration space can contain factory-generated
values used for device parameter calibration. The pro-
and programmed values. For non-JW devices, the CPC
grammer may wish to read these values and display
bits in the configuration word are set to ‘0’ at the factory,
them for the operator’s convenience. For further infor-
and the calibration data values are write-protected;
mation on these values and their coding, refer to
they may still be read out, but not programmed. JW
AN621 (DS00621B).
devices contain the factory values, but DO NOT have
the CPC bits set. 4.1.2 REPROGRAMMING CALIBRATION SPACE
Microchip does not recommend setting code protect
bits in windowed devices to ‘0’. Once code-protected, The operator should be allowed to read and store the
the device cannot be reprogrammed. data in the calibration space, for future reprogramming
of the device. This procedure is necessary for repro-
4.1.1 CALIBRATION SPACE CHECKSUM gramming a windowed device, since the calibration
data will be erased along with the rest of the memory.
The data in the calibration space has its own check- When saving this data, Configuration Word <1,6> must
sum. When properly programmed, the calibration also be saved, and restored when the calibration data
memory will always checksum to 0x0000. When this is reloaded.

4.2 Embedding Configuration Word and ID Information in the Hex File

To allow portability of code, the programmer is required to read the configuration word and ID locations from the hex
file when loading the hex file. If configuration word information was not present in the hex file then a simple warning
message may be issued. Similarly, while saving a hex file, configuration word and ID information must be included.
An option to not include this information may be provided.
Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer.

TABLE 4-1: CODE PROTECT OPTIONS • Protect program memory

• Protect calibration memory X0000XXX00XXXX
0XXXX00XXXXXXX • No code protection
1111111X11XXXX
Program Memory Segment R/W in Protected Mode R/W in Unprotected Mode
Configuration Word (0x2007) Read Unscrambled, Write Enabled Read Unscrambled, Write Enabled
Unprotected memory segment Read Unscrambled, Write Enabled Read Unscrambled, Write Enabled
Protected memory segment Read All 0’s, Write Disabled Read Unscrambled, Write Enabled
Protected calibration memory Read Unscrambled, Write Disabled Read Unscrambled, Write Enabled
ID Locations (0x2000 : 0x2003) Read Unscrambled, Write Enabled Read Unscrambled, Write Enabled
Legend: X = Don’t care

 1999 Microchip Technology Inc. DS30555B-page 9

PIC14C000
4.3 Checksum The following table describes how to calculate the
checksum for each device. Note that the checksum cal-
4.3.1 CHECKSUM CALCULATIONS culation differs depending on the code protect setting.
Since the program memory locations read out differ-
Checksum is calculated by reading the contents of the
ently depending on the code protect setting, the table
PIC14C000 memory locations and adding up the
describes how to manipulate the actual program mem-
opcodes up to the maximum user addressable location,
ory values to simulate the values that would be read
0xFBF. Any carry bits exceeding 16-bits are neglected.
from a protected device. When calculating a checksum
Finally, the configuration word (appropriately masked)
by reading a device, the entire program memory can
is added to the checksum. Checksum computation for
simply be read and summed. The configuration word
the PIC14C000 device is shown in Table 4-2:
and ID locations can always be read.
The checksum is calculated by summing the following:
Note that some older devices have an additional value
• The contents of all program memory locations added in the checksum. This is to maintain compatibil-
• The configuration word, appropriately masked ity with older device programmer checksums.
• Masked ID locations (when applicable) TABLE 4-2: CHECKSUM COMPUTATION
The least significant 16 bits of this sum is the check-
sum.

0x25E6 at
Code Blank
Checksum* 0 and max
Protect Value
address

OFF SUM[0000:0FBF] + CFGW & 0x3FBD 0x2FFD 0xFBCB

OFF OTP SUM[0000:0FBF] + CFGW & 0x3FBD 0x0E7D 0xDA4B
ON CFGW & 0x3FBD + SUM(IDs) 0x300A 0xFBD8

Legend: CFGW = Configuration Word

SUM[A:B] = [Sum of locations a through b inclusive]
SUM(ID) = ID locations masked by 0x7F then made into a 28-bit value with ID0 as the most significant byte
*Checksum = [Sum of all the individual expressions] MODULO [0xFFFF]
+ = Addition
& = Bitwise AND

DS30555B-page 10  1999 Microchip Technology Inc.

 PIC14C000
5.0 PROGRAM/VERIFY MODE ELECTRICAL CHARACTERISTICS
TABLE 5-1: AC/DC CHARACTERISTICS
AC/DC TIMING REQUIREMENTS FOR PROGRAM/VERIFY MODE
Standard Operating Conditions
Operating Temperature: +10°C ≤ TA ≤ +40°C, unless otherwise stated, (25°C recommended)
Operating Voltage: 4.5V ≤ VDD ≤ 5.5V, unless otherwise stated.

Parameter
Sym. Characteristic Min. Typ. Max. Units Conditions
No.
General
PD1 VDDP Supply voltage during programming 4.75 5.0 5.25 V
PD2 IDDP Supply current (from VDD) – – 20 mA
during programming
PD3 VDDV Supply voltage during verify VDDmin VDDmax V Note 1
PD4 VIHH1 Voltage on MCLR/VPP during 12.75 – 13.25 V Note 2
programming
PD5 VIHH2 Voltage on MCLR/VPP during verify VDD + 4.0 13.5
PD6 IPP Programming supply current (from – – 50 mA
VPP)
PD9 VIH1 (RC6, RC7) input high level 0.8 VDD – – V Schmitt Trigger input
PD8 VIL1 (RC6, RC7) input low level 0.2 VDD – – V Schmitt Trigger input

Serial Program Verify

P1 TR MCLR/VPP rise time (VSS to VHH) – – 8.0 µs
for test mode entry
P2 Tf MCLR Fall time – – 8.0 µs
P3 Tset1 Data in setup time before clock ↓ 100 – – ns
P4 Thld1 Data in hold time after clock ↓ 100 – – ns
P5 Tdly1 Data input not driven to next clock 1.0 – – µs
input (delay required between com-
mand/data or command/command)
P6 Tdly2 Delay between clock ↓ to clock ↑ of 1.0 – – µs
next command or data
P7 Tdly3 Clock ↑ to date out valid 200 – – ns
(during read data)
P8 Thld0 Hold time after MCLR ↑ 2 – – µs
Note 1: Program must be verified at the minimum and maximum VDD limits for the part.
Note 2: VIHH must be greater than VDD + 4.5V to stay in programming/verify mode.

 1999 Microchip Technology Inc. DS30555B-page 11

PIC14C000
FIGURE 5-1: LOAD DATA COMMAND (PROGRAM/VERIFY)
VIHH
MCLR/VPP
100ns P6
P8
1 2 3 4 5 6 1µs min. 1 2 3 4 5 15
RC6
(CLOCK)
100ns
RC7 0 0 0 0
(DATA) 1 0 0 0
P5
P3
P4
P4 1µs min. P3

}
}
}

}
100ns 100ns
min. min.
Program/Verify Test Mode
Reset

FIGURE 5-2: READ DATA COMMAND (PROGRAM/VERIFY)

VIHH
MCLR/VPP 100ns P6
P8
1 2 3 4 5 6 1µs min. 1 2 3 4 5 15
RC6
(CLOCK)
100ns P7
RC7 0 0 1 0 0 0
(DATA) P5
P4
P3 1µs min.
}
}

100ns
min. RC7
RC7 = output input

Program/Verify Test Mode

Reset

FIGURE 5-3: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY)

VIHH
MCLR/VPP
P6
Next Command
1µs min.
1 2 3 4 5 6 1 2
RC6
(CLOCK)

RC7
0 1 1 0 0 0 0 0
(DATA)
P5
P3 P4 1µs min.
}
}

100ns
min
Program/Verify Test Mode
Reset

DS30555B-page 12  1999 Microchip Technology Inc.

 PIC14C000
NOTES:

 1999 Microchip Technology Inc. DS30555B-page 13

Note the following details of the code protection feature on PICmicro® MCUs.

• The PICmicro family meets the specifications contained in the Microchip Data Sheet.
• Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-
edge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.
The person doing so may be engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable”.
• Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of
our product.
If you have any further questions about this matter, please contact the local sales office nearest to you.

Information contained in this publication regarding device Trademarks

applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to The Microchip name and logo, the Microchip logo, FilterLab,
ensure that your application meets with your specifications. KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
No representation or warranty is given and no liability is PICSTART, PRO MATE, SEEVAL and The Embedded Control
assumed by Microchip Technology Incorporated with respect Solutions Company are registered trademarks of Microchip Tech-
to the accuracy or use of such information, or infringement of nology Incorporated in the U.S.A. and other countries.
patents or other intellectual property rights arising from such
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
use or otherwise. Use of Microchip’s products as critical com-
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
ponents in life support systems is not authorized except with
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
express written approval by Microchip. No licenses are con-
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
veyed, implicitly or otherwise, under any intellectual property
and Total Endurance are trademarks of Microchip Technology
rights.
Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark

of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

© 2002, Microchip Technology Incorporated, Printed in the

U.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system

certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.

 2002 Microchip Technology Inc.

M
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Irvine, CA 92612 91300 Massy, France
Microchip Technology Consulting (Shanghai)
Tel: 949-263-1888 Fax: 949-263-1338 Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Co., Ltd., Shenzhen Liaison Office
New York Rm. 1315, 13/F, Shenzhen Kerry Centre, Germany
150 Motor Parkway, Suite 202 Renminnan Lu Microchip Technology GmbH
Hauppauge, NY 11788 Shenzhen 518001, China Gustav-Heinemann Ring 125
Tel: 631-273-5305 Fax: 631-273-5335 Tel: 86-755-2350361 Fax: 86-755-2366086 D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
San Jose Hong Kong
Microchip Technology Inc. Microchip Technology Hongkong Ltd. Italy
2107 North First Street, Suite 590 Unit 901-6, Tower 2, Metroplaza Microchip Technology SRL
San Jose, CA 95131 223 Hing Fong Road Centro Direzionale Colleoni
Tel: 408-436-7950 Fax: 408-436-7955 Kwai Fong, N.T., Hong Kong Palazzo Taurus 1 V. Le Colleoni 1
Tel: 852-2401-1200 Fax: 852-2401-3431 20041 Agrate Brianza
Toronto
Milan, Italy
6285 Northam Drive, Suite 108 India Tel: 39-039-65791-1 Fax: 39-039-6899883
Mississauga, Ontario L4V 1X5, Canada Microchip Technology Inc.
Tel: 905-673-0699 Fax: 905-673-6509 India Liaison Office United Kingdom
Divyasree Chambers Arizona Microchip Technology Ltd.
1 Floor, Wing A (A3/A4) 505 Eskdale Road
No. 11, O’Shaugnessey Road Winnersh Triangle
Bangalore, 560 025, India Wokingham
Tel: 91-80-2290061 Fax: 91-80-2290062 Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820

03/01/02

 2002 Microchip Technology Inc.