blok

motol
1) Epan mealy Cund MOOTe

diagrarms.

MOOTe modoli
Ge semontial
When the output os
State O6 the flip flqP. the
te
present
ony to
hmoore
nejened
Sequentiat
modul.
fee Oe
let

D
Seventiol cinct Cuhi ch Consi sto
Shaws

two flp-flop», and AND gate. The ciusuit

X and utput
irput ONe
EtaHon van'tblen
Output
de code
Next
Stale
memory (cotnbinati ona
Veale
Van ialbe emont
decoder

wed to dotermine the inputs the

*Dnput
not
wed to dletermine the outpat

de yive d
present States
The Output is
OY Combi hotion it. (Y @A g).
fip- flo
 nodel Ccn e
genenol form be

hepre sented block che atic.

Me uy Madel:
When the output the se qent icl
Sate
olepends both the present
seqwenticl civcuit
ard ipt cs), the
hej emed to cs Melaymdel.

Dr
B

Due to
input Vari ations
clo ck,derived wu
Synchroniz ed the Ouctput
clock cue
hot be Synchionized the

yet output.
hase Output Can be elmincted by llauing
trpat change at he tanition os the clock.
to bnly

Etaion
Vaniolle
utput Dutput
decode Vaviade

Stada Vaniablek
 e tihe nolysis and deig g doked egsentle

for mealy cui

* Stote diagrm is pido nil repres enttion
boh avio sequentinl

Skate is ep nesernted cçr de and bhamition

between Jtutes indicated dinected Iires core ting

eis les.

A The Sate Variable tuide ech ci cle i dentiies

stale orepos ented Ciscle.
te

FoY MaoYe

Caye mooYe Cist, the clirected lines

are labelle only One binuyy embes

the State O7 input bat
epreseteng
Cases the State tranition.

ouput State is indicated

* The
cncle, below Present gtate
CUitin the

becase output State clapends only on

Poesent State and hot input
 Give
2. nalysis k dei g o cdocked Seqenticl cincits
ge quuential Ccun be vieued as maine
that Pr oceed n
brdon Set os Conditions
Called States.

Ne t State lecodun
Netshata (combi rtioha togic)
Vauni alle

element
Preaent
Stab
Ousput dlecoden
Ccom bi nationa logic)

transition the Sequentiel cUiit trom

Dhe state to tte net State contso|led by

cçreuit Called SynchoONOUs Seuontal
then

civuit.
Not controll ed by clock, the
* hen the
S tate hent OCCn wheneer thee
transtion rom
to t ny time
hs hange in nput
Models of clocked sequenti al ciunuuit:
The S'ynho hous o cLoked seqenti al Césceit e

egesented by 2 ocal.
olel
otel,
 The Opt, is a.tunion boch the present
State
input
bmealymolel, the actpets my chang
change duing ycle. TO achiene Bynchon i z ation
inputs met be Synchoni2 ed cwit clock a outpute
brut be Sampled on'y duig elock c dye
(eg):

9. Moore Modol :
The output funtion the prosent Stte only:

Do
DH

CLk
moore model
Beeeial are
Syothronized the clock be cauue
they deperd on only
 2

with clok,
8ip -flop that Synchroonisod
outputs
Desigh 0f sg nch ronowsJequenti al cirit :

Srep : cotin deign Spehication ard Shuy the same

to unolersturd the open tional
lenly
Step 2 : blok diagram model.

9tato ciagsem based on he

Sep 3: Draw e primitie
bbtined in aboe steps.
igormation
Stta tuble trom pr imilue
step 4: Develop primitive

Stote cliagm.
Step s : Elimibcte recentant Stte, develop sìmpliied tale

stop 6 : Make Stte asiqment.

eing
stap 1: Develop Pres ert State /Ne nt State Stade
buble.
Sate agnmen to output
lenents.
Deude mory
Dr aw Schemic diagm.

ANALySIS OF SYNCH RONOUS SEQUE NTIAL CLRCU IT:

* Draw the giVen logic Chemctic dioagram.

* From he logic Schematic eiagram, o btau e xpresion
jor Be 6lip-fop Actation Inputs ard owtput
A D aw the excitation and Output maps corretpordy
to FE excitation and Otput expreninu.
and
utput table 6rom etatin
Cutput p
ohta|n ps /As ard outpt table.
 O7

CLE

Dg De g
k-map Simplificati on :
presant state Eritation input
DA D

tol isolated
6rom main Seqsne.

main Seqen Shows that given

Ciwit behaue a bit Shy t Countec

eauontial
fwi ste d courten.
3) Design a no D -5 Syhchr Oh ounteo wing Jk tip flops
Step 1 : DeteTmine tip- top naeded
>N
N5
ie throe ttip-fop
tep 2 : TyPe to be wed :Jk
Determine the excttation tblefor ounte.
J Present stata ext state flip-Flop inpts
B

k-map Simplifiotion:

lo

tor ke for Te

tor ka
prau logic diag ram:

24
4) EAain fundiony with he s tate diag rarn haracteni shc
cquation 5 T. D'4 J.k Fip Flop. co mpane and Contast.
D FiP 4lop:
* The D -Fip op is contseted 6rom sR fip flop
when we, hwe to store enly Ghe data.

the truth toble SR fip flop, it is obsenYed

that , to Prole a autput lo 0r)
t So, înstecd two tenct ind;vidual in puts,
Cs, R), a
single inpat 'D is wed.
Symbo) Stt diagram:
CLE

haac terisic table :

D n
Equation:
Qnt D

Tk Flip flop:
Used bo venome the ina lid
The JK flip flp
pflp (G-e) s=1, R=i) by Som wsefed
State SR
a tion
(tog ing ).
gtote diagnam.
Symbol:
Charactenist&c Table:
The toble wed to find Ct
state.
dependerk input ard pr Nios

k
6n41
Next Stae

-fogyle
action

T- Elip flop [T- ToggleJ

* T-flip Flop is wed when we want only toggling
acticn.
* JE ip fop is wsed to obtaun

Jyon bol: state diag ram:

Charact onistic table:

Dt is to fid hext StateCan) which
is depen dent fnput previou 3 tate

Cauaion:
 Fe atunes T Flip- flop D {ip-flop JK flip- tlop
Inputs D cos

openatio stoYes input Toggle s, sets,

D on lock OY rets beuved
edge. On J and k
Edge Tri8ge Posihve oY Positue or
-lng Nogatwe Negaive
postie oY
Negatue
Applications cOnteu, Dta storage,
3requeny rogishes
dridey

togic oque Brot= D Qnex Jâ+

ka
5) c0) Demons trate 4 bit magnitude compar ator wits output
A>B, A=B, A< B
(i) Buld a 4-bit prionity eroden wig gates.
() considen tuwo binay Numbes, A ound B
ach. A= As A2 A, Ao
B= Ba P, B, Bo
When the hos bìnay , the digits We
eithen o0r 1,
and
equaiy each paius Can be exprowed
10g ically an excluiye NR unction as,
x; A; B + A;. B,

io, l, 2, 3
where x l only if the pain os bitb in po Ji fion i u
Cqual. Ths Can be epYoued

o
 12

Do

A D
B

D
TO detesmihe cuhether is gYeter leve
check the elate
than B, wo magnitude, o ciy
cigits, stanting 6rom he most sigrigicant
two a pio
ne nt lowe oigniy icant pais digit
compaaa
contiues CLntil a
* The Comfais on
Jneached. 2} cor res ponding digit % A is o
digit is
and thcut B Is 1, ce Can te coveponding
Say h<B. T be
 digit C A is 1 and tat
that A>B.

The Sequentil Copanison lan be e psesed

togi cally oy two book an functi.
(A>B) A, 8, +x, A, B,+ *y
CAe B) A, B+ x, A By t X3

() prionity E bcoden:
encoden is cn encod n Cincit tbat
A
pri ori ty
indudes the pni oniy tunction. n paiority ehcodo,
re eqal to I et Same fm
two Y ore inputs
the highest pniciy take
bhe inpuk having
Precedence

The table shows truth table of Lnputs Outputs

(-bit prioity ehcOdn.

Shous P, input wih highet

lowert
priority 4 Do input cwith
Paionity hhen Da input is high,
9egan d le o% Otten inputs output is

* D, haas net priani ty Thus, when Dg =0 R D, =l, Yejadleu

tuwo louer Priouity input, output is lo
* The Outpt sor D, is genenated only
on ly i7 highe
Bo on.
Paioaity Irputs
 * The Output v indicates One
oY more o inpub
ae CU 0, v 1s equad to
ane hot wed.
othen two output
k-tap Simplific ation:
For Y
D, D
X X

lo

Y,= D + D; Yo D, 4 9, D, V-D,+ D, +D, Ds

(ogie diagorcm: Dg D, D, Do

b) pesiign &X1 MUX. Tnplement followi ng booleeun

the
MUX . FPa, R,S) - 1 mlo,), 2, 3, 9)
funtion wing
digitel times it is heahay
datu Iine 6rom seenal dta- int
to Sel a t single line shod be
Solected data
ines, and dotu 6rom
avail able te output. The digital
digital cáncuit cuhich
 does this tauk hrltip te ner.
ig al Soitch. t allows digital igormatan
to be routed Ohto a
single
rom Seyonal SOnces

Output ine.
function is a faun vaniable functicn,
ASince gien
wifh 8 i/p ines e 3 selet liner
heed a multiple 2es
Vaniable B, C, D to te Select ines.

Implem entation table:

Di D D Dg
A 2 3 7

lo 13

A
*ajle tte mte m the function.
bo tb iotes coem e Not Ciucled,

'o to the Corres porcling input.

* a bo th mint e Y s Cindec, apply to the

Cor res pording input.t

mintom alone Civded, pply Acnd if

botom minteYm cio cled opply A.

Ca schematic for s to l mltiple pply gic

O to a ceordig to the inplementation
taulole
 A D

D,

Du
Ds

1) klhat is k- map ? si mpli ty he follow ing boolean ferction

wing MUx F (P,o, R,s) 1(0, I, 2, 4,5,6, t, 4, 12, 13,14)
Duoing the proces Of Sinpli fícatin boole an
erpneion have to pre dict Oach Suclen ive shep.
neven be
cbsotoly contcin bat
Opn ion simpli gie d by bool e an lgebna ulone is
s impleik pohe e 4pkon.

be Othen hand, the map method gives ws a

Sytem ati e approa ch or gimplifiny a booleh

expneon:

mcy pxoposed by veit h

mothod, irst py and
odiyied by kanawh ,henu it 3s Vetch

diagsarm knagh nep.

 (7

Since the functien has houn vani ableA, a Poun

Vaioble map be. wsed. The mint orms is tad

aked by 's in the map.

w y2 yz
|

roup Co, I, t, 5,12, 13, 8,9) y

J rap 2 (o, 4 , 2, 6) = W2