Bus Organization
Bus Organization
A bus organization is a group of conducting wires which carries information, all the peripherals are connected to
microprocessor through the bus. A system bus is nothing just a group of wires to carry bits.
Address Bus
Data Bus
Control Bus
i. Address Bus:-
The address bus carries information about the location of data in the memory. The addresses bus is unidirectional
because of data flow in one direction, from the microprocessor to memory or from the microprocessor to input/out
devices. Length of Address bus of 8085 microprocessor is 16 bit (That is, four hexadecimal digits), ranging from
0000H to FFFF H. The microprocessor 8085 can transfer maximum 16-bit address which means it can address
65,536 different memory location i.e 64KB memory.
Address Bus is used to perform the first function, identifying a peripheral or a memory location.
The data bus allows data to travel between the microprocessor (CPU) and memory (RAM). The data bus is
bidirectional because of data flow in both directions, from the microprocessor to memory or input/output devices and
from memory or input/output devices to microprocessors. Length of Databus of 8085 microprocessor is 8 bit (that is,
two hexadecimal Digits0, ranging from 00H to FF H.
The data bus is used to perform the second function, transferring binary information.
The control bus carries the control signals to control all the associated peripherals, the microprocessor uses control
bus to process data, that is what to do with selected memory location signals are:-
a. memory card
b.memory write
c. input/output,write.
Except performing calculations related to addition and subtraction, ALUs handle the
multiplication of two integers as they are designed to execute integer calculations;
hence, its result is also an integer. However, division operations commonly may not be
performed by ALU as division operations may produce a result in a floating-point
number. Instead, the floating-point unit (FPU) usually handles the division operations;
other non-integer calculations can also be performed by FPU.
Although the ALU is a major component in the processor, the ALU's design and function may be different in
the different processors. For case, some ALUs are designed to perform only integer calculations, and some are
for floating-point operations. Some processors include a single arithmetic logic unit to perform operations, and
others may contain numerous ALUs to complete calculations. The operations performed by ALU are:
o Logical Operations: The logical operations consist of NOR, NOT, AND, NAND, OR, XOR,
and more.
o Bit-Shifting Operations: It is responsible for displacement in the locations of the bits to
the by right or left by a certain number of places that are known as a multiplication
operation.
o Arithmetic Operations: Although it performs multiplication and division, this refers to bit
addition and subtraction. But multiplication and division operations are more costly to
make. In the place of multiplication, addition can be used as a substitute and subtraction
for division.
ALU input gets signals from the external circuits, and in response, external electronics get outputs signals from
ALU.
Data: Three parallel buses are contained by the ALU, which include two input and output operand. These
three buses handle the number of signals, which are the same.
Opcode: When the ALU is going to perform the operation, it is described by the operation selection code
what type of operation an ALU is going to perform arithmetic or logic operation.
Accumulator
The intermediate result of every operation is contained by the accumulator, which
means Instruction Set Architecture (ISA) is not more complex because there is only
required to hold one bit.
Stack
Whenever the latest operations are performed, these are stored on the stack that holds
programs in top-down order, which is a small register. When the new programs are
added to execute, they push to put the old programs.
Register-Register Architecture
It includes a place for 1 destination instruction and 2 source instructions, also known as a
3-register operation machine. This Instruction Set Architecture must be more in length
for storing three operands, 1 destination and 2 sources. After the end of the operations,
writing the results back to the Registers would be difficult, and also the length of the
word should be longer..