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Tute2 EC-102 2016 Sol

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24 views8 pages

Tute2 EC-102 2016 Sol

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Divyanshi Yadav
Copyright
© © All Rights Reserved
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INDIAN INSTITUTE OF TECHNOLOGY ROORKEE

Department of Electronics and Communication Engineering


EC-102: Fundamentals of Electronics, Spring 2016
Tutorial Sheet 2, Submission Date:

Q1: An ideal Silicon p-n junction diode is operating at 125˚C with reverse saturation
current of 10µA at room temperature. Calculate the dynamic resistance for a 0.4V bias in
(a) the forward direction (b) the reverse direction.
Sol: (a) At the temperature of 1250C using equation VT=T/11,600
VT=398/11,600=0.0343V.
For Si η=2, hence I  I 0 eV /2VT  1 = I 0eV /2VT since V/2VT>>1 at 125˚C

differentiating this equation w.r.t V , we have


1 dI I 10.0 106 5.83 10.0 106
  0 eV /2VT  e   340.36  0.0496 or
rd dV 2VT 2  34.3 103 2  34.3 103
rd=20.16 Ω

(b)
1 dI I 10.0 106 5.83 10.0 106
  0 eV /2VT  3
e  3
 2.9 103  0.423 106
rd dV 2VT 2  34.3 10 2  34.3 10
rd=2.37 MΩ

Q2: In the following circuit of Fig. 1, find ID1 and ID2, assuming D1 and D2 are ideal diodes.

D1 ID1 D2
a ID2
VD1 R VD2
IS
V1 V2
VS

V1=5 V; V2=3 V; VS=5 V; R=500 Ω


Fig. 1
Sol: Because of the polarities of D1 and D2, it is necessary that is ≥0. Thus, vab ≤ Vs =V1.
But vD1=vab-V1; therefore vD≤0 and so iD1=0 regardless of conditions in the right hand
loop.It follows that iD2=is. Now, we assume D2 is forward biased and replace it with a
short citcuit. By KV L
VS  VZ
iD 2   4 mA
500
Since iD2 ≥0 , D2 is in fact forward biased and the analysis is valid.

Q3: In Fig. 2, find ID and VD using piece wise linear model with voltage drop at ideal diode
with VT=0.65 V, rd=20 Ω.
Sol:
R ID

VD
VDD

VDD=5 V; R=10 KΩ
Fig. 2
5  0.65
ID   0.434 mA
104  20
VD  0.65   0.434 103   20  0.659V

Q4: Find the value of R in Fig. 3 shown below such that an output voltage of 2.4 V appears
at node a in Fig. 3. Assume that the diodes available have 0.7 V drop at 1 mA & ΔV=0.1
V/decade change in current.
Sol:
VDD=10 V
For an output voltage of 2.4 V at node a, each diode (since
R similar) has voltage drop of
a Va=2.4 V 2.4
VD   0.8V
3
Since, it is given
VD
iD  10 0.1

 i   i 
VD 2  VD1  0.1 log D 2   0.8  0.7  0.1 log D23  ; Therefore iD2=10 mA
 iD1   10 
10  2.4
R  760 
10
Q5: The diode in the circuit of Fig. 4 (a) has a piecewise linear characteristic as shown in
Fig. 4 (b). (a) Find diode forward resistance using piecewise linear characteristic of Fig. 4
(b); (b) Find iD and vD analytically for the circuit in Fig. 4 (a), given vs =0.1cos(ωt) V and
Vb=2V; (c) Draw the DC load line for the circuit of Fig. 4 (a). You may have to scale diode
characteristic as shown in Fig. 4 (b); (d) Draw dynamic load lines along with the DC load
line plotted in part (c). Sketch and calculate iD and vD also in this graph.
Sol: The diode in Fig. 4 (a) has non-linear characteristic as shown in following Fig.4_sol (b) The
Thevenin equivalent across the diode terminal a-b is shown in Fig. 4_sol(c).
Given, vs =0.1cos(ωt) V and Vb=2V;
R
ID (mA)
iD
vS 4
a
RF
R RTh
vD vD
Vb VF
vTh
R=100 Ω 0.5 0.7 VD (V) b
(a) (b) (c)
Fig. 4_sol
(a) The diode forward resistance RF can be calculated from Fig. 4_sol(b):
0.7  0.5
RF   50 
0.004

(b) The Thevenin voltage and resistance in Fig.4_sol(b) is calculated as:


100
VTh   2  0.1cos t   1  0.05cos t V
200

100 
2

RTh   50 
200

Apply Kirchoffs law in Fig. 4_sol(c):


VTh  VF
iD   5  0.5cos t mA
RTh  RF

vD  VF  RF iD  0.75  0.025cos t V
(c) and (d):

Q6: If the diode in Fig. 4 (a) is operated at room temperature and diode has characteristic
as governed by Shockley diode equation. Then (a) Calculate dynamic resistance of the diode
at Q-point as calculated in Q.5, assuming small signal operation and diode is made of
Germanium; (b) Calculate diode capacitance at Q point (recall in forward bias case
diffusion capacitance dominates the overall capacitance of diode.) assuming the mean life
time of minority carrier is 10 ns; (c) Draw an equivalent model of this diode with proper
values of circuit elements in the model.
VT
Sol: (a) Since at Q-point, iD =5 mA; therefore rd  ,
iD
For Ge, η=1, and VT=26 mV at room temperature. Therefore rd=5.2 Ω

 iD
(b) C  CD   1.92nF
VT
(c)

RS
RF
iD
Q7: In the circuit of Fig. 5, the diode is ideal and input voltage vi is a 10 V triangular wave
with period T. Sketch one cycle of the output voltage v0 if Vb=6V.
Sol: The diode blocks (acts as an open circuit) for vi≤6 V, giving vo = vi. For vi ≥6 V, the
diode is in forward conduction, clipping vi to effect vo = 6V. The resulting output voltage
waveform is sketched in Fig. 5_sol.
R a

VD
vi vo
Vb

Fig. 5

Fig. 5_sol
Q8: In the circuit of Fig. 5, if the orientation of the diode is reversed, sketch one cycle of
the output voltage v0 if vi =10sin(ωt) V and Vb=6V.
Sol:
(a) The diode conducts for vi≤6 V and blocks for vi ≥6 V. Consequently vo = vi for vi ≥6 V
and vo = 6V for vi≤6 V. The transfer characteristic is drawn in Fig. sol8(a).
(b) With the negative clipping, the output is made up of the positive peaks of 10sinωt
above 6V and is 6V otherwise. Fig. sol8(b).displays the output waveform.
Fig. sol8
Q9: In Fig. 5, if R is replaced by a capacitor C and a triangular wave as shown in Fig. 6 is
applied as an ac input, Sketch the output waveform.
Sol:
An ideal clamping circuit is shown in Fig. sol9 (b), and a triangular ac input waveform in
Fig. sol9 (a). If The capacitor C is initially uncharged and Vb=0, the ideal diode D is
forward biased for 0<t≤T/4, and it acts as a short circuit while the capacitor charges to
vc= vp. At t=T/4, D open citcuits, breaking the only possible discharge path for the
capacitor. Thus the value vc= vp is preserved; since vi can never exceed vp, D remains
reverse biased for all t>T/4, giving vo= vD= vi= vp. The function vo is sketched in Fig.
sol9 (c); all positive peaks are clamped at zero, and the average value is shifted from 0 to
- vp.

Fig. sol9
Q10: The zener diode in Fig. 7 has a constant reverse break-down voltage VZ=8.2 V, for
75mA  iZ 1A . If RL=9 Ω, find the value of RS such that vL=VZ is regulated (or
maintained at) 8.2 V while Vb varies 10% from its nominal value of 12 V.
Sol:

Fig. 7_sol
By Ohm’s law

Now an application of KVL gives

And we use above equation to find Rs for the maximum Zener current Iz at the largest
value of Vb:

Now we check to see if iz ≥ 75 mA at the lowest value of Vb:

Since iz ≥ 75 mA, vL=Vz=8.2V and regulation is preserved.

Q11: Sketch vO for the network of Fig.8 and determine the D.C voltage available.

Q12: A diode which has internal resistance is 20 Ω is supplying power to a 1000 Ω load from
a 110V (rms) source of supply. Calculate: (a) the peak load current; (b) the D.C load
current; (c) the A.C load current; (d) the dc voltage; (e) the total input power to the circuit;
(f) the percentage regulation from no load to the given load.
Sol: (a)Im=Vm/( Rf + RL )=1102/1020 =152.5mA
(b)Id.c = Im/ =152/ = 48.5 mA
(c)Irms = ½ (152.5) =76.2 mA
(d)Vd.c = ImRL/ = -48.5x1=-48.5V
(e)Pi = I2rms (Rf +RL)=76.2x 10 –3)(10200= 58-00 x10 –6 x 1020 = 5.92 W
(f)% Regulation =(VnL –VfL)/VfL x 100% = (Vm/ - Id.cRL) / (Id.c RL) x 100%
= (49.5 –48.5)/48.5=2.06%

Q13: In a center tap full wave rectifier, the load resistance RL = 470 Ω. Each of the diodes
has a dynamic resistance of 2 ohms. The voltage across one half of the transformer
secondary winding is 50 Sin 314t. Calculate: (a) the peak current value; (b) the average
value of current; (c) the r.m.s value of the current; (d) the ripple factor and (e) the
rectification efficiency.
Sol: Vs =50 sin 314t
(a) Vm = 502=70.7 volts, Im =Vm/(Rf +RL)=70.7/2+470 =0.1498 A =149.8mA
(b) Id.c =2Im/ = 2x 149.8/ =95.36 mA
(c) Irms=(Im/2 =149.8/2 =105.92 mA
(d) Ripple factor = r =(Id.c/Irms)2-1 =(105.92/95.36)2=0.2338 =0.4834
(e) Efficiency r = Pd.c/ Pa.c
Pd.c = I2d.c RL=(95.36 x 10-3)2 x 470 =4.273 W
Pd.c x I2rms( Rf +RL) =(105.92 x 10-3)2(470+2) =5.293 W
r = (Pd.c/ Pa.c)x100% =(4.273/5.293)x100 =72.07%

Q14: A diode with its dynamic resistance of 1 Ω is connected in a half wave rectifier with a
transformer whose secondary voltage is 12V, 60 Hz, and 2 Ω resistance. (a) Find peak, rms
and dc output voltages of the rectifier at no load; (b) Find D.C. output voltage when it
draws full load current of 100 mA (c) Find the % regulation of this power supply.

Sol: (a) Vrms= 12V, Vm =12/2 V = 16.97 V & Vd.c = Vm/ = 16.97/ = 5.4V
(b) Vd.c = Vm/ - Id.c(Rf+Rs) =5.4 –100 x 10-3 x 3= 5.1 V

(c) % regulation = (5.4 –5.1/5.1)x 100% = 5.8%

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