ELTR 270 - Diode Practice Problems and Solutions
ELTR 270 - Diode Practice Problems and Solutions
Habib Islam
ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 1
Determine whether each silicon diode in Figure 1 is forward-biased or reverse-biased.
Solution
Problem 2
Determine the voltage across each diode in Figure 1 assuming the practical model.
Solution
(a) Since the diode is reverse biased, it acts as an open circuit. There is no voltage drop
across 10 Ω resistor and across the diode as no current flows through them. However,
since the anode has a potential of 5 V and the cathode has a potential of 8 V, the
potential difference or voltage across the diode is 5 V − 8 V = −3 V
(b) Since the diode is forward biased, according to the practical diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = VB = 0.7 V for any values of IF > 0, where
VB = 0.7 V is the barrier potential.
(c) Since the diode is forward biased, according to the practical diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = VB = 0.7 V for any values of IF > 0.
(d) Since the diode is forward biased, according to the practical diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = VB = 0.7 V for any values of IF > 0.
Problem 3
Determine the voltage across each diode in Figure 1 assuming the ideal model.
Solution
(a) Since the diode is reverse biased, it acts as an open circuit. There is no voltage drop
across 10 Ω resistor and across the diode as no current flows through them. However,
since the anode has a potential of 5 V and the cathode has a potential of 8 V, the
potential difference or voltage across the diode is 5 V − 8 V = −3 V
(b) Since the diode is forward biased, according to the ideal diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = 0 V for any values of IF > 0.
(c) Since the diode is forward biased, according to the practical diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = 0 V for any values of IF > 0.
(d) Since the diode is forward biased, according to the practical diode model (rd′ = 0), the
voltage drop across a silicon diode is VF = 0 V for any values of IF > 0.
Problem 4
Determine the voltage across each diode in Figure 1 assuming the complete diode model
with rd′ = 10 Ω and rR
′ = 100 MΩ.
Solution
(a) Since the diode is reverse biased, it acts as an open circuit. There is no voltage drop
across 10 Ω resistor and across the diode as no current flows through them. However,
since the anode has a potential of 5 V and the cathode has a potential of 8 V, the
potential difference or voltage across the diode is 5 V − 8 V = −3 V
(b) Since the diode is forward biased, according to the complete diode model, it acts as a
closed switch in series with VB = 0.7 V and (rd′ = 10 Ω). Applying KVL, we can write
IF = 174 mA
VF = VB + Vr′ = VB + IF rd′
d
VF = 2.44 V
(c) Since the diode is forward biased, according to the complete diode model, it acts as a
closed switch in series with VB = 0.7 V and (rd′ = 10 Ω). Applying KVL, we can write
30 V − VRtot = 0
VF = VB + Vr′ = VB + IF rd′
d
VF = 0.731 V
(d) Since the diode is forward biased, according to the complete diode model, it acts as
a closed switch in series with VB = 0.7 V and (rd′ = 10 Ω). Looking at the circuit in
Figure 1(d), we can conclude that approximately all of the current from the 20 V source
is through the diode. However, no current from the 10 V source is through the diode.
Therefore, applying KVL we can write
−0.7 V − IF rd′ + 20 V − IF R = 0
20 V − 0.7 V
IF =
R + rd′
20 V − 0.7 V
=
10 kΩ + 10 Ω
IF = 1.92 mA
VF = VB + Vr′ = VB + IF rd′
d
VF = 0.719 V
Problem 5
Draw the output voltage waveform for each circuit in Fig 2.
Solution
Since rd′ is not given, use the practical diode model.
(a) For the circuit in Figure 2(a), during the positive half cycle of Vin , when 0 V ≤ Vin <
0.7 V, the diode will be reverse biased. No current will flow through the circuit, and
therefore, in this case,
Vout = VR = 0 V
During the positive half cycle of Vin , when 0.7 V ≤ Vin ≤ 5 V, diode will be forward
biased. In that case, applying KVL we can write
Vin − VF − VR = 0
For this input voltage range, Vout will follow Vin with maximum and minimum values
as follows.
For the circuit in Figure 2(a), during the negative half cycle, the diode will not conduct
and as a result, no current will flow through R. Therefore, Vout = VR = 0. Portions of
this output is shown in red in Figure 2(a).
(b) For the circuit in Figure 3(b), during the negative half cycle, if −0.7 V < −Vin ≤
−50 Vthe diode will conduct. Applying KVL in counter clockwise direction we can
write
−VR − VF + Vin = 0
VR = Vin − VF = Vin − VB
For this input voltage range, Vout will follow Vin with minimum and maximum outputs
as follows.
For the circuit in Figure 3(b), during the positive half cycle of Vin , the diode will not
conduct and as a result, no current will flow through R. Therefore, Vout = VR = 0.
Portions of this output is shown in blue in Figure 3(b).
For the circuit in Figure 3(b), during the negative half cycle of Vin , if −Vin ≤ −0.7 V
the diode will not conduct and as a result, no current will flow through R. Therefore,
Vout = VR = 0. Portions of this output is shown in green in Figure 3(b).
Problem 6
What is the peak inverse voltage across each diode in Figure 2?
Solution
(a) P IV = Vp = 5 V
(b) P IV = Vp = 50 V
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 7
Calculate the average value of a half-wave rectified voltage with a peak value of 200 V.
Solution
The average value of a half-wave rectified voltage is given by
Vp 200 V
Vavg = = = 63.7 V
π π
Problem 8
What is the peak forward current through each diode in Figure 2 ?
Solution
(a) Since the diode and R are in series, the same current is flowing through them. There-
fore, using the Vout,max value calculated in Problem 5(a), we can write
Problem 9
Determine the peak and average power delivered to RL in Figure 4.
Solution
First, calculate the secondary rms voltage as follows.
Problem 10
Find the average value of each voltage in Figure 5.
Solution
(a) Figure 5(a) shows the output voltage of a half wave rectifier without dc offset. There-
fore,
Vp 5 V
Vavg = = = 1.59 V
π π
(b) Figure 5(b) shows the output voltage of a full wave rectifier without dc offset. There-
fore,
2Vp (2)(100 V)
Vavg = = = 63.7 V
π π
(c) Figure 5(c) shows the output voltage of a full wave rectifier with 10 V dc offset. First
remove he dc offset to get Vp and calculate the average value of this peak value. Then
add 10 V dc offset to obtain Vavg of the output voltage.
2Vp 2(20 V − 10 V)
Vavg = + 10 V = + 10 V = 16.4 V
π π
(d) Figure 5(d) shows the output voltage of a full wave rectifier with -15 V dc offset. First
remove he dc offset to get Vp and calculate the average value of this peak value. Then
add -15 V dc offset to obtain Vavg of the output voltage.
Problem 11
Consider the circuit in Figure 6.
(c) Find the peak voltage across each half of the secondary.
Solution
Vsec,p 42.4 Vp
Vsec,half,p = = = 21.2 Vp
2 2
(d) For the circuit in Figure 6, during both positive and negative half cycle, one of the
diodes will be forward biased. Applying KVL we can write
Vsec,half − VF − VRL = 0
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 12
Draw the output voltage waveform for the bridge rectifier in Figure 7.
Solution
In this circuit, during the positive half cycle of the input, the current flows through RL −
D2 − secondary winding − D1 − ground. Applying KVL we get
During the negative half cycle of the input, the current flows through RL −D4 −secondary winding−
D3 − ground. For this case, applying KVL we get
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 13
A certain full-wave rectifier has a peak output voltage of 30 V. A 50 µF capacitor-input
filter is connected to the rectifier. Calculate the peak-to-peak ripple and dc output voltage
developed across a 600 Ω load resistance. What is the percentage of ripple?
Solution
Assuming the rectifier is connected to an ac outlet with frequency 60 Hz, the output frequency
of a full-wave rectifier is f = (2)(60 Hz) = 120 Hz. Then, we can calculated the peak-to-peak
ripple voltage as follows.
Vp(in) 30 V
Vr(pp) = = = 8.33 Vpp
f RL C (120 Hz)(600 Ω)(50 × 10−6 F)
Problem 14
A full-wave rectifier produces an 80 V peak rectified voltage from a 60 Hz ac source. If 10
µF filter capacitor-input filter is used, determine ripple factor for a load resistance of 10 kΩ.
Solution
Vp(in) 80 V
Vr(pp) = = = 6.67 Vpp
f RL C (120 Hz)(10 × 103 Ω)(10 × 10−6 F)
! !
1 1
VDC = 1 − Vp(in) = 1 − (30 V) = 76.7 V
2f RL C (240 Hz)(10 × 103 Ω)(10 × 10−6 F)
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 15
Determine the peak-to-peak and dc output voltages of the circuit in Figure 9. The trans-
former has a 36 V rms secondary voltage rating and the line voltage has a frequency of 60
Hz.
Solution
The peak output voltage of the full-wave bridge rectifier circuit can be calculated as
√
Vp(rect) = Vp(sec) − 1.4 V = 2(36 V) − 1.4 V = 49.5 V
! !
1 1
VDC = 1 − Vp(rect) = 1 − (49.5 V) = 48.9 V
2f RL C (240 Hz)(3.3 × 10 Ω)(100 × 10−6 F)
3
Problem 16
For the full-wave bridge rectifier circuit in Figer 9, draw the following voltage waveforms in
relationship to the input waveforms: VAB , VAD , and VCD .
Solution
Looking at the circuit, we can easily calculate VAB = Vp(sec) = 50.9 V.
During the positive half cycle of secondary voltage waveform, the diode between the points
A and D is reverse biased and acts as an open circuit. As a result, the total output voltage of
the rectifier circuit appears between the points A and B. Therefore, VAD = Vp(rect) = 49.5 V.
During the negative half-cycle of the secondary voltage waveform, the diode between the
points A and D is forward biased. Therefore, VAD = −VF = −0.7 V.
The voltage between the points C and D is the nearly smooth DC output voltage of the the
filter capacitor. All three voltage waveforms VAB , VAD , and VCD are shown in Figure 10.
Problem 17
Determine the output waveform for the circuit in Figure 11.
Solution
During the positive half cycle of the input, the diode is forward biased. As a result,
Vout = VF = 0.7 V
During the negative half cycle of the input, the diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit and the voltage drop across the
1-kΩ resistor is zero. Therefore, the output voltage is equal to the input voltage.
Vout = Vin
The circuit operation during the positive and negative half cycles are shown in Figure 12
and the output waveform is shown in Figure 13.
Figure 13: The output waveform of the clipper circuit of Problem 17.
Problem 18
Determine the output voltage for the circuit in Figure 14(a) for each input voltage in (b),
(c), and (d).
Figure 14: Diode clipper circuit and its input waveforms of Problem 18.
Solution
The output of the clipper circuit is given by
(b) During the positive half cycle of the input, the diode will be forward biased. Since
VR1 = VR2 , assuming VR1 = VR2 = VR and Applying KVL, we can write
Vin − VR − VF − VR = 0
Vin − VF Vin − 0.7
VR = =
2 2
Diode will conduct only when Vin ≥ 0.7 V. Therefore, during the peak of the positive
half-cycle
Vin,max − 0.7 V
Vout,max = VR + 0.7 V = + 0.7 V
2
25 V − 0.7 V
= + 0.7 V
2
Vout,max = 12.85 V
During the negative half cycle of the input, the diode will not conduct and acts as an
open circuit. Therefore, no current will flow through the circuit and output voltage
will follow the input voltage, i.e., vout = vin .
The output voltage of the circuit in Figure 14(a) for the input voltage in Figure 14(b)
is shown in Figure 15.
Figure 15: Output voltage of the circuit in Figure 14(a) for the input voltage of
Figure 14(b).
(c) During the positive half cycle of the input, the diode will be forward biased. Since
VR1 = VR2 , assuming VR1 = VR2 = VR and Applying KVL, we can write
Vin − VR − VF − VR = 0
Vin − VF Vin − 0.7
VR = =
2 2
During the negative half cycle of the input, the diode will not conduct and acts as an
open circuit. Therefore, no current will flow through the circuit and output voltage
will follow the input voltage, i.e., vout = vin .
The output voltage of the circuit in Figure 14(a) for the input voltage in Figure 14(c)
is shown in Figure 16.
Figure 16: Output voltage of the circuit in Figure 14(a) for the input voltage of
Figure 14(c).
(d) During the positive half cycle of the input, the diode will be forward biased. Since
VR1 = VR2 , assuming VR1 = VR2 = VR and Applying KVL, we can write
Vin − VR − VF − VR = 0
Vin − VF Vin − 0.7
VR = =
2 2
During the negative half cycle of the input, the diode will not conduct and acts as an
open circuit. Therefore, no current will flow through the circuit and output voltage
will follow the input voltage, i.e., vout = vin .
The output voltage of the circuit in Figure 14(a) for the input voltage in Figure 14(d)
is shown in Figure 17.
Figure 17: Output voltage of the circuit in Figure 14(a) for the input voltage of
Figure 14(d).
Problem 19
Determine the output voltage waveform for each circuit in Figure 18.
Solution
(a) During the positive half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
During the negative half-cycle of the input, diode is forward biased. Applying KVL in
the counter-clockwise direction, we can write
VR − VF + Vin = 0
VR = −Vin + VF
Therefore, during the negative half cycle of the input, output is a negative ac voltage
with a dc voltage of 0.7 V added it. When −Vin = −10 V
(b) During the positive half-cycle of the input, diode is forward biased. Applying KVL in
the clockwise direction, we can write
Vin − VF − VR = 0
VR = Vin − VF
Therefore, during the positive half cycle of the input, output is a positive ac voltage
with a dc voltage of −0.7 V added to it. When Vin = 10 V
During the negative half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
(c) During the positive half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
During the negative half-cycle of the input, diode is forward biased. Applying KVL in
the counter-clockwise direction, we can write
VR − VF + 3 V + Vin = 0
VR = −Vin − 3 V + 0.7 V
Therefore, during the negative half cycle of the input, output is a negative ac voltage
with a dc voltage of −2.3 V added it. When −Vin = −10 V
(d) During the positive half-cycle of the input, diode is forward biased. Applying KVL in
the clockwise direction, we can write
Vin − 3 V − VF − VR = 0
VR = Vin − 3 V − 0.7 V
Therefore, during the positive half cycle of the input, output is a positive ac voltage
with a dc voltage of −3.7 V added to it. When Vin = 10 V
During the negative half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
(e) During the positive half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
During the negative half-cycle of the input, diode is forward biased. Applying KVL in
the counter-clockwise direction, we can write
VR − VF − 3 V + Vin = 0
VR = −Vin + 3 V + 0.7 V
Therefore, during the negative half cycle of the input, output is a negative ac voltage
with a dc voltage of 3.7 V added it. When −Vin = −10 V
(f) During the positive half-cycle of the input, diode is forward biased. Applying KVL in
the clockwise direction, we can write
Vin + 3 V − VF − VR = 0
VR = Vin + 3 V − 0.7 V
Therefore, during the positive half cycle of the input, output is a positive ac voltage
with a dc voltage of 2.3 V added to it. When Vin = 10 V
During the negative half-cycle of the input, diode is reverse biased and acts as an open
circuit. As a result, no current flows through the circuit, i.e., IR = 0. Therefore,
Vout = VR = IR R = 0 V
Problem 20
Determine the RL voltage waveform for each circuit in Figure 20.
Solution
(a) During the positive half-cycle of the input, when 0.7 V ≤ Vin ≤ 10 V, diode will be
forward biased and act as a dc voltage source of 0.7 V in parallel with VRL . As a
result,
VRL = VF = 0.7 V
VRL = 0.5Vin
During the negative half cycle of the input, when −10 V ≤ Vin ≤ 0, the diode is reverse
biased and acts as an open circuit. As a result, the source current Is will flow through
R1 and RL . Since R1 = RL = 1 kΩ,
VRL = 0.5Vin
In other words, during the negative half cycle of the input, the output voltage will
follow the input voltage except that the amplitude of the output voltage would be
halved. Portions of this output is shown in green in Figure 21(a).
(b) In Figure 21(b), during the positive half-cycle of the input, when 3 V < Vin ≤ 10 V,
diode is forward biased and acts as a dc voltage source of 0.7 V in series with 3 V
source. As a result,
VRL = VF + 3 V = 3.7 V
VRL = 0.5Vin
During the negative half cycle of the input, when −10 V ≤ Vin ≤ 0, the diode is reverse
biased and acts as an open circuit. As a result, the source current Is will flow through
R1 and RL . Since R1 << RL , VR1 will be insignificant and can be ignored.
VRL = Vin
In other words, during the negative half cycle of the input, the output voltage will
follow the input voltage. Portions of this output is shown in green in Figure 21(b).
(c) In Figure 21(c), during the positive half-cycle of the input, both Vin and −50 V source
will drive the diode in reverse bias mode. In this case, the diode will act as an open
circuit and the whole branch of the circuit consisting of the diode and -5 V source in
series can be removed from the circuit. As a result, R1 and R2 will act as a voltage
divider.
RL 680 Ω
VRL = Vin = Vin = 0.87Vin
R1 + RL 100 Ω + 680 Ω
VRL ,min = 0.87Vin,min = (0.87)(0 V) = 0 V
In other words, during the positive half cycle of Vin , the shape of the output waveform
will be the same as the input waveform except its amplitude will be attenuated by a
factor of 0.87. Portions of this output is shown in blue in Figure 21(c).
During the negative half cycle of the input, when −50 V ≤ Vin ≤ 0, the diode is reverse
biased. In this case, the diode will act as an open circuit and the whole branch of
the circuit consisting of the diode and -50 V source in series can be removed from the
circuit. As a result, R1 and R2 will act as a voltage divider. In this region, vout will
follow vin except its magnitude will be attenuated by a factor of R1R+RL
L
= 0.87. This
output voltage is shown in red in Figure 21(c).
During the negative half cycle of the input, when −200 V ≤ vin < −50 V, the diode is
forward biased. In this case, the diode acts as a dc voltage source of −0.7 V in series
with the dc bias −50 V. Therefore,
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Problem 21
Draw the output voltage waveform for each circuit in Figure 22.
Solution
(a) During the positive half cycle of Vin when 0.7 V < Vin ≤ 30 V diode D2 is forward
biased and diode D1 is reverse biased. Therefore, diode D1 can be removed from the
circuit and the output across D2 .
During the positive half cycle of Vin when 0 V ≤ Vin ≤ 0.7 V, both diodes D1 and D2
are reverse biased. As a result, no current will flow through the circuit and Vout will
follow Vin . Portions of this output are shown in red in Figure 23(a).
During the negative half cycle of Vin when −30 V ≤ Vin < −0.7 V diode D1 is forward
biased and diode D2 is reverse biased. Therefore, diode D2 can be removed from the
circuit and the output is across D1 .
(b) During the positive half cycle of Vin when 0.7 V < Vin ≤ 30 V diode D1 is forward
biased and diode D2 is reverse biased. Therefore, diode D2 can be removed from the
circuit and the output across D1 .
Problem 22
Determine the peak forward current through each diode in Figure 22.
Solution
Figure 23: Output waveforms of the diode clipper circuits of Problem 21.
(a) During the positive half cycle of Vin when 0.7 V < Vin ≤ 30 V diode D2 is forward
biased and diode D1 is reverse biased. Therefore, diode D1 can be removed from the
circuit and the peak current will flow through R and D2 when Vin = Vin,p = 30 V. For
this case, applying KVL in clockwise direction, we can write
Vin − VR − VD2 = 0
Vin − Ip R − VD2 = 0
Vin − VD2 30 V − 0.7 V
Ip = = = 13.3 mA
R 2.2 kΩ
(b) During the positive half cycle of Vin when 0.7 V < Vin ≤ 30 V diode D1 is forward
biased and diode D2 is reverse biased. Therefore, diode D2 can be removed from the
circuit and the peak current will flow through R and D1 when Vin = Vin,p = 30 V. For
this case, applying KVL in clockwise direction, we can write
Vin − VR − VD1 = 0
Vin − Ip R − VD1 = 0
Vin − VD1 30 V − 0.7 V
Ip = = = 13.3 mA
R 2.2 kΩ
Problem 23
Determine the peak forward current through each diode in Figure 24.
Solution
(a) In the circuit in Figure 24(a), the peak forward current IF, p will flow through the diode
when the diode is forward biased, i.e. VF = 0.7 V and Vin = 30 V. In this case,
VR = Vin − Vout
(b) In the circuit in Figure 24(b), the peak forward current IF, p will flow through the diode
when the diode is forward biased, i.e. VF = 0.7 V and Vin = 30 V. In this case,
VR = Vin − Vout
(c) In the circuit in Figure 24(c), the peak forward current IF, p will flow through the diode
when the diode is forward biased, i.e. VF = 0.7 V and Vin = 30 V. In this case,
VR = Vin − Vout
(d) In the circuit in Figure 24(d), the peak forward current IF, p will flow through the diode
when the diode is forward biased, i.e. VF = 0.7 V and Vin = 30 V. In this case,
VR = Vin − Vout
Problem 24
Determine the output voltage waveform for each circuit in Figure 24.
Solution
(a) During the positive half cycle of the input, the diode is forward biased when 12 V <
Vin ≤ 30 V. In this case, the output of the circuit in Figure 24(a) is given by
During the positive half cycle of the input, the diode is reverse biased when 0 V ≤
Vin ≤ 12 V. In this case, the diode acts as an open circuit and the branch of the
circuit consisting of the diode and the dc bias can be removed from the circuit. As a
result, no current will flow through the circuit and Vout will be the same as Vin , i.e.,
0 V ≤ Vout ≤ 12 V. Portions of this output is shown in red in Figure 25(a).
During the negative half cycle of the ac input Vin both Vin and the 12 V dc bias drive
the diode in reverse bias mode. In this case, the diode acts as an open circuit and
the branch of the circuit consisting of the diode and the dc bias can be removed from
the circuit. As a result, no current will flow through the circuit and Vout will be the
same as Vin , i.e., −30 V ≤ Vout ≤ 0 V. Portions of this output is shown in green in
Figure 25(a).
(b) During the positive half cycle of the input, the diode is forward biased when 0 V ≤
Vin < 12 V. In this case, the output of the circuit in Figure 24(a) is given by
During the positive half cycle of the input, the diode is reverse biased when 11.3 V <
Vin ≤ 30 V. In this case, the diode acts as an open circuit and the branch of the
circuit consisting of the diode and the dc bias can be removed from the circuit. As a
result, no current will flow through the circuit and Vout will be the same as Vin , i.e.,
11.3 V ≤ Vout ≤ 30 V. Portions of this output is shown in red in Figure 25(b).
During the negative half cycle of the input, both Vin and 12 V dc bias voltage will
drive the diode in forward bias mode and the output of the circuit in Figure 24(a) is
given by
(c) During the positive half cycle of the input, both Vin and 12 V dc bias will drive the
diode into forward bias mode. In this case, the output of the circuit in Figure 24(c) is
given by
During the negative half cycle of the input, the diode is reverse biased when −30 V ≤
Vin < −12 V. In this case, the diode acts as an open circuit and the branch of the
circuit consisting of the diode and the dc bias can be removed from the circuit. As a
result, no current will flow through the circuit and Vout will be the same as Vin , i.e.,
−30 V ≤ Vout < −12 V. Portions of this output is shown in red in Figure 25(c).
During the negative half cycle of the input, when −12 V < Vin ≤ 0 V, the diode will be
forward biased and the output of the circuit in Figure 24(c) is given by
(d) During the positive half cycle of the input, both Vin and 12 V dc bias will drive the
diode in reverse bias mode. In this case, the diode acts as an open circuit and the
branch of the circuit consisting of the diode and the dc bias can be removed from the
circuit. As a result, no current will flow through the circuit and Vout will be the same as
Vin , i.e., 0 V ≤ Vout ≤ 30 V. Portions of this output is shown in green in Figure 25(d).
During the negative half cycle of the input, the diode is reverse biased when −12 V <
Vin ≤ 0 V. In this case, the diode acts as an open circuit and the branch of the
circuit consisting of the diode and the dc bias can be removed from the circuit. As a
result, no current will flow through the circuit and Vout will be the same as Vin , i.e.,
−12 V < Vout ≤ 0 V. Portions of this output is shown in red in Figure 25(d).
During the negative half cycle of the input, the diode is forward biased when Vin <
−12 V. In this case, the output voltage is given by
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ELTR 270 SAIT, MSE, ENT WINTER 2023
Figure 25: Output waveforms of the diode clipper circuits in Figure 24.
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