DEPARTMENT OF ELECTRICAL AND

ELECTRONICS ENGINEERING

SEMESTER/YEAR: IV / II

LAB CODE: EE23432

LAB NAME: LINEAR INTEGRATED CIRCUITS AND

APPLICATIONS LABORATORY
 SYLLABUS REVISION

2017 Regulations –EE17412 LINEAR AND DIGITAL INTEGRATED CIRCUITS LAB (2017 TO
2021 BATCH)
2017 Regulations –EE17412 LINEAR AND DIGITAL INTEGRATED CIRCUITS LAB (2018 TO
2022 BATCH)
2019 Regulations - EE19441- LINEAR INTEGARTED CIRCUITS AND APPLICATIONS
LAB
2019 Regulations - EE19441- LINEAR INTEGARTED CIRCUITS AND APPLICATIONS
LAB
2023 Regulations - EE19441- LINEAR INTEGARTED CIRCUITS AND APPLICATIONS
LAB
(In 2019 regulation Linear and Digital Integrated Circuits Lab is converted into integrated lab
as Linear Integrated Circuits and Applications Lab)
 INDEX

TOPIC
Sl.No.

SAFETY MEASURES
1

ABOUT THE DEPARTMENT

2

3 INSTITUTE VISION AND MISSION

4 PEO’S, PO’S AND PSO’S

5 COURSE OUTCOMES AND COURSE OBJECTIVES AND THEIR

MAPPING WITH POS, PEOS AND PSOS AND JUSTIFICATION

6 SYLLABUS

7 LIST OF EXPERIMENTS

8 EXPERIMENTS
 RAJALAKSHMI ENGINEERING COLLEGE
DEPARTMENT OF ELECTRICAL AND ELECTRONICS
ENGINEERING
LINEAR INTEGRATED CIRCUITS AND APPLICATIONS LABORATORY

SAFETY MEASURES

1. Always enter Electrical Engineering Laboratories with prescribed uniform only.

2. Get the circuit verified and take the required apparatus from the stores by filling the
prescribed form.
3. Close the supply switch, only after the connections are checked by the faculty members.
4. Handle all equipment with care.
5. Fire extinguishers are installed in each floor and refilled periodically by the
company personnel. The usage of fire extinguisher is demonstrated to all the
members.
6. Health centre is operated in all working days to provide medical service whenever
needed.
7. First aid boxes are kept in all the laboratories for the safety purpose during
emergency need.

8. Ensure that the meters of correct rating are connecting in the circuit.
 ABOUT THE DEPARTMENT

The department of Electrical and Electronics Engineering was established in the year 1999-
2000. Presently, the department offers B.E. Electrical and Electronics Engineering with an
intake of 120 students and M.E. Embedded systems Technologies with an intake of 18 students.
The department has also been recognized as a collaborative research Centre by Anna
University, Chennai, leading to Ph.D. degree. Several research scholars have obtained Ph.D.
degree through this research Centre. There are three Centres of Excellence, viz., Renewable
Energy Systems, Embedded System Technologies and Electric vehicles in EEE department.
The department has full-fledged faculty members who are dedicated and well experienced in
various fields of specializations and all the laboratories of the department are fully equipped
with latest systems, apparatus and software tools. A large number of research papers have
been published by the faculty members in reputed journals in the area of Power Systems, Power
Electronics, Control Systems and Renewable Energy Systems. The department has been
reaccredited by the National Board of Accreditation, New Delhi (NBA). The mission of the
department is to produce highly competent Electrical and Electronics Engineers with a sound
knowledge in all the areas concerning the discipline.
 RAJALAKSHMI ENGINEERING COLLEGE
DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING
THANDALAM, CHENNAI – 602 105.
ACCREDITED BY NBA & NAAC & ISO 9001: 2008 CERTIFIED

INSTITUTE VISION AND MISSION

VISION
• To be an institution of excellence in Engineering, Technology and Management education
& Research.

• To provide competent and ethical professional with a concern for society.

MISSION
• To impart quality technical education imbibed with proficiency and human values.

• To provide right ambience and opportunities for the students to develop into creative,
talented and globally competent professionals.

• To promote research and development in Technology and Management for the benefit of
the society.

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

DEPARTMENT VISION AND MISSION

VISION

To be an international centre in education, research and the application of knowledge, to

benefit the society globally in the field of Electrical and Electronics Engineering

MISSION

• To impart high quality technical education and develop Electrical and Electronics
Engineers with a sound theoretical combined with practical skills in all the areas concerning
the discipline.

• To inculcate innovative research capabilities and exemplary professional conduct to lead

and to use technology for the progress of our country.
 RAJALAKSHMI ENGINEERING COLLEGE
DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING
THANDALAM, CHENNAI – 602 105.
ACCREDITED BY NBA & NAAC & ISO 9001: 2008 CERTIFIED

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs)

[1] To provide students with a strong foundation in mathematics, science and engineering,
necessary to understand and solve engineering problems. Prepare the students for a
successful career in industries and also for higher studies.
[2] To enable the students to acquire the ability to analyze, design and build electrical and
electronic systems, needed in power electronic drives, variety of controllers, and power
systems.
[3] To impart students with a sound knowledge of software tools and skills for taking up
research in upcoming areas in the field of electrical and electronics engineering, and for
embarking on entrepreneurial ventures with an aptitude for lifelong learning.
[4] To impart communication skills, to inculcate values and professional ethics, leadership
qualities and team spirit for an overall personality development, to create environmental
awareness and a passion for using the knowledge acquired, for addressing the societal
concerns.

(A) PROGRAM OUTCOMES (POs)

Engineering Graduates will be able to:

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of
the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities
with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to
the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
Solutions in societal and environmental contexts, and demonstrate the knowledge of, and need
for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
Engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage
in independent and life-long learning in the broadest context of technological change.

(B) PROGRAM SPECIFIC OUTCOMES (PSOs)

PSO 1. Analyze, model and design Electrical and Electronic circuits and machines.
PSO 2. Comprehend the structure of power apparatus and systems and analyze their operation,
control, protection and utilization.
PSO 3. Use of programmable devices, embedded systems and software tools for the
simulation, design and building newer electrical and electronic systems leading to research and
invention.
Course Outcomes and Course Objectives and their mapping with POs, PEOs and PSO
COURSE PEO’S MAPPING MAPPING
COURSE OBJECTIVE COURSE OUTCOME
NAME MAPPING OF PO’S OF PSO’S
LABORATORY
EE23432/ LINEAR INTEGRATED CIRCUITS AND APPLICATIONS

To learn the IC Student will be able to

fabrication procedure and obtain the characteristics of
the internal structure of op-amp.
an op-amp.
Student will be able to
To study the realize the various
characteristics, design mathematical applications
and implementation of of op-amp.
basic op-amp
applications. Student will be able to
design the active filters
To explore on active using op-amp.
filters and signal
generators Student will be able to
generate a PWM pulses.
To impart knowledge on 1,2,3,4 1,2,3,4,5,7, 1,2,3
design and Student will be able to 8,9, 11,12
implementation of IC 555 develop power supply
timer, VCO and PLL. circuits.

To inculcate knowledge
on design of power
supply using regulator
ICs.

COs/POs&PSOs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO 1 3 2 3 2 3 - 1 1 2 - 3 3 3 2 3
CO 2 2 3 3 3 3 - 1 1 2 - 3 3 3 2 3
CO 3 2 3 3 3 3 - 1 1 2 - 3 3 3 2 3
CO 4 2 3 3 3 3 - 1 1 2 - 3 3 3 2 3
CO 5 2 3 3 3 3 - 1 1 2 - 3 3 3 2 3
Average 2.2 2.8 3 2.8 3 - 1 1 2 - 3 3 3 2 3
 MAPPING AND JUSTIFICATION
To learn the IC fabrication procedure and the internal structure of an op-amp
CO1
PO1 Apply the knowledge

PO2 Identify, formulate

PO3 Design/development of solutions

PO4 Conduct investigations of complex problems

PO5 Modern tool usage

PO6 NA

PO7 Environment and sustainability

PO8 Ethics

PO9 Individual and team work

PO10 Communication

PO11 Project management and finance

PO12 life-long learning

CO2 To study the characteristics, design and implementation of basic op-amp applications
PO1 Apply the knowledge
PO2 Identify, formulate
PO3 Design/development of solutions
PO4 Conduct investigations of complex problems
PO5 Modern tool usage
PO6 NA
PO7 Environment and sustainability
PO8 Ethics
PO9 Individual and team work
PO10 Communication
PO11 Project management and finance
PO12 life-long learning

CO3 To explore on active filters and signal generators

PO1 Apply the knowledge

PO2 Identify, formulate

PO3 Design/development of solutions

PO4 Conduct investigations of complex problems

PO5 Modern tool usage

PO6 NA

PO7 Environment and sustainability

PO8 Ethics

PO9 Individual and team work

PO10 Communication

PO11 Project management and finance

PO12 life-long learning

CO4 To impart knowledge on design and implementation of IC 555 timer, VCO and PLL
PO1 Apply the knowledge

PO2 Identify, formulate

PO3 Design/development of solutions

PO4 Conduct investigations of complex problems

PO5 Modern tool usage

PO6 NA

PO7 Environment and sustainability

PO8 Ethics

PO9 Individual and team work

PO10 Communication

PO11 Project management and finance

PO12 life-long learning

CO5 To inculcate knowledge on design of power supply using regulator ICs.

PO1 Apply the knowledge

PO2 Identify, formulate

PO3 Design/development of solutions

PO4 Conduct investigations of complex problems

PO5 Modern tool usage

PO6 NA

PO7 Environment and sustainability

PO8 Ethics

PO9 Individual and team work

PO10 Communication

PO11 Project management and finance

PO12 life-long learning

 SYLLABUS

Course Code Course Title (Lab Oriented Theory Course) Category L T P C

EE23432 Linear Integrated Circuits and Applications Laboratory PC 3 0 2 4
Objectives:
• ●To teach the IC fabrication procedure and the internal structure of an op-amp.
• ●To provide knowledge on the characteristics, design and implementation of basic op-amp applications.
• ●To explore active filters, signal generators, ADC and DAC.
• ●To impart knowledge on design and implementation of IC 555 timer, VCO and PLL.
• ●To inculcate knowledge on design of power supply using regulator ICs.
List of Experiments
1 Applications of Op-amp (Amplifier, Adder and Subtractor)
2 Op- Amp based Differentiator and Integrator.
3 Design and development of first and second order active filters.
4 Design and development of Astable and Monostable Multivibrator using 555 timer IC.
5 Design and development of fixed and variable power supplies using LM7805, LM7905 and LM317.
6 Design and development of frequency multiplier and divider using PLL IC.
7 Design and development of SMPS using LM78S40.
Total Contact Hours : 30
Course Outcomes:
On completion of the course, students will be able to
• ●obtain the characteristics of op-amp.
• ●realize the various mathematical applications of op-amp.
• ●design the active filters using op-amp.
• ●generate a PWM pulses.
• ●develop power supply circuits.
Suggested Activities
• Mini Projects using IC 741 and 555 timer.
• Technical quiz on integrated circuits.
Suggested Evaluation Methods
• Continuous Assessment Test
• Assignments
• Viva-Voce
 LIST OF EXPERIMENTS

1. Applications of Op-Amp (Inverting and Non – Inverting Amplifier)

2. Applications of Op-Amp (Adder and Subtractor)

3. Applications of Op-Amp (Differentiator)

4. Applications of Op-Amp (Integrator)

5. Design and development of first and second order active filters.

6. Design and development of Astable and Monostable Multivibrator using 555 timer IC.

7. Design and development of fixed and variable power supplies using LM7805, LM7905 and

LM317.

8. Design and development of frequency multiplier and divider using PLL IC.

9. Design and development of SMPS using LM78S40.

Expt. No. 1
Date:
APPLICATIONS OF OP-AMP - I
(INVERTING AND NON – INVERTING AMPLIFIER)

1. a. INVERTING AMPLIFIER

AIM:

To design an inverting amplifier for the given specifications using operational amplifier (Op-
Amp IC 741).
Closed loop gain, ACL = ------------

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. Cathode Ray Oscilloscope 30 MHz 1
3. Dual Regulated Power Supply 0 – 30 V/ 2A 1
4. Operational Amplifier IC 741 1
5. Bread Board 1
Resistors Computed from design / 0.25 W / 3
6.
±10 % ( E12 series )
*
7. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection.

THEORY:
An amplifier which provides a phase shift of 180 degree between input and
output and allows scaling of the signal to any voltage range by adjusting the gain is called
Inverting Amplifier. The input signal is applied to the inverting input terminal of the op-
amp through R1 and the non-inverting input terminal of the op-amp is grounded. The
output voltage Vo is fed back to the inverting input terminal through the RF network,
where RF is the feedback resistor. The output voltage is given as,

Vo = - ACL Vi where ACL is the closed loop gain.

PROCEDURE:

1. Set the desired amplitude and frequency of the input sinusoidal voltage (Vi) using
function generator.
2. Check the CRO and observe the input waveform in CRO by adjusting the time and
amplitude settings.
3. From fig.1, Study the pin diagram of the Op-Amp. Use the bread board to
implement the circuit shown in fig. 2, with minimum number of connecting
wires.
4. + Vcc and - Vcc supply terminal of the Op-Amp IC ( pin 7 & 4 ) is connected to
the dual regulated power supply as shown in fig. 3 to bias the IC.
5. The input voltage from function generator is applied to the inverting terminal
(pin 2) of the Op-Amp (ensure that FG is in off condition).
6. Turn on the RPS and set the voltage to 15 V.
 7. Turn on the Function Generator (FG).
8. Set and check the CRO in the dual mode, to use the two channels.
9. Connect the channel 1 probe to input side and channel 2 probe to output side and
observe the amplification and phase shift.

PIN DIAGRAM:

Fig.1 Pin diagram of IC 741.

CIRCUIT DIAGRAM

Fig .2 Circuit diagram of inverting amplifier

Note: RL is the load resistor in Ω (optional)

Fig. 3 Circuit diagram showing RPS connection

DESIGN:

Given
ACL = ------------
For an inverting amplifier, closed loop gain, ACL = RF / R1
Where, RF = feedback resistor in Ω.
R1 = Current limiting resistor in Ω.
Assume R1 = -------------
Calculate RF = -------------------
FORMULA USED:

Output voltage, Vo = - ACL Vi = ---------------

Tabulation:

S. Output, Vo (V)
Measuring parameter Input, Vi (V)
No Theoretical Practical
Amplitude
1.
( No. of div x Volts per div )
Time period
2.
( No. of div x Time per div )
3. Waveform type

MODEL GRAPH :
(volts)
Voltage

Fig.4 Input and output waveforms of inverting amplifier

RESULT:

The inverting amplifier is designed and tested for the given closed loop gain and the waveforms
are drawn.
 1. b. NON - INVERTING AMPLIFIER
AIM:

To design a non- inverting amplifier for the given specifications using operational
amplifier (Op-Amp IC 741).
Closed loop gain, ACL = ------------

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. Cathode Ray Oscilloscope 30 MHz 1
3. Dual Regulated Power Supply 0 – 30 V/ 2A 1
4. Operational Amplifier IC 741 1
5. Bread Board 1
Resistors Computed from design / 0.25 W / 3
6.
±10 % ( E12 series )
*
7. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection

THEORY:

An amplifier which allows scaling of the input signal to any voltage range by
adjusting the gain without changing its phase is called non-inverting Amplifier. The
input signal is applied to the non-inverting input terminal and the inverting input terminal
of the op-amp is grounded. The output voltage Vo is fed back to the inverting input
terminal through the RF network, where RF is the feedback resistor. The output voltage
is given as,

The input sinusoidal signal of desired amplitude and frequency (Vi ) is set and applied to
the non inverting input terminal of the op-amp and the -inverting input terminal of the
op-amp is grounded. The output voltage Vo is fed back to the inverting input terminal
through the Rf network, where Rf is the feedback resistor. The output voltage is given
as,
Vo = ACL Vi
Here the output voltage is in phase with the input signal.

PROCEDURE:

1. Set the desired amplitude and frequency of the input sinusoidal voltage (Vi) using
function generator.
2. Check the CRO and observe the input waveform in CRO by adjusting the time and
amplitude settings.
3. From fig.1, Study the pin diagram of the Op-Amp.
4. Use the bread board to implement the circuit shown in fig. 2, with minimum number of
connecting wires.
5. + Vcc and - Vcc supply terminal of the Op-Amp IC ( pin 7 & 4 ) is connected to
the dual regulated power supply as show in fig. 3 to bias the IC.
6. The input voltage from function generator is applied to the non inverting terminal
( pin 3 ) of the Op-Amp ( Ensure that FG is in off condition ).
 7. Turn on the RPS and set the voltage to 15 V.
8. Turn on the Function Generator (FG).
9. Set and check the CRO in the dual mode, to use the two channels.
10. Connect the channel 1 probe to input side and channel 2 probe to output side and
observe the amplification and phase shift.

PIN DIAGRAM:

Fig.1 Pin diagram of IC 741.

CIRCUIT DIAGRAM

Fig . 2 Circuit diagram of non-inverting amplifier Note: RL is the load resistor in Ω (optional)

Fig. 3 Circuit diagram showing RPS connection

DESIGN :
Given
ACL = ------------
For a non - inverting amplifier, closed loop gain, ACL = 1+ RF / R1]
Where, RF = feedback resistor in Ω.
R1 = Current limiting resistor in Ω.
Assume R1 = -------------
Calculate RF = -------------------

FORMULA USED:

Output voltage, Vo = - ACL Vi = ---------------

Tabulation:

S. Output, Vo (V)
Measuring parameter Input, Vi (V)
No Theoretical Practical
Amplitude
1.
( No. of div x Volts per div )
Time period
2.
( No. of div x Time per div )
3. Waveform type

MODEL GRAPH:
(Volts)
Voltage

Fig. 4 Input and output waveforms of non-inverting Amplifier

RESULT:
The non-inverting amplifier is designed and tested for the given closed loop gain
and the waveforms are drawn.
Viva Questions:

1. List the different commercially available op-amps.

2. State the advantage of an IC.

3. Comment on the response of the inverting amplifier.

4. Write the maximum power supply voltage of IC741.

5. State the advantages of negative feedback.

6. What type of feedback is employed in non-inverting amplifier?

7. Why Op-Amp is not used in open loop configuration?

8. Write the open loop gain of an IC741.

9. List the practical Op-Amp Parameters.

10. State the characteristics of an ideal Op –Amp.

Max. Marks
Marks Obtained

OBSERVATION 5

VIVA 5
ATTENDANCE 5

TOTAL
MARKS
Expt. No.2 a
Date:
APPLICATIONS OF OP-AMP
(ADDER)

Aim:

To implement an adder circuit using Op-Amp IC 741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
*
7. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection

THEORY:
Summing amplifier is one of the applications of linear operation amplifier
which is used to combine two or more analog input signals. The output voltage is the
sum of the input voltages with weighting factor. Summing Amplifier is divided into
inverting summing amplifier and non inverting summing amplifier.

When , and independent

When
CIRCUIT DIAGRAM:

R1 = R2 = RF = 1 kΩ

Fig.1 Circuit diagram of adder using Op-Amp

TABULATION:

Vin Vout
S.No
V1 V2 Theory Practical
1
2
3

RESULT:

The two given dc input voltages are added using the op-amp adder circuit and the result is
verified.
Expt No: 2 b
Date:
APPLICATIONS OF OP-AMP
(SUBTRACTOR)

Aim:

To implement an subtractor circuit using Op-Amp IC 741.

APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity
1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors I KΩ 2
6.
7. Connecting wires and probes

* Minimum wire as required for connection

THEORY:

A basic differential amplifier can be used as a subtractor .It has two input signals V1 and V2
and two input resistances R1and R2 and a feedback resistor Rf.The input signals scaled to the
desired values by selecting appropriate values for the external resistors. From the figure, the
output voltage of the differential amplifier with a gain of ‘1’ is
V0= - R/Rf (V2-V1)
V0=V1-V2.
Also R1=R2=Rf =1KΩ.
Thus, the output voltage V0 is equal to the voltage V1 applied to the non inverting terminal
minus voltage V2 applied to inverting terminal. Hence the circuit is subtractor.

PROCEDURE:

1. Connect the circuit as per the diagram.

2. Apply the supply voltage of +15V to pin 7 and -15V to pin 4 respectively.
3. Apply the input V1 and V2
4. Using multi meter measure the dc output voltage at the output terminal.
5. Vary the input voltages and note down the corresponding output.
CIRCUIT DIAGRAM

R1 = R2 = R3 = RF = 1 kΩ
Fig.1 Circuit diagram of Subtractor using Op-Amp

TABULATION

Vi Vou
S.No n t
V1 V2 Theory Practical
1
2
3

RESULT

The two given dc input voltages are subtracted using the op-amp circuit and the result is
verified.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL
MARKS
Expt. No.3
Date:
APPLICATIONS OF OP-AMP - IV
DIFFERENTIATOR

AIM:
To design a differentiator circuit to differentiate an input signal that varies in frequency
from 10 Hz to about 1 kHz using opamp IC 741.
a. Draw the output waveform when a sine wave of 1 V peak at 1kHz is applied to the
differentiator.
b. Draw the output waveform when a sauare wave of 1 V peak at 1kHz is applied to the
differentiator.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 0.25
6.
W / ±10 % ( E12 series )
Capacitors Unpolarised ,fixed, leaded and 1
7. dics type up to 1µf ( E3 series
)
*
8. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection
THEORY:

An op-amp differentiator performs mathematical operation of differentiation, which is

a process of determining the instantaneous rate of change of a function. The output waveform
is derivative of the input waveform. The differentiator is constructed from a basic inverting
amplifier when the input resistor R1 is replaced by a capacitor C1 and the feedback element is
a resistor Rf. The input signal to the differentiator is applied to the capacitor. The capacitor
blocks any DC content so there is no current flow to the amplifier summing point, resulting in
zero output voltage. The capacitor only allows AC type input voltage changes to pass through
and whose frequency is dependent on the rate of change of the input signal.
The expression for the output voltage is given as,

Vo = - Rf C1 ( dVi /dt )

The negative sign in the equation reflects the inversion resulting from the use of the inverting
input of the op amp. A resistor Rcomp = Rf is normally connected to the non-inverting input
terminal of the op-amp to compensate for the input bias current.
At low frequencies the reactance of the capacitor is “High” resulting in a low gain ( Rf / Xc )
and low output voltage from the op-amp. The frequency at which gain is zero dB is given by

At higher frequencies the reactance of the capacitor is much lower resulting in a higher gain
and higher output voltage from the differentiator amplifier. However, at high frequencies an
op-amp differentiator circuit becomes unstable and will start to oscillate. The stability and
high frequency noise problems can be corrected by the addition of two
components:- R1 and CF. The gain limiting frequency fb is given by

The input signal will be differentiated properly if the time period, T of the input signal
is larger than or equal to Rf C1 i.e. T > Rf C1.

A practical differentiator can be designed by implementing the following steps:

1. Select fa(frequency correspond to unity gain) equal to the highest frequency of the
input signal to be differentiated. Then, assuming a value of C1 < 1 µF, calculate the
value of Rf.
2. Choose fb (frequency correspond to decrease in gain by 20 dB/decade) fb = 10 fa and
calculate the values of R1 and Cf so that R1C1 = Rf Cf.

• A differentiator circuit produces a constant output voltage for a steadily changing input
voltage. It is most commonly used in wave shaping circuits to detect high frequency
components in an input signal and also as a rate–of–change detector in FM modulators.

CIRCUIT DIAGRAM

Fig. 1 Differentiator circuit using Op-Amp

DESIGN :

Given fa = --------- Hz
We know the frequency at which the gain is 0 dB, fa = 1 / (2π Rf C1)
Let us assume C1 = 0.1 µF; then
Rf = _________
Since fb = 10 fa , fb = ---------- kHz
We know that the gain limiting frequency fb = 1 / (2π R1 C1)
Hence R1 = _________
since R1C1 = Rf Cf ; Cf = _________

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-
Amp.
4. The input and output voltage waveforms are observed in the CRO.

TABULATION
S. Output, Vo (V)
Measuring parameter Input, Vi (V)
No Theoretical Practical
Amplitude
1.
( No. of div x Volts per div )
Time period
2.
( No. of div x Time per div )
3. Waveform type

MODEL GRAPH:

Fig.2 Input and spike output waveforms of a differentiator

(a) Sine wave input and cosine wave output b) Square wave input and spike output

RESULT:

The differentiator is designed for the given specifications and the output waveforms are drawn.
Expt. No.4
Date:
APPLICATIONS OF OP-AMP – V
INTEGRATOR

AIM:

To design an integrator circuit for the given specifications using Op-Amp IC 741 and
to draw the output waveforms when the following input voltages are applied a) A sine wave
of 1V peak at 1 kHz and b) A square wave of 1 V peak at 1kHz.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 1
7. and disc type up to 1µf ( E3
series )
*
8. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection
THEORY:
As its name implies, integrator is an operational amplifier circuit that performs the
mathematical operation of integration and produces an output voltage which is proportional
to the integral of the input voltage. In other words the magnitude of the output signal is
determined by the length of time a voltage is present at its input as the current through the
feedback loop charges or discharges the capacitor as the required negative feedback occurs
through the capacitor. Such a circuit is obtained by using a basic inverting amplifier
configuration if the feedback resistor Rf is replaced by a capacitor Cf. The expression for the
output voltage is given as,

Vo = - (1/Rf C1) ∫ Vi dt
Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal.
When a step voltage, Vi is applied to the input of an integrating amplifier, the
uncharged capacitor Cf has very little resistance and acts like a short circuit allowing
maximum current to flow via the input resistor R1. No current flows into the amplifiers input
terminal as the inverting input terminal is at virtual ground. The impedance of the capacitor at
this point is very low and the gain XC / R1 is also very small giving an overall voltage gain of
less than one. The feedback capacitor, Cf begins to charge up at a rate determined by the time
constant, τ = RC of the series RC network due to the influence of the input voltage, its
impedance Xc slowly increase in proportion to its rate of charge. Voltage across the capacitor
also slowly increases causing the charging current to decrease as the impedance of the
capacitor increases. This results in the ratio of Xc/R1 increasing producing a linearly
increasing ramp output voltage that continues to increase until the capacitor is fully charged.
At this point the capacitor CF acts as an open circuit, loses its feedback blocking any more
flow of DC current. The ratio of feedback capacitor to input resistor (Xc/R1) is now infinite
resulting in infinite gain. The result of this high gain (similar to the op-amps open-loop gain),
is that the output of the amplifier goes into saturation. To limit the gain and to provide feedback
at DC a resistor Rf is connected in parallel with Cf.
Normally between fa and fb the circuit acts as an integrator where fa is the gain limiting
frequency at which the gain is approximately equal to Rf/R1 and fa = 1 / (2π Rf Cf).
The frequency at which the gain is 0 dB, fb = 1 / (2π R1 Cf). Generally, the value of fa < fb .
The input signal will be integrated properly if the time period T of the input signal is larger
than or equal to Rf Cf. That is, T ≥ Rf Cf. The integrator is most commonly used in analog
computers and ADC and signal-wave shaping circuits.
CIRCUIT DIAGRAM

Fig.1 Integrator circuit using Op-Amp

DESIGN:

1. Choose the low frequency (gain limiting frequency), fa as same as the input
voltage frequency f, i.e. fa= f
2. Assume Cf = 0.01 µF.
3. Since fa =1 / (2π Rf Cf), calculate Rf = ---------------
4. Let fb = 10 fa= ----------
5. Calculate R1 = ------------ using fb = 1 / (2π R1 Cf)

PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-
Amp.
4. The input and the output voltage waveform are observed in the CRO.
TABULATION
S. Output, Vo (V)
Measuring parameter Input, Vi (V)
No Theoretical Practical
Amplitude
1.
( No. of div x Volts per div )
Time period
2.
( No. of div x Time per div )
3. Waveform type
MODEL GRAPH:
V
V

Time,
(a)
Vo
Vi

Time, t

(b)
Fig.2 Input and spike output waveforms of an integrator
a) Square wave input and ramp output
b) Sine wave input and cosine wave output

RESULT:

The integrator is designed for the given specifications and the output waveforms are drawn.
Viva Questions

1. What is an integrator?

2. Write the disadvantages of ideal integrator?

3. Write the applications of integrator?

4. What is a differentiator?

5. Write the disadvantages of ideal differentiator.

7. Write the applications of differentiator?

8. Why compensation resistance is needed in differentiator?

9. Why integrators are preferred over differentiators in analog comparators?

10. Write the unity frequency bandwidth of an IC741.

Max. Marks
Marks Obtained

OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL
MARKS
Expt. No.5 a
Date:
DESIGN AND DEVELOPMENT OF FIRST AND SECOND ORDER ACTIVE
FILTERS
(FIRST ORDER LOW PASS FILTER)
AIM:

To design and implement first-order LPF using an op-amp IC 741 and to obtain
frequency response.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 1
7. and disc type up to 1µf ( E3
series )
*
8. Connecting wires and probes 22 AWG Plain / /3
* Minimum wire as required for connection

THEORY:
A frequency selective electric circuit that passes electric signals of a specified band of
frequencies and attenuates the signals of frequencies outside the band is called an electric filter.
The first-order lowpass filter consists of a single RC network connected to the non-inverting
input terminal of the operational amplifier. Resisters R1 and RF determine the gain of the filter
in the passband. The lowpass filter has maximum gain at f = 0 Hz. The frequency range from
0 to fh is called the passband and the frequency range f > fh is called the stopband.
The first order low pass butter worth filter uses an RC network for filtering. The op-amp is
used in the noninverting configuration, hence it does not load down the RC network. Resistors
R1 and R2 determine the gain of the filter.

V0/Vin = Af /(√1 +(f/fh)2

Where, Af = 1+ Rf /R1= passband gain of filter, f = frequency of the input signal, fh=1/2ΠRC
= high cut-off frequency of the filter, and V0/Vin = gain of the filter as a function of frequency.
The gain magnitude and phase angle equations of the LPF can be obtained by converting
V0/Vin into its equivalent polar form as follows |V0/Vin| = Af /(√1 +(f/fh)2, Φ = - tan-1 (f/fh).
Where Φ is the phase angle in degrees. The operation of the LPF can be verified from the gain
magnitude equation.
CIRCUIT DIAGRAM

R1 10kΩ Rf 10kΩ

-15V
2 4

741 6

R 15kΩ 3 7
15V

0.01µ C
Vin

Fig.1. Circuit Diagram of First order Active Low Pass Filter

DESIGN:

Choose a standard value of Capacitor C say 0.01 µF Fh=1/2πRC

Fh=1/2π*15k*0.01µf = 1k

Av=1+Rf/R1 & With this R1=10k, Rf=10k

PROCEDURE:
5. Connections are given as per the circuit diagram.
6. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
7. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-
Amp.
8. The input and the output voltage waveform are observed in the CRO.

TABULATION
S. Input frequency Output Gain in dB
No Voltage 20 log(Vo/Vi)
1.
2.
3.
4.
5.
6.
7.
8.
MODEL GRAPH:

Output

voltage

10
3dB
8

6 PASS BAND
STOP BAND
4

1 2 3 4 5 6 7 8 9 10 11 12 13 Frequency in kHz

Fig.2.Frequency Response of first order active Low Pass Filter

RESULT:

Thus the design and implementation of first-order LPF using an op-amp IC 741was performed
and frequency response is plotted.
Expt. No.5 b
Date:
DESIGN AND DEVELOPMENT OF FIRST AND SECOND ORDER ACTIVE
FILTERS
(FIRST ORDER HIGH PASS FILTER)
AIM:

To design and implement first-order HPF using an op-amp IC 741 and to obtain
frequency response.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 1
7. and disc type up to 1µf ( E3
series )
*
8. Connecting wires and probes 22 AWG Plain / /3

* Minimum wire as required for connection

THEORY:

High pass filters are often formed simply by interchanging frequency. Determining resistors and
capacitors in LPFs that is, a first-order HPF is formed from a first-order LPF by interchanging
components ‘R’ and ‘C’. The figure show first-ordered butter worth HPF with a lower cut-off
frequency of ‘ Fl’. This is the frequency at which the magnitude of the gain is 0.707 times pass band
and value. All frequencies, with the highest frequency determined by the closed-loop band width of the
op-amp. For the first order, HPF the gain is

V0/ Vin = Af [ (f/fc) /√ (1+ (f/fc)2]

Where, Af = 1 +Rf /R1 = Passband gain of the filter, f = frequency of input signal, fc = 1/2ΠRC =
lower cut off frequency. Since HPFs are formed from LPFs simply by interchanging Rs and Cs. The
design and frequency scaling procedures of the LPFs are also applicable to HPFs.
CIRCUIT DIAGRAM

R1 10kΩ Rf 10kΩ

-15V
2 4

6
741 V0
0.01µF

O C 3 7
15V

R 15kΩ RL
Vin
100k

Fig.1.Circuit Diagram of First order Active High Pass Filter

DESIGN:

Choose a standard value of Capacitor C say 0.01 µF

Then fL = 1/2πR = 1/2π*15k*0.01µ = 1k

fL=1k

Av=1+Rf/R1 & With this R1=10k, Rf=10k

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-
Amp.
4. The input and the output voltage waveform are observed in the CRO.
TABULATION
S. Input frequency Output Gain in dB
No Voltage 20 log(Vo/Vi)
1.
2.
3.
4.
5.
6.
7.
8.

MODEL GRAPH:

Output

Voltage

10
3dB
8

6
PASS BAND
4 STOP BAND

1 2 3 4 5 6 7 8 9 10 11 12 13 Frequency in kHz

Fig.2.Frequency response of first order active High Pass Filter

RESULT:

Thus the design and implementation of first-order LPF using an op-amp IC 741was performed
and frequency response is plotted.
Expt. No.5 c
Date:
DESIGN AND DEVELOPMENT OF FIRST AND SECOND ORDER ACTIVE
FILTERS
(SECOND ORDER LOW PASS FILTER)
AIM:

To design and implement second-order LPF using an op-amp IC 741 and to obtain
frequency response.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 1
4. Op-Amp IC 741 1
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 1
7. and disc type up to 1µf ( E3
series )
*
8. Connecting wires and probes 22 AWG Plain / /3

* Minimum wire as required for connection

THEORY:

An active filter is a type of filter that includes one or more active circuit components such as a transistor
or an operational amplifier (Op-Amp). They derive their energy from an external source of energy and
use it to increase or amplify the signal output. Operational amplifiers can also be used to form or
change the circuit frequency response by making the filter’s output bandwidth narrower or even wider
by generating a more selective output reaction. If an active filter permits only low-frequency
components and denies all other high-frequency components, then it is termed as an Active Low Pass
Filter.

Second-Order Filters are also attributed to as VCVS filters since Op-Amp used here is Voltage
Controlled Voltage Source Amplifier. This is another important type of active filter used in
applications. The frequency response of the second-order low pass filter is indistinguishable to that of
the first-order type besides that the stopband roll-off will be twice the first-order filters at 40dB/decade.
Consequently, the design steps wanted of the second-order active low pass filter are identical. A simple
method to get a second-order filter is to cascade two first-order filters. The circuit diagram in shown
below:
CIRCUIT DIAGRAM

Fig.1. Circuit Diagram of Second Order Active Low Pass Filter

DESIGN:
fH=12πR2*R3*C2*C3
Av = 1 + R1RF
Assume R2 =R3 =R and C2 = C3 =
C Let C = 0.01 µF
Therefore, C2 = C3 = 0.01 µF
Calculate Value of R
R =12πfC = 12π*2000*0.01 µ = 7.957 kΩ
Hence R2 = R3 = 7.95 kΩ
Calculate R1 and
RF Av = 1 +
R1 RF
Gain = 1.5 …..
Given Therefore, 1.5
= 1 + R1RF Let R1 =
10kΩ Therefore, RF
= 5.86 kΩ

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
 3. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-
Amp.
4. The input and the output voltage waveform are observed in the CRO.

TABULATION
S. Input frequency Output Gain in dB
No Voltage 20 log(Vo/Vi)
1.
2.
3.
4.
5.
6.
7.
8.

MODEL GRAPH:

Fig.2.Frequency Response of Second Order Active Low Pass Filter

RESULT:

Thus the design and implementation of second-order LPF using an op-amp IC 741was
performed and frequency response is plotted.
Viva Questions

1. List the advantages of active filters over passive filter.

2. Draw the frequency response of first order LPF and HPF

3. What are the applications of LPF and HPF?

4. List the types of active Filter

5. What is meant by -3 dB frequency?

Max. Marks
Marks Obtained

OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL
MARKS
Expt. No.6 a
Date:
DESIGN AND DEVELOPMENT OF ASTABLE AND MONOSTABLE
MULTIVIBRATOR USING 555 TIMER IC.
(ASTABLE MULTIVIBRATOR)
AIM:
To design an astable multivibrator circuit for the given specifications (65% duty cycle
at 4 KHz frequency) using 555 Timer IC.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V 1
Timer IC NE 555 (+5 to +18V),
4. 1
200mA.
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 2
7. and disc type up to 1µf ( E3
series )
8. Connecting wires and probes 22 AWG Plain / */ 2
* Minimum wire as required for connection
THEORY:
An Astable multivibrator, often called a free-running multivibrator, is a
rectangular-wave-generating circuit. This circuit does not require an external trigger to change
the state of the output. The time during which the output is either high or low is determined
by two resistors and a capacitor, which are connected externally to the 555 timer. The time
during which the capacitor charges from 1/3 Vcc to 2/3 Vcc is equal to the time the output is
high and is given by,
tc = 0.69 (R1 + R2) C
Similarly the time during which the capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to the
time the output is low and is given by,
td = 0.69 (R2) C
Thus the total time period of the output waveform is,
T = tc + td = 0.69 (R1 + 2 R2) C
The term duty cycle is often used in conjunction with the astable multivibrator. The duty cycle
is the ratio of the time tc during which the output is high to the total time period T. It is
generally expressed in percentage. In equation form,

% duty cycle = [(R1 + R2) / (R1 + 2 R2)] x 100

PIN DIAGRAM:

Fig.15 NE 555 Pin diagram

CIRCUIT DIAGRAM OF ASTABLE MULTIVIBRATOR

Fig. 1 Astable Multivibrator Circuit using 555 timer

DESIGN:

Assume C= 0.01 µF
Given f= 4 KHz,
Therefore, Total time period, T = 1/f = ____________
Duty cycle = tc / T
Therefore, tc = ------------------------
and td = ____________
For an astable multivibrator
td = 0.69 (R2) C
Therefore, R2 = _____________
tc = 0.69 (R1 + R2) C
Therefore, R1 = _____________

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. + 5V supply is given to the + Vcc terminal of the timer IC.
3. At pin 3 the output waveform is observed with the help of a CRO
4. At pin 6 the capacitor voltage is obtained in the CRO and the V0 and Vc voltage
waveforms are plotted in a graph sheet.
TABULATION
Time period
Amplitude ( No. of div x
( No. of div x Time per div )
S.No Measuring Parameters
Volts per div )
tc td

1. Output Voltage , Vo

2. Capacitor voltage , Vc

MODEL GRAPH:

Fig. 2 Output voltage and capacitor voltage waveforms of astable multivibrator

RESULT:

The astable multivibrator circuit is designed and tested using 555 timer IC . The output voltage
and capacitor voltage waveforms were drawn.
Viva Questions

1. Explain the operation of IC555 in Astable mode.

2. Write the charging time for capacitor in Astable mode.

3. What are the modes of operation of 555 timers?

4. State the purpose of Control pin in 555 IC.

5. Which type of flip flop is internally present in the 555 timer IC

6. Give the applications of 555 IC in astable mode..

7. How many Comparators are there in 555 IC?

8. Write the reference voltage for trigger comparator.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL
MARKS
Expt. No.6 b
Date:
DESIGN AND DEVELOPMENT OF ASTABLE AND MONOSTABLE
MULTIVIBRATOR USING 555 TIMER IC.
(MONOSTABLE MULTIVIBRATOR)

AIM:
To design a monostable multivibrator circuit for the given specifications (tp = 0.616 ms)
using 555 Timer IC.

APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity
1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V 1
Timer IC NE 555 (+5 to +18V),
4. 1
200mA.
5. Bread Board 1
Resistors Computed from design / 2
6. 0.25 W / ±10 % ( E12 series
)
Capacitors Unpolarised ,fixed, leaded 2
7. and disc type up to 1µf ( E3
series )
8. Connecting wires and probes 22 AWG Plain / */ 2
* Minimum wire as required for connection
THEORY:
A monostable multivibrator often called a one-shot multivibrator is a pulse
generating circuit in which the duration of the pulse is determined by the RC network
connected externally to the 555 timer. In a stable or stand-by state the output of the circuit is
approximately zero or at logic low level. When an external trigger pulse is applied, the output
is forced to go high (approx. Vcc). The time during which the output remains high is given by,
tp = 1.1 R1 C .
At the end of the timing interval, the output automatically reverts back to its
logic low state. The output stays low until a trigger pulse is applied again. Then the cycle
repeats. Thus the monostable state has only one stable state hence the name monostable.
CIRCUIT DIAGRAM

Fig.1 Monostable Multivibrator Circuit using 555 timer

DESIGN:
Aassume C = 0.01 µF
Given tp = 0.616 ms = 1.1 R1 C
Therefore, R1 = _____________

PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + 5V supply is given to the + Vcc terminal of the timer IC.
3. A negative going trigger pulse of 5V, 2 KHz is applied to pin 2 of the 555 IC
4. At pin 3 the output waveform is observed with the help of a CRO
5. At pin 6 the capacitor voltage is obtained in the CRO and the V0 and Vc voltage
waveforms are plotted in a graph sheet.
TABULATION:

Time period
Amplitude ( No. of div x
( No. of div x Time per div )
S.No Measuring Parameters
Volts per div )
ton toff

1. Trigger input

2. Output Voltage , Vo

3. Capacitor voltage , Vc

MODEL GRAPH:

Fig. 2 Waveforms of the monostable multivibrator, a) Trigger input,

b) Capacitor voltage, c) Output voltage
RESULT:

The monostable multivibrator circuit is implemented and tested using 555 timer.
Viva Questions:

1. State the necessity of trigger pulse in monostable multivibrator.

2. State the use of discharge pin in 555 IC.

3. State the application of 555 IC in monostable mode.

4. How the trigger input is generated?

5. Differentiate astable mode from monostable mode.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL MARKS
Expt No: 7 a
Date:

DESIGN AND DEVELOPMENT OF FIXED POWER SUPPLIES USING LM7805,

LM7905

AIM :
To design and implement a fixed positive and negative voltage regulator using
dedicated IC’s.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Transformer 1 phase, 230 /12V, 0.5mA 1
2. Bridge rectifier 1 phase, 50 V,1A 1
3. Capacitor 1000 µf / 25V 1
4 Capacitor 100 nf 2
5 Regulator IC (LM7805,LM7905) 5V,1A 2

THEORY

To use a 78XX voltage regulator, you t insert it in series on the positive side of the
power supply circuit and connect the ground lead to the negative side. The diodes in a bridge
rectifier will drop about 3 V from the transformer output, so you’ll need a transformer whose
secondary delivers at least 11 V to produce 5 V of regulated output. Eleven-volt transformers
are rare, but 12 V transformers are readily available.

Thus, a 5 V regulated power supply starts with a 12 VAC transformer that delivers
12 V to the bridge rectifier, which converts the AC to DC and drops the voltage down to about
9 V and then delivers the voltage to the filter circuit, which smoothes out the ripples and passes
the voltage on to the 7805 voltage regulator, which holds the output voltage at 5 V.

PIN DIAGRAM

Fig. 1 LM7905 and LM 7805 Pin Diagram

CIRCUIT DIAGRAM:

Fig. 2 +5 V, Fixed Regulated Power Supply

RESULT:
The +5V fixed regulated power supply is implementation using voltage regulator
IC7805

Viva Question:

1) Use LM7905 to construct a -5V regulated power supply.

2) Use LM 7805 and LM 7905 to construct a dual regulated power supply.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL MARKS
Expt No: 7 b
Date:

DESIGN AND DEVELOPMENT OF VARIABLE POWER SUPPLIES USING LM317

AIM:
To design and implement an adjustable voltage regulator using dedicated IC’s.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Transformer 1 phase, 230 /24 V, 2A 1
2. Bridge rectifier 1 phase, 50 V, 2A 1
3. Capacitor 1000 µf / 50 V 1
4 Capacitor 100 nf 1
5 Capacitor 470 µf /35V 1
6 Capacitor 10 µf / 35V 1
7 Potentiometer 10k 1
8 Regulator IC (LM 317) 1.25 V to 30 V, 1A 1

THEORY:
The LM317 or LM117 series of adjustable 3-terminal positive voltage regulators is
capable of supplying in excess of 1.5A over a 1.2V to 37V output range,
And has many special features that I like are :
• Output Voltage Tolerance 1%
• Line Regulation 0.01%
• Load Regulation 0.3%
• Prevent the deposition temperature.
• Short-circuit protection.
• Ripple is eliminated with ratio of 80dB
• Maximum input voltage 40V
The working of circuits
Followed circuits below, the transformer T1 is changed a AC 220V down as AC 24V
to the bridge diode rectifier D1(1N4001) to D4(1N4001) there is dc voltage into the filter
capacitor C1 equal to DC35V. The output voltage from IC1 Depending on the Voltage Adj
pin of the IC. Or to adjust the VR1. The VR1 is control output dc voltage 0V(1.25V) to
30V(32V) or 37V maximum voltage at 1.5A max all range.

Calculate the LM317 output voltage

Output voltage equal to:
Vout = 1.25 x {1+ (Rp/R1)
- Vref = 1.25V
- Typically R1 is 220 ohms or 240 ohms as datasheet. use 220 ohms.
VR-10K only since it easy to use.
Rp = {(VR1 x R2) / (VR1 + R2)}
Test it, Suppose, rotate VR1 to lowest resistance cause Rp = ohms. put it in formula above:
Vout = 1.25 x {1+(0/220)}
= 1.25V
But when adjust VR1 to maximum resistance VR1 and R2 are parallel together. Rp = 5.46K
= 5460 ohms. test it in formula above:
Vout = 1.25 x {1+(5460/220)}
= 32.2V
Then the capacitor C3 is Better performance filter of IC1.
The diode D5 and D6 ( both is 1N4007) is the protector from external voltage to reverse to
makes the damage to the IC1.
CIRCUIT DIAGRAM:

Fig. 1 Adjustable Voltage Regulated Power Supply

RESULT:
The adjustable regulated power supply is implemented.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL MARKS
Expt No: 8
Date:

DESIGN AND DEVELOPMENT OF FREQUENCY MULTIPLIER AND DIVIDER

USING PLL IC.

AIM:
To design and implement a Frequency multiplication and Division using PLL IC’s.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. LM565 Dedicated PLL IC 1
2. Resistor 5 kΩ / 0.25W 1
3. Resistor 10 k / 0.25W 2
4 Capacitor 220 pF / 50V 1
6 Capacitor 330 pF / 50 V 1
7 Dual RPS 0 – 30 V/ 3A 1

THEORY
The block diagram of a frequency multiplier (or synthesizer) is shown in figure 2. In
this circuit, a frequency divider is inserted between the output of the VCO and the phase
comparator (PC) so that the loop signal to the PC is at frequency fOUT while the output of VCO
is N fOUT. This output is a multiple of the input frequency as long as the loop is in lock. The
desired amount of multiplication can be obtained by selecting a proper divide- by N network
where N is an integer. Figure shows this function performed by a 7490 configured as a divide-
by-4 circuit.
In this case the input Vin at frequency /in is compared with the output frequency fOUT at pin
5. An output at N fOUT (4 fOUT in this case) is connected through an inverter circuit to give an
input at pin 14 of the 7490, which varies between 0 and + 5 V. Using the output at pin 9, which
is one-fourth of that at the input to the 7490, the signal at pin 4 of the PLL is four times the
input frequency as long as the loop remains in lock. Since the VCO can be adjusted over a
limited range from its centre frequency, it may become necessary to change the VCO
frequency whenever the divider value is changed.
For verification of the circuit operation, one must determine the input frequency range
and then adjust the free running fOUT of the VCO by means of R1 and C1 so that the output
frequency of the 7490 divider is midway within the predetermined input frequency range. The
output of VCO should now be equal to 4 fin.
 Fig.1 Pin diagram of LM 565 PLL IC

Fig.2 Block diagram and Connection diagram of LM 565 PLL IC for Frequency
Multiplication

RESULT:
Thus, the design and implementation of Frequency multiplication and division using PLL
IC was performed.
 Viva Questions:

1) Define lock-in range.

2) Define capture range.

3) What is pull-in time?

4) List the important blocks in PLL.

5) Write the lock-in range for PLL.

6) Write the capture range for PLL.

7) List the applications of PLL.

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL MARKS
Expt No.9
Date:
DESIGN AND DEVELOPMENT OF SMPS USING LM78S40.

AIM: To study a buck and boost mode switching mode power supply using dedicated IC
µA78S40

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. µA78S40 IC 1
2. DSO 30 MHz 1
3. Dual RPS 0 – 30 V/2A 2
4. Bread Board 1
Resistors 1.2 KΩ 1
5. 3.6 KΩ 2
1MΩ 1
100 kΩ 2
0.33Ω, 0.22Ω 2
22k,47k 2
Capacitor 100 μF/50V, 470 µF/15V,150 µF/ 50V, 5
6. 470 pF, 1500 pF
Inductor 220 µH, 170 µH 2
7.
Diode 1N5822 1
8.
8. Connecting wires and probes

THEORY

The µA78S40 is a switching regulator subsystem, consisting of a temperature compensated

voltage reference, controlled–duty cycle oscillator with an active current limit circuit,
comparator, high–current and high–voltage output switch, capable of 1.5 A and 40 V, pinned–
out power diode and an uncommitted operational amplifier, which can be powered up or down
independent of the IC supply. The switching output can drive external NPN or PNP transistors
when voltages greater the 40 V, or currents in excess of 1.5 A, are required. Some of the
features are wide–supply voltage range, low standby current, high efficiency and low drift.
The µA78S40 is available in commercial (0° to + 70°C), and automotive (–40° to + 85°C)
temperature ranges. Some of the applications include use in step–up, step–down, and inverting
regulators, with extremely good results obtained in battery– operated systems.
 Fig.1.Pin Diagram of LM78S40

Fig.2. Block Diagram of LM78S40

Fig.3. Step down converter connection diagram of LM78S40

 Fig.3 Step up converter connection diagram of LM78S40

RESULT
SMPS – Buck and Boost mode is implemented using dedicated IC

Max. Marks
Marks Obtained
OBSERVATION 5
VIVA 5
ATTENDANCE 5
TOTAL MARKS