COMPUTER ORGANIZATION AND ARCHITECTURE BEC306C MODULE-2

MACHINE INSTRUCTIONS AND PROGRAMS

2.1 ADDRESSING MODES
Different ways of specifying operands and/or its location in an instruction is known as Addressing
modes.
Table 2-1 Generic Addressing modes

2.1.1 Addressing Modes using Variables and Constants

To denote a constant value to be given in the instruction, we use the “#" sign preceding the value.
(a) Register Mode
The operand is the contents of a processor register; register name is specified in the instruction.
Ex: Move R1, R2 ;Copy the contents of register R1 into register R2
Add R0, R1 ;Add the contents of register R0 to R1 and place the sum in register R1.
(b) Absolute (Direct) Mode
The operand is in a memory location. The absolute address of this location is given in the
instruction explicitly.
Ex: Move LOC, R1 ; Copy the contents of location LOC into register R1.
Move R0, SUM ; Transfer the contents of register R0 to memory location SUM
(c) Immediate mode
The operand is given explicitly in the instruction.
Ex: Move #100, R2 ; A constant value 100 (decimal) is put into register R2.
Add #$16, R1 ; A constant value 16 (Hex) is added to contents of register R1.
Note: If we write ADD R1, #25. This is invalid syntax, since destination of an operation can be register
or memory location and not a value.

2.1.2. INDIRECT ADDRESSING MODE:

▪ Operand resides in memory.
▪ Operand or address of the operand is not given explicitly in the instruction.
▪ The instruction provides effective address (EA) of the operand using a register
or a memory location.
▪ The `indirection' is denoted by ( ) sign around the register or memory location
as shown in Fig.1
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Fig.1 Indirect addressing mode illustration

Explanation:
Consider the instruction Add (Rl), R0. The operand is in memory. Register R1 gives the effective
address [EA], say B, of the operand. The data is read from location B and added to contents of register
R0.
The register or memory location that contains the address of an operand is called a pointer. Thus we
say that R1 points to the data or R1 is a pointer register.
Example 2.1: Adding ‘n’ numbers using Indirect addressing
➢ Register R2 is used as a pointer to the numbers in the array.
➢ Register R1 is used as a counter to hold count of numbers i.e., N
➢ Register R0 is used for addition (initially cleared to 0)

Fig.2 ALP to add ‘n’ numbers using Indirect addressing

Example 2.2 Write a program to add two n x n matrices.
Solution:
• Let A and B be two 2x2 matrices to be added and let C be the resultant matrix.
• To add the matrices, we have to add the corresponding elements.
• Assume that elements of the matrix are stored sequentially in memory row-wise,
as shown by the memory map in Fig.3
• Matrix A starts at address called MATA
• Matrix B starts at address called MATB.
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• Assume byte addressable memory and each number is of 32-bits. So, each
number occupies 4 byte space in memory.
• Store the order of the matrix (`n') in location NUM.
• Results are stored starting from location MATC.

Note: 2-d matrix is stored as 1-d sequential array in memory.

Fig.3. Matrix elements stored sequentially in memory

Fig.4 ALP for Matrix Addition

R0 - used for summing the elements and storing result.
R1 - used to hold the order of the matrix (n)
R2, R3, R4 → pointers (index registers) for two source arrays and the destination array
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2.1.3. INDEXED ADDRESSING MODE:

➢ Operand resides in memory.
➢ The effective address (EA) of the operand is generated by adding a constant value to
the contents of a register specified in the instruction. The register is called as index
register.
➢ The operation is indicated as X (Ri). The effective address is EA = X + [Ri], where X
is a constant value (signed integer) and Ri is the index register.
➢ The value is called as offset or displacement, whereas Ri is said to contain the base
address.
➢ The operand may be X units above or below the base address, since X is signed integer.
➢ The value in the index register is not modified.

Fig.5 Illustration of Indexed addressing mode

Example 1. Consider a database of test scores of students which is stored in memory as shown in Fig.
4. Each student is allocated a 4-word memory block indicating student ID and the marks scored in 3
tests. There are 'n' students in the class and this value n is stored in memory location N. Compute the
sum of the scores obtained by all the students in II test.

Solution: Word length is assumed to be 32-bits. So each entry in the memory occupies 4 byte space.
For the given problem, we need to add the scores obtained by all the students in II test.
We use the memory map given in Fig.6.
• The details of the students are stored from location LIST onwards.
• Let R2 register be used as index register.
• Rl holds the count value (n)
• R0 is used for summing

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Fig.6 Memory map for storing marks of students

The program structure is shown in Fig.7

Fig.7 ALP to add marks of students in 2nd test using Indexed addressing mode.

Note: Index mode is useful when an operand location is specified relative to a reference or base
address in the data structure
Modified program

2.1.4 Relative Addressing Mode

Instead of using a general purpose register Ri, we can use the program counter, PC, to
access an operand. Now, the form X (PC) denotes an effective address of the operand
which is X locations above or below the current contents of PC.

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2.1.5 Special Addressing Modes

We have seen the most widely used addressing modes such as Immediate, Direct,
Register, Indirect, Index and their variations. Some computers provide additional
modes to support some specific tasks.
(a) Auto-increment Mode: This is indirect mode with a modification. The effective
address of the operand is the contents of a pointer register specified in the instruction.
After accessing the operand, the contents of this pointer register is incremented
automatically to point to the next entity. The mode is denoted as (Ri)+, where Ri is the
pointer register. The + sign indicates that Ri is incremented after the operation.
This mode is useful when operands are stored consecutively in memory, i.e., for array
manipulations.

(b) Auto-decrement Mode: This mode is useful to access an array in the reverse order.
The value of the pointer register specified in the instruction is decremented first and
this value is used as the effective address of the operand.
We denote the auto-decrement mode by putting the specified register in parentheses
preceded by a minus sign to indicate that the value of register is decremented before
accessing the operand. Thus, it is represented as, -(Ri). Again, the decrement value is
according to the size of the operand.

These two modes are useful to implement a data structure called stack.

Example 2.4 Write an assembly language program for addition of `n' numbers stored
in memory using (i) Auto-increment and (ii) Auto-decrement addressing modes.

Solution: The memory map is shown in Fig.8. The numbers are stored consecutively
starting from NUM1 until NUMn. We take a byte-addressable memory and 32-bit
operands. i.e., address NUM2 = NUM1 + 4.

Fig.8 Memory Map to store ‘n’ numbers

The count value `n' is stored at location NUM.
➢ Register R1 holds the count.
➢ R2 is used as pointer register to access the data items.
➢ Register R0 is used for addition.

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Each number is spaced 4 bytes apart.

This program is already written using Indirect Mode in Fig.2. Here, we use Auto-increment and Auto-
decrement mode
Auto-increment mode:

Fig.9 Adding a set of numbers using Auto-increment mode

Auto-decrement mode:

Fig.10 Adding a set of numbers using Auto-decrement mode

2.2 Assemblers
`Assembler' is a system software which translates the programs written in assembly
language into a sequence of 0s and 1s, called machine language.
The assembler is stored in the memory of the computer. A user/source program is
written in Assembly language using a Text editor.

▪ The user program is called the source program (.asm) and the assembler
converts it to object program (.obj). The object program is later converted to
Executable mode (.exe) with library functions, which is a binary sequence of 0s
and 1s.. These patterns are taken by the processor and will be executed.
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▪ With the help of another system software called loader, assembler also assigns
physical addresses to the instructions of the source program.

2.2.1 Assembler Directives

We need to make changes to the program at every place where the variable is used.
Similarly, we may need to reserve some locations in the memory in advance, to store
the data. All such kinds of applications require special support from the assembler.

So, we use some commands which inform the assembler to do a specific task. Such
commands are called assembler directives. These commands are not translated into
machine language. So they are not executed by the processor and hence are known as
pseudo OPcodes or pseudo codes.

For ex, consider a statement, SUM EQU 400

where SUM is a variable name, EQU is the assembler directive.
During the assembly process, when the assembler encounters this statement, it will
assign a value of 400 to the variable SUM and replace every occurrence of SUM with
the value 400.

What is the use?

SUM EQU 200
Now, when the program is run, the label SUM is replaced by the value 200
automatically by the assembler, wherever the variable name SUM appears in the user
program.

Fig. 11 Addition program using Assembler Directives

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Analysis of the program:

• The “Equate" directive EQU informs the assembler about the value of SUM.
• The first ORIGIN directive tells the assembler about the starting address of
memory area to place the data block. The location specified in this case is 204.
• The DATAWORD directive tells the assembler to load a value n (100) into the
location 204.
• Any statement that makes instructions or data being placed in a memory location
may be given a label. The label is assigned a value equal to the address of that
location. Since the DATAWORD statement is given the label N, the name N is
assigned the value 204. Whenever N is encountered in the program, it will be
replaced with this value.
• Since there are 100 numbers to be added and each number requires 4-byte space,
total of 400 locations are required to place the operands.
• The RESERVE directive informs that a memory block of 400 bytes is to be
reserved for data. It also tells that variable NUM1 is to be associated with value
208, which is the address of the first operand in memory.
• The RESERVE directive will not load the data in the locations.
• The second ORIGIN directive specifies that the instructions of the object
program are to be loaded in memory starting at address 100.
• When the source program is entered, the first instruction MOVE N, R1 will be
placed at address 100 and next instructions in subsequent locations
• The END directive informs the assembler that this is the end of source code
whose execution has begun at label START.
• The RETURN statement identifies a point where the execution of the program
should be terminated. It causes the assembler to insert appropriate machine
instruction that returns control to the operating system of the computer.

2.3 Input-Output Operations

When I/O devices are to be accessed, they need to be addressed. There are two ways
of doing this.
(i) Memory mapped I/O:
In this case, the I/O device is also considered as memory and the memory addresses
are used to refer to the buffers and registers of the I/O device. The total address space
of the computer is divided between memory and I/O device. Data transfer takes place
through the use of normal instructions like Move, Load etc., and no special instructions
are needed to access the contents of the devices buffer registers.
 Since the number of I/O devices connected are less, allocating large space is a
wastage of memory.
 Also, there may be conflict between I/O and memory if the correct addresses are
not specified. So, this method is not generally used to address I/O devices.
(ii) I/O mapped I/O or Standard I/O or Isolated I/O:
➢ In this case, the input/output devices are considered as different entities.
➢ We have separate address space for memory and I/O.
➢ Also special instructions like IN and OUT are used to access I/O devices
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➢ General instructions like MOVE cannot be used for I/O data transfer.
➢ The address space is not shared between I/O and memory. Hence, there is no
conflict between I/O access and memory access.

There are basically three methods to interface I/O devices:

(a) Program-controlled I/O
(b) Interrupt I/O and
(c) Direct Memory Access (DMA) or Hardware controlled I/O.

2.3.1 Program-Controlled I/O

In this method, the operations are processor initiated. i.e., processor checks the device
status, accesses it and performs the operations using instructions. Hence the name.

The keyboard needs a buffer register to store the code of the key pressed. Similarly the
display unit is required to store the character sent from the processor. These registers
are called DATAIN and DATAOUT, respectively.
When I/O devices are connected to the processor, there will be speed mismatch and
mechanisms are needed to synchronize data transfer between them.

Our task is to read a character from keyboard and display it on the screen.

One solution to the problem is to use Program Controlled I/O technique.

➢ On the input side, processor waits for user to key-in a character and its
availability is indicated to the processor using a status flag called FIN.
➢ On the output side, the processors sends the first character to the display unit and
waits for a signal. The display sends the signal that the character has been
received using a status flag called FOUT.

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Operation:
The operation of reading a character from the keyboard and displaying it on the output
screen can now be formally stated as below:

→→ Write a program to monitor the status of FIN. When FIN is 1, a valid character is
present in DATAIN register and processor can read this register. When the character
is transferred to the processor register, say R1, FIN is automatically cleared to 0. If a
second character is entered, FIN is again set to 1 and the process repeats. Thus, FIN =
0 is the condition when processor waits and when FIN = 1, it can read the data.
This operation can be written as,
READWAIT Branch to READWAIT if FIN = 0
Input from DATAIN to R1

→→ Write a program code to monitor FOUT flag. If FOUT is 1, display is ready to

receive a character and hence transfer a character from the processor register R1 to
DATAOUT buffer register of the output device. This transfer automatically clears
FOUT to 0. When the device is ready to receive another character, it sets FOUT to 1.
Now, the processor can send the next character. In this case also, processor is in a
waiting loop when FOUT = 0.

This operation can be written as,

WRITEWAIT Branch to WRITEWAIT if FOUT = 0
Output from R1 to DATAOUT

→→ The data buffer registers DATAIN and DATAOUT and the corresponding status
flags FIN and FOUT form part of a circuitry known as device interface.

→→ The two buffer registers DATAIN and DATAOUT can be accessed as if they are
two memory locations. The status flags FIN and FOUT are made a part of device status
register called STATUS, by assigning bit position to them as shown:

→→ The I/O operation can be written more syntactically as below:

(i) Read (input) operation

RWAIT Testbit #0, STATUS
Branch = 0 RWAIT
MoveByte DATAIN, R1

(ii) Write (output) operation

WWAIT Testbit #1, STATUS
Branch = 0 WWAIT
MoveByte Rl, DATAOUT
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The Testbit instruction tests the state of the specified bit in the destination specified
i.e., STATUS register. If the bit tested is equal to 0, then the branch condition is true
and a branch is made to the beginning of the wait loop. When the testbit is 1, data is
read from the input buffer or written into the output buffer

Example 2.5 Write a program to read a line of text from keyboard and display it.
Solution: The characters are read one by one,stored in memory and then sent (echoed)
to the display. The program checks whether the character keyed in is a carriage return
(CR) key. If not, it proceeds to read the next character. If yes, the program terminates.
The characters are stored in memory starting from address labelled LOC. Register R0
is used to point to the memory and is initially loaded with the address LOC. R0 is
incremented for each character using auto increment addressing mode. The program
structure is shown in Fig. 12.

Fig.12 Program to read a line of text from keyboard and display on the screen

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2.4 Stack Structure

➢ A `stack' is a small area in the Read-Write memory of a computer used to store data
elements.
➢ The main feature of the stack is that, the elements can be added or removed at one
end only and the other end is fixed. The open end is called the top-of-the stack
(TOS), and the fixed end is the bottom.
➢ The stack is known as a pushdown structure. The stack is also called a last-in-first-
out (LIFO) structure. i.e., the last item placed on the stack is the first one removed
when the retrieval begins.
➢ We use the term push and pop to denote the operations of placing a new item on the
stack and removing that item from the stack respectively.

Fig. 13 shows a stack structure in memory.

▪ Initially, data is placed at a location just above the highest address location,
BOTTOM.
▪ When new elements are pushed into the stack, they are placed in successively lower
address locations. Thus, the stack grows in the direction of decreasing memory
addresses.
▪ The processor contains a special register called stack pointer (SP), to keep track of
the address of the current top-of-stack element. Stack pointer always holds the
address of current top-of-stack (TOS) element.

Fig.13 Example of Stack memory

2.4.1 Stack Operations:

There are two operations on stack: PUSH and POP
a) Writing into stack: PUSH operation

SP is decremented first and then data is stored.

Subtract #4, SP
Move NUM, (SP)
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b) Reading from stack: (Retrieval) POP operation

Data is taken out from current TOS and then SP is incremented
Move (SP), SUM
Add #4, SP

Fig.14 Illustration of Push and Pop operations on Stack

Note: pop operation will not remove the element from the top of stack. Instead, TOS
element is copied into the destination location

2.4.2 Stack Errors:

Two cases:
i) we must avoid putting a new item into the stack when stack is full.
ii) we must not try to pop an item from an empty stack.

Fig.15 Safe Push and Safe Pop operations

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2.4.3 Applications of stack

➢ Stacks can be used by the processor or by the user.
➢ User can save register contents on the stack so that the registers can be used for
other operations. When original values are required, they are popped off the
stack.
➢ In order to have a proper linkage between a main program and a subroutine,
stack is used by the processor to save register contents.
➢ Stack can be used during interrupt operations as well.

2.4.4 Queues:
·· This is a data structure similar to stack which can be used to hold data items.

▪ The queue is a First-in-First-out (FIFO) structure. Thus, a queue has two ends:
one entry end and one exit end.
▪ New data are added at the back or tail (high-address) end and retrieved from the
front or head (low-address) end of the queue.
▪ It is like a pipeline where items can be entered from one end and removed from
the other end.

2.5 Subroutines
Any programming task involves execution of a small set of instructions many times.
Such a subtask, consisting of a set of instructions, which is executed many times
(repeated) is called a subroutine.
• Only one copy of the subroutine is placed in memory (saves memory space) and
any program that requires the subroutine, will branch to the starting location of
the subroutine for fetching the first instruction.
• When a program branches to a subroutine, we say that it is calling the subroutine
and this branching is done with a Call instruction.
• Once the subroutine task is over, the calling program must resume execution
starting from the instruction immediately following the Call instruction. i.e.,
control is to be transferred (returned) back to the calling program. This is done
by executing a Return instruction at the end of the Subroutine.

When the Call instruction is being executed, PC contents were automatically

incremented to hold the address of the next instruction. The Return statement in the
subroutine should transfer control to this address for the calling program to resume its
execution. Hence this address called return address must be saved before branching to
the subroutine.
The mechanism that makes it possible to transfer control between calling
program and subroutine is referred to as subroutine linkage. This can be done by saving
the return address in a register dedicated for this purpose. Such a register is called the
link register.

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Fig.16 Illustration of Subroutine Linkage using Link register

The Call instruction performs the following operations:

·· Stores the contents of PC in the link register.
·· Branch to the target address (starting address of the subroutine) given in the
instruction.
∴ CALL ⇒ Push PC + Branch
The Return instruction does the following operations.
·· Loads PC with the contents of link register and branch to that address.
∴ Return ⇒ pop PC + Branch
Both Call and Return instructions are special type of unconditional branch instructions.

Instead of LINK register, the processor stack is used to store the return address when
the Call instruction is executed. When Return instruction is executed, the return address
is popped from the stack and placed into PC.

Fig.17 Stack Memory Map after subroutine Call and Return

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2.5.1 Subroutine Nesting

In many programming problems, it may be necessary to call a subroutine from another
subroutine. This is called subroutine nesting.

Fig.18 Subroutine Nesting

The main program calls subroutine named FACT. While executing this, subroutine
FACT calls another subroutine named MULT.
In this case, more return addresses have to be stored. If we use a single link register,
the previous value will be lost. Also, we need more number of Link registers. `stack'
is the preferred solution for subroutine linkages

2.5.2 Parameter Passing

▪ A subroutine is used to perform a subtask that is required by the main program.
Thus, when calling a subroutine, a program must provide the “parameters"
(arguments) such as register data, operands or their addresses to the subroutine
that are required for the computation.
▪ Once the subroutine is executed, the results of the computation may be returned
to the calling program, if required.
▪ This exchange of information between a calling program and a subroutine is
called `parameter passing'. Parameter passing can be done in three ways.
➢ ·· Through registers of the processor
➢ ·· Through main memory locations
➢ ·· Through processor stack
Example 1: Illustrate parameter passing through registers with an example
We consider the example of addition of `n' numbers.
• The parameters to be passed to the subroutine are register contents.
• The subroutine computes the sum and returns it back to the calling program. The
size of the array (n) is stored in memory location N.
• Numbers are stored in memory starting from NUM1 onwards.
• Result is stored at location SUM.
• R2 register is used as a pointer to access the operands.
• R1 holds the count n Register R0 is used for addition operation.

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Fig.19 Parameter Passing using Registers

Example: Illustrate parameter passing using stack.

Solution: When many parameters are involved, using the registers of the processor is
not a feasible solution for passing arguments. The other alternative is to use stack which
can handle a large number of parameters.

We illustrate the program of adding ‘n’ numbers using stack. See Fig 20a)
• The parameter passed to this subroutine are the address of the first number in the
list and the size of the list. The subroutine performs the addition and returns the
computed sum.
• The stack structure is shown in Fig 20b). Before the subroutine is called, the SP
is at level 1. The calling program saves the address NUM1 and the value `n' into
the stack and calls the subroutine ARRAYADD. The “call" instruction pushes
the return address onto the stack. Now, SP is at level 2.

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Fig.20 Parameter Passing using Stack

➢ Before doing any operation, the contents of three registers, R0, R1 and R2 are
saved on the stack at the beginning of the subroutine. This is done using a Move-
multiple; instruction. Now, the top of the stack is at level3. That is SP is pointing
to level3.
➢ The Subroutine accesses the parameters `n' and NUM1 from the stack using
indexed addressing. Indexed addressing will not change the value of SP. So, SP
remains at leve1 3.
➢ The original register contents are restored back into the respective registers. Now
the top-of-stack is at level 2.
➢ A Return instruction executed at the end of the Subroutine, takes this return
address and causes PC to branch to the calling program. Now, SP is pointing to
the location containing count n.

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➢ The calling program stores the result in location SUM and top-of-stack is
restored to its original value by adding a constant 8 to SP. Now, SP is again at
level 1.

The program shows two methods of passing parameters. When actual operands or
entities are sent, it is called Call-by-value. For example, entity `n' is passed by value.
When the calling program passes the address of the variable instead of the variable
itself, it is called Call-by-reference. For example, we have passed NUM1 to the
subroutine which is the address of the first entry in the list.

2.6 Additional Instructions

2.6.1 Logic Instructions
The basic logic operations are: AND, OR, NOT and XOR using logic gates.

• Not dst
NOT operation provides the 1's-complement of the operand specified in dst. The dst
may be a processor register or a memory location.

Ex: Let R0 be a 8-bit register having a value 89.

i.e., R0 = 89 = 10001001 (using BCD format).

Then Not R0 will change all 0s to 1s and vice-versa.

∴ New value of R0 = 01110110

To get 2's-complement of the operand, we use Negate instruction.

Let R0 = 10001001
Negate R0 instruction is executed.
New value of R0=0111011
This operation can be done by using two instructions such as
Not R0
Add #1, R0; 2's complement = 1's complement + 1

Similarly, the AND, OR and XOR operations are performed on two operands using
each pair of bits in the corresponding position. Ex: AND R1, R2

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Example:
Consider that register R0 (32-bit) has four ASCII characters.
➢ We want to check whether the right most character is A.
➢ The ASCII code for A is 01000001 which is expressed in hexadecimal notation
as 41H.
➢ We need to mask the upper 3 bytes of the register R0 content leaving the lowest
byte as it is.
➢ Now, a compare instruction is to be used to check whether this byte is character
`A' or not. The instruction sequence is given below.

And #$000000FF, R0
Compare #$00000041, R0
Branch = 0 CHAR_FOUND

ASCII Table

Fig.21 ASCII Table

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COMPUTER ORGANIZATION AND ARCHITECTURE BEC306C MODULE-2

2.6.2 Shift and Rotate Instructions

For general operands, logical shift is used. For a signed number, arithmetic shift is used
which preserves the sign of the number.
There are many applications which require shifting or rotation of the numbers or
characters. Ex: Scrolling display

2.6.2.1 Logical Shifts

We have two logical shift instructions:
➢ LshiftL for shifting left and LshiftR for shifting right.
➢ These instructions shift an operand by number of bit positions specified in the
instruction. The general form of a logical left shift instruction is,
o LshiftL count, dst
➢ The count may be given as immediate operand or it may be given in a processor
register.
➢ When the bits are shifted left, the rightmost bits are filled with zeros. The bits
shifted out from msb position are passed through carry flag, C, and are lost. The
last bit shifted will be in carry flag.
➢ The destination, dst, is usually a processor register.
The general format of a logical right shift instruction is,
LshiftR count, dst
the leftmost position are filled with zeros when bits are shifted right The bits shifted
out from msb position are passed through carry flag and are lost.

Applications of Shift instructions

➢ Multiplication and Division
➢ Packing and Unpacking

Compiled by: Prof. Krishnananda L, HoD, Department of ECE, GEC Mosalehosahalli, Hassan 22
COMPUTER ORGANIZATION AND ARCHITECTURE BEC306C MODULE-2

Ex: Illustrate the use of shift and logic operations for packing of decimal digits.

Solution:
➢ Let ASCII codes for decimal digits are stored in memory locations LOC and
LOC+1. The result is stored at location RESULT. The result is known as packed-
BCD format.
➢ We see that each character or digit is coded using 7-bits ASCII code. For ex,
digit 9 is represented as ASCII value 39 (0111001)
➢ The rightmost 4 bits of the ASCII code for a decimal digit corresponds to the
BCD code for the digit.
➢ Now, our task is to extract the lower 4-bits (nibble) in each of the data stored at
location LOC and LOC + 1. Then, these two nibbles should be concatenated as
a single byte and stored at location RESULT.

Fig. shows the instruction sequence for this operation.

Register R0 is used as a pointer to the ASCII characters in memory.
Registers R1 and R2 are used to find the BCD codes for the digits.
The And instruction is used to mask the higher 4-bits of the value in R2.

2.6.2.3 Arithmetic Shifts

Arithmetic shift instructions are to be used when binary numbers are represented in
signed 2's-complement format.

The arithmetic left shift instruction has the format

AshiftL count, dst
In this case, the sign bit (msb) is preserved. The bit next to the sign bit on the right side
is shifted out into the carry bit as shown in Fig.
·· The general format of an arithmetic right-shift instruction is,
AshiftR count, dst

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COMPUTER ORGANIZATION AND ARCHITECTURE BEC306C MODULE-2

In this case, the sign bit is repeated into the bit towards its right and it is also put back
into the same position. Zeros are not inserted at the leftmost position as in logical right
shift.
An example is shown in Fig.

2.6.2.4 Rotate Instructions

The bits shifted out of the operand are lost when we use shift instructions. So, to
preserve the bits, “rotate” instructions are used.

• Rotate instructions shift the bits of the operand either towards left or right.
• The rotation may or may not include the carry flag C.
• Fig. shows all the four possible cases of rotate instructions.

2.6.2.5 Multiplication and Division Operations

Similar to addition and subtraction instructions.
For example, the instruction,
Multiply Ri, Rj
performs the operation Rj ← [Ri] × [Rj]

When two n-bit numbers are multiplied, the product can be as large as `2n' bits.
Compiled by: Prof. Krishnananda L, HoD, Department of ECE, GEC Mosalehosahalli, Hassan 24
COMPUTER ORGANIZATION AND ARCHITECTURE BEC306C MODULE-2

So, the product cannot be stored in register Rj. Hence, many processors accommodate
the product in two registers by placing high-order and low-order n-bits in two registers.

The integer division operation has the syntax

Divide Ri, Rj
which performs the operation Rj ← [Rj]/[Ri]
where Rj has the quotient. The remainder may be placed in any other register.

Example: Write a program to compute the dot product of two vectors A and B.
Solution: Consider two vectors A and B each of length n. The dot product between A
and B is
defined as,

Compiled by: Prof. Krishnananda L, HoD, Department of ECE, GEC Mosalehosahalli, Hassan 25