Class notes : APE

DC-DC CONVERTER Lect:3 (Boost Converter)

The Circuit configuration of step up (boost) converter is shown in Fig.1. This converter is use to
increase the DC voltage level. In this project two boost converters are used.

L Diode

Vin SWITCH C R

Fig.1 Circuit diagram of Boost converter

Basic principle of operation:

Similar to buck converter, this converter also operates in two modes.

Mode 1: when switch is ‘ON’. Inductor starts to store energy and hence current rises through
inductor. Load is short circuited through switch and thus output voltage reaches to zero.

Voltage across inductor:

VL  Vin

Now inductor voltage during DTs interval:

I max  I min
L  Vin
DTs  0

Vin
I L  DTs (1)
L
Inductor current increase linearly during this period.

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 On Time Off Time
Gate pulse (1-D)Ts
for switch
DTs Ts tt
Vin

Vin
VL
(Vin-Vo)
t

IL
t
ID

Fig. 2 Boost converter: switching pulses, voltage and current waveforms

Mode 2: when switch is ‘OFF’. During this interval, inductor current cannot die down
instantaneously. Inductor starts to discharge and hence change its polarity. As the polarity of
induce emf is reversed and diode is forward biased. Now, inductor voltage

VL  Vin  V0

So similar to above analysis, inductor current during (1-D)Ts interval:

Vin  V0
I L  (1  D)Ts
L (2)

During a steady state both (1) and (2) must be equal and hence equating:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 Vin  V0 V
I L  (1  D)Ts  in DTs
L L
Vin
V0 
1 D

(Considering the system to be loss less, the output voltage can be derived as:

Ts Ts 1
Vo  Vin  Vin  Vin
TOFF Ts  Tin 1 d (3)

And hence

Vin  (1  d )Vo (4)

Design of Boost Converter (Selection of ‘L’ and ‘C’ )

The relationship between the input voltage 𝑉𝑖𝑛 and the output voltage 𝑉𝑜.

In case of Boost converter, when switch is ON, Voltage across inductor:

VL  Vin

Now inductor voltage during DTs interval:

I max  I min
L  Vin
DTs  0

Vin
I L  DTs
L (1)

When switch is OFF, inductor voltage

VL  Vin  V0

So similar to above analysis, inductor current during (1-D)Ts interval:

Vin  V0
I L  (1  D)Ts
L (2)

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
During a steady state both (1) and (2) must be equal and hence equating:

Vin  V0 V
I L  (1  D)Ts  in DTs
L L
Vin
V0 
1 D
The ripple content in the inductor current waveform and ripple content in the output
voltage.

The ripple content can be obtained from ON or OFF both the intervals by utilizing equation:

di
VL  L
dt
For ON interval dt=DTs, current changing from Imin to Imax and consider as ΔI

So,

I max  I min V
L  Vin and hence I L  in DTs
DTs  0 L

Vin
L DTs
I L (3)

For capacitor

dv
ic  c
dt
DTs DTs
so, for the on duration c  ic and hence c  I 0
V0 V0

So capacitor can be designed using following formula:

V0 DTs
c
R V0 (4)

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 On Time Off Time
Gate pulse (1-D)Ts
for switch
DTs Ts tt
Vin

Vin
VL
(Vin-Vo)
t

IL
t
ID

Fig.10 Boost Converter waveforms [2]

Example: Determine the inductor size (𝐿) and capacitor size (𝐶) for continuous conduction
operation mode of the converter that limits the inductor current ripple to 20% and
the capacitor voltage ripple content to
4%:

V0  36 V and R =10 ohm so I =36/10=3.6 Amp.

0 0 avg

Inductor current (input current)=3.6/(1-D)=3.6/(1-0.66)=10.58Amp

Now ΔIL=10.58*0.2=2.11 Amp (20% is given)

From equation (3):

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 Vin 12 1
L DTs  0.66   30.58uH
I L 2.16 120000

Similarly, from equation (4):

V0 DTs 36 0.667
c   13.87uF
R V0 10 1.44  120000

Determine the boundary load value of 𝑅𝑜

Avg. value of Load current

V0 avg
I o avg 
R
Input and output current relation is:

I 0 avg
I s avg 
(1  D)

So,

V0 avg Vin
I s avg  
R(1  D) R(1  D) 2

Now this average input source current should greater than the half of the ripple value to operate
converter in continuous mode, So,

Vin I
I s avg   L
R(1  D) 2
2

Vin V
 in DTs
R(1  D) 2
2L

2L
R
(1  D) 2 DTs

This is the critical values of Resistance for boundary condition.

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 DC-DC CONVERTER Lect:4 (Buck-boost Converter)
The Circuit configuration of buck-boost converter is shown in Fig.1. The output voltage of the
buck-boost converter can be either higher or lower than the input voltage.

Diode
_
SWITCH

Vin C R Vo
L

Fig.1 Circuit diagram of Buck-boost converter

Basic principle of operation:

Mode 1: when switch is ‘ON’. Inductor starts to store energy and hence current rises
through inductor. Voltage across inductor:

VL  Vin

Now inductor voltage during DTs interval:

I max  I min
L  Vin
DTs  0

Vin
I L  DTs (1)
L
The rate of change of inductor current is a constant, indicating a linearly increasing inductor
current. The capacitor is large enough to maintain constant output voltage.

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 On Time Off Time
Gate pulse (1-D)Ts
for switch
DTs Ts t
Vin

Vin
VL
(-Vo)
t

IL
t
ID
t

ISwitch
t

VSwitch Vin+Vo
t

Fig. 2 Buck-boost converter: switching pulses, voltage and current waveforms

Mode 2: when switch is ‘OFF’. During this interval, inductor current cannot die down
instantaneously. Inductor starts to discharge and hence change its polarity. As the polarity of
induce emf is reversed and diode is forward biased. Now, inductor voltage

VL  V0

So similar to above analysis, inductor current during (1-D)Ts interval:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 V0
I L  (1  D)Ts (2)
L
During a steady state both (1) and (2) must be equal and hence equating:

V0 V
I L  (1  D)Ts  in DTs
L L
D
V0  Vin
1 D
Equation shows that the output voltage has opposite polarity from the source voltage. Output
voltage magnitude of the buck-boost converter can be less than that of the source or greater than
the source, depending on the duty ratio of the switch. If D > 0.5, the output voltage is larger than
the input; and if D < 0.5, the output is smaller than the input. Therefore, this circuit combines the
capabilities of the buck and boost converters. Polarity reversal on the output may be a
disadvantage in some applications

Compare buck, boost and buck-boost converter with reference to technical parameters.

Topology selection criterion:

Criterion Buck Boost Buck-Boost

Switch (Voltage) Vin Vo (Vin+Vo)
Switch (Current) Io Iin (Iin+Io)
Switch (Irms) √ Io √ Iin √ (Iin+Io)
Switch (Iavg) D Io D Iin D(Iin+Io)
Diode (Iavg) (1-D) Io (1-D) Iin (1-D) (Iin+Io)
IL Io Iin (Iin+Io)
Effect of L on C Significant Little Little
Pulsating Current input output both

DC-DC CONVERTER Lect:6

Forward Converter:
The forward converter, shown in Fig. 1, is another magnetically coupled dc-dc converter.
The switching period is Ts, the switch is closed for time DTs and open for (1 - D)Ts. Steady-

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
state operation is assumed for the analysis of the circuit, μr= finite (magnetizing current is finite),
and the current in inductance L is assumed to be continuous.

i3

i1
i2 D1 VL
+
+

Lm V2 Vo
V1 D2 C R
Vd
N1 N2
N3 _

S
D3
_

Fig.1 Forward Converter

Principle of operation:
The converter operates at high frequency and avoids the core saturation. This circuit is
operates in two modes of operation.

Mode 1: when switch ‘S’ is close (0 < t < ton):

N1 : N2 D1 VL  All dot become positive

+
+ Diode D1 is forward bias and Diode
Lm
V1 V2 D2 C R Vo D3 and D2 are reversed biased. Im
Vd
N1
N3
N2
_
increase linearly and i1 also increases
S linearly. Voltage induce in tertiary
D3
_ N3
winding Vd
N1

 N3 
Volt appear across D3 is Vd 1  
 N1 

N2
Volt appear across D2 is Vd
N1
– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
Mode 2: when switch ‘S’ is Open (ton < t < Ts):

N1 : N2 D1 VL d
+ D3 start conducting because is
+ dt

Vd
Lm
V1 V2 D2 C R Vo
.
negative. all ‘ ’ become negative.
N1 N2
N3 _
Voltage across primary winding
S
D3
N1 N1
V1   Vd and i3  im
_
N3 N3

Forward converter preferably operates in discontinuous mode (i.e., flux in the core should be
zero, completely reset the core)

Vd DT
 d 
N1

At, t=tm (=time when flux reaches zero see Fig.2)

Vd N
 d  tm ; increment and decrement of the flux should remain same so, tm  3 DT
N3 N1

For discontinuous mode: tm  (1  D)T

D must be limited to Dmax such that

tm  (1  D)T

N3 N3
DT  (1  D)T and hence N DmaxT  (1  Dmax )T
N1 1

1 1
Dmax  Dmax  if N3  N1
N3 2
1
N1

If D>0.5 in above case, then im will not become zero, core will saturate. So we should keep
D<0.5.
– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 Off Time
On Time (1-D)Ts
Switching
Pulses
DTs Ts t

Vd
V1
(-Vo)
t

Im
t
tm

Fig.2 Magnetizing current and voltage across the primary

Off Time
On Time (1-D)Ts
Gate pulse
for switch
DTs Ts t
(Vd N2/N1)-Vo

VL
(-Vo)
t

IL
t

ID
t

ISwitch
t

Fig. 3 Forward converter waveforms

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 DC-DC CONVERTER Lect:7

Push-Pull Converter:
Fly back and forward converter opertes in 1st quadrant and discontinuous mode only. The
circuit configuration of Push-pull converter is shown in Fig. 1. Anti-parallel diode shown dotted
are needed to provide a path for the current due to leakage flux of the transformer. Here
bidirectional core excitation, so core utilization is improved. The switching pulses are deveoped
such that:

For t=0 to t=DT/2 ; T1 is on and T2 is off

For t=DT/2 to T/2; T1 and T2 both are off (Δ interval)

For t=T/2 to t=(1+D)T/2; T1 is off and T2 is on

For t=(1+D)T/2 to T ; T1 and T2 both are off (Δ interval)

D1 VL
+ +
+
C R Vo
Voi
N1 N2
_
_
Vd
N1 N2

T1 T2
D2

Fig.1 Push-pull Converter

Principle of operation:
When switch ‘T1’ is ‘ON’ (0 < t < DT/2) and T2 is ‘OFF’:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 D1 VL All dot become positive,
+ +
+ Primary winding is excited with
_
C R Vo
Voi polarity as shown. Diode D1 is
N1 N2
_
+ _ forward biased. Voltage across
Vd
N1 N2 inductor is :
N2
T1 T2 VL  Vd  Vo (1)
D2 N1
_

Voltage across the switch (T2) => VT 2  2Vd

N2
Voltage across the diode (D2) => VD 2  2Vd
N1

When both the switches are off (Δ interval):

D1 VL Energy stored in the inductor

+
+ + causes the current to flow in the
_
C R Vo
secondary winding through both the
Voi
N1 N2 1
+
_
_ diodes. iD1  iD 2   iL
Vd
2
N1 N2
Voltage across secondary winding
T2
VL  VO
T1
D2
_

When switch ‘T2’ is ‘ON’ (T/2 < t < (1+D)T/2) and T1 is ‘OFF’:

Here core excitation is reverse. All dot become negative. Diode D2 is forward biased. All other
states such as Voltage across the inductor, output voltage etc. remains same such as when T1 is
ON and T2 is off.

When both the switches are off (Δ interval):

Similar state as discussed earlier.

Now, for the inductor case volt-sec balance:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 N2 1  1  Vo N
 Vd  Vo  ton  Vo  T  DT  => 2 2 D
 N1 2  2  Vd N1

T1 and T2 Off Time

Δ interval T1 and T2 Off Time
Δ interval
T1 On Time

DTs/2 Ts/2 Ts t

T2 On Time

t
Vd N2/N1-V0

VL
(-Vo)
t

IL
t

iD1
t

iD2
t

Fig. 2 Push-Pull converter waveforms

Limitations: Required identical turns (N1=N2) to symmetrical flux distribution

Small blinking time (must) to avoid turning both the switch on simultaneously.

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 DC-DC CONVERTER Lect:8
Half-bridge Converter:
The circuit configuration of half-bridge converter is shown in Fig. 1. The operation of
half-bridge converter is similar to push-pull converter. Anti-parallel diodes shown dotted are
needed to provide a path for the current due to leakage flux of the transformer. Here bidirectional
core excitation, so core utilization is improved. The switching pulses are developed such that:

For t=0 to t=DT/2 ; T1 is on and T2 is off

For t=DT/2 to T/2; T1 and T2 both are off (Δ interval)

For t=T/2 to t=(1+D)T/2; T1 is off and T2 is on

For t=(1+D)T/2 to T ; T1 and T2 both are off (Δ interval)

D1 VL
+ +
+
C R Vo
Vd /2 Voi
N2
_
T1 _
Vd N1
N2

Vd /2
T2
D2

Fig.1 Half-bridge DC-DC Converter

Principle of operation:
When switch ‘T1’ is ‘ON’ (0 < t < DT/2) and T2 is ‘OFF’:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 All dot become positive, Primary
D1 VL
+ + winding is excited with polarity
+

Vd /2 Voi C R Vo as shown. Diode D1 is forward

N2
_ biased. Voltage across inductor is
T1 _
Vd N1
N 2 Vd
N2 VL   Vo (1)
N1 2
Vd /2
T2
D2
_

Voltage across the switch (T2) => VT 2  Vd

N2
Voltage across the diode (D2) => VD 2  Vd
N1

When both the switches are off (Δ interval):

D1 VL Energy stored in the inductor

+ + + causes the current to flow in the
R
secondary winding through both
Voi C Vo
Vd /2 N2 1
_ the diodes. iD1  iD 2   iL
_ 2
T1
Vd N1
N2
Voltage across secondary
winding
Vd /2
T2
D2
VL  VO
_

When switch ‘T2’ is ‘ON’ (T/2 < t < (1+D)T/2) and T1 is ‘OFF’:

Here core excitation is reverse. All dot become negative. Diode D2 is forward biased. All other
states such as Voltage across the inductor, output voltage etc. remains same such as when T1 is
ON and T2 is off.

When both the switches are off (Δ interval):

Similar state as discussed earlier.

Now, for the inductor case volt-sec balance:

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 N 2 Vd  1  Vo N 2
  Vo  DT  Vo   DT   0 =>  D
 N1 2  2  Vd N1

T1 and T2 Off Time

Δ interval T1 and T2 Off Time
Δ interval
T1 On Time

DTs/2 Ts/2 Ts t

T2 On Time

t
(Vd/2 N2/N1 )-V0

VL
(-Vo)
t

IL
t

iD1
t

iD2
t

Fig. 2 Half-Bridge converter waveforms

Limitations: Required identical turns (N1=N2) to symmetrical flux distribution

Small blinking time (must) to avoid turning both the switch on simultaneously

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
Full-bridge Converter:

The circuit configuration of ful-bridge converter is shown in Fig. 1. The operation of full-
bridge converter is similar to push-pull converter. Anti-parallel diodes shown dotted are needed
to provide a path for the current due to leakage flux of the transformer. Here bidirectional core
excitation, so core utilization is improved.

+ D1 VL

+ +
T1 T3
C R Vo
Voi
N2
_
_
Vd N1
N2

T4 T2
D2

Fig.1 Full-bridge DC-DC Converter

Principle of operation:

When both the switch ‘T1’ and ‘T2’ are ‘ON’ (0 < t < DT/2) :

All dot become positive,

+ D1 VL
+
Primary winding is
+
T1 T3 excited with polarity as
C R Vo
N2
Voi shown. Diode D1 is
_
_
forward biased. Voltage
Vd N1 across inductor is
N2
N2
Voi  Vd
T4 T2 N1
(1)
N
_
VL  2 Vd  Vo
N1

Voltage across the switch (T3 and T4) => VT 3  VT 4  Vd

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
When all four switches are off (Δ interval):

+ D1 VL Energy stored in the

+ + inductor causes the current
T1 T3
C R Vo
to flow in the secondary
Voi
N2 winding through both the
_
_
1
Vd N1 diodes. iD1  iD 2   iL
N2 2
Voltage across secondary
T4 T2
D2 winding
_
Voi  0
VL  VO

When switch ‘T3’ and ‘T4’ are ‘ON’ (T/2 < t < (1+D)T/2):

Here core excitation is reverse. All dot become negative. Diode D2 is forward biased. All other
states such as Voltage across the inductor, output voltage etc. remains same such as when T1 is
ON and T2 is off.

When both the switches are off (Δ interval):

Similar state as discussed earlier.

Now, for the inductor case volt-sec balance:

 N2  1  Vo N
 Vd  Vo  DT  Vo   DT   0 => 2 2 D
 N1  2  Vd N1

 N2   N2 
For the same input and output voltage:    2  
 N1  Half  Bridge  N1  full  Bridge

Neglecting magnetizing current:  I switch  Half  Bridge  2  I switch  full  Bridge

Therefore, large power rating it is advantageous to use full-bridge converter

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 T1 and T2 Off Time
Δ interval T1 and T2 Off Time
Δ interval
T1 On Time

DTs/2 Ts/2 Ts t

T2 On Time

t
(Vd N2/N1 )-V0

VL
(-Vo)
t

IL
t

iD1
t

iD2
t

Fig. 2 Full-Bridge converter waveforms

Resonant Converter Lect

Class-E Resonant Converter:

The circuit configuration of Class-E resonant converter is shown in Fig. 1. This circuit
consist only one switch and hence low switching losses and high efficiency can be achieved.

 Very popular in low power application (High frequency electronic lamp ballast)
 Normally used for fixed output voltage

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
  Output voltage can be varied by varying switching frequency

Le L C

Ce R
VS
Q1

Fig.1 Class-E Resonant Inverter

Principle of operation:
When switch ‘Q1’ is ‘ON’:

 Input inductor is sufficiently large, hence input to the converter is a dc current source Id.
 iT  id  io
 io is almost sinusoidal, the value of L & C are chosen to have a high quality factor Q≥7
and low damping ration δ≤0.07.

Le id io
L C  when switch is turned off,
because of capacitor Ce
iT voltage across the switch
VS R
builds up slowly. This
Q1
aloowing zero-voltage
turn-off of the switch.
When switch ‘Q1’ is ‘OFF’:

 ic  id  io builds voltage slowly reaches its peak and evantually comeback to zero. at
which instant the switch is turned back ‘ON’

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department
 Le
io
L C  When switch voltage falls to
dVT
zero ic  ce thus switch
dt
Ce voltage tends to be negative.
VS R
To limit this voltage
antiparallel diode is
connected.

Io

Id

Switch Switch t
ON OFF

IT

t
IC

VC

Fig. 2 Waveforms Resonant Converter

 Switching frequency is slightly higher than the resonant frequency.

 Increase in fs, io and vo decreases

– Prepared By: Dr. Shaikh Mo Suhel (PhD, M.Tech, GATE, B.E Electrical)
Associate Professor & Head of Electrical Department