Basic Electronics

Engineering
Laboratory Manual

B.Tech I Year – II Sem R24

BEE Lab. Manual, J B Institute of Engineering & Technology

 J B Institute of Engineering & Technology
B. Tech- Electronics & Communication Engineering

INSTITUTION VISION
To be a centre of excellence in engineering and management education, research
and application of knowledge to benefit society with blend of ethical values and
global perception.

INSTITUTION MISSION
1. To provide world class engineering education, encourage research and
development.
2. To evolve innovative applications of technology and develop entrepreneurship.
3. To mould the students into socially responsible and capable leaders.

DEPARTMENT VISION

To be a guiding force enabling multifarious applications in Electronics and

Communications Engineering, promote innovative research in the latest
technologies to meet societal needs.

DEPARTMENT MISSION
1. To provide and strengthen core competencies among the students through
expert training and industry interaction.
2. To promote advanced designing and modeling skills to sustain technical
development and lifelong learning in ECE.

3. To promote social responsibility and ethical values, within and outside the
department.

PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

1. Practice Technical skills widely in industrial, societal and real time

applications.
2. Engage in the pursuit of higher education, delve into extensive research and
development endeavours, and explore creative and innovative ventures in the
domains of science, engineering, technology.
3. Exhibit professional ethics and moral values and capability of working with
professional skills to contribute towards the need of industry and society.

BEE Lab. Manual, J B Institute of Engineering & Technology

 PROGRAM OUTCOMES (POs) & PROGRAM SPECIFIC OUTCOMES (PSOs)

PO Description
PO1 Engineering Knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the solution of
complex engineering problems.
PO2 Problem Analysis: Identify, formulate, review research literature, and analyze
complex engineering problems reaching substantiated conclusions using first
principles of mathematics, natural sciences, and engineering sciences.
Design / development of Solutions: Design solutions for complex engineering
PO3
problems and design system components or processes that meet the specified
needs with appropriate consideration for the
public health and safety, and the cultural, societal, and environmental
considerations.
Conduct investigations of complex problems: Use research-based knowledge
PO4
and research methods including design of experiments, analysis and
interpretation of data, and synthesis of the information to provide valid
conclusions.
Modern tool usage: Create, select, and apply appropriate techniques, resources,
PO5
and modern engineering and IT tools including prediction and modeling to
complex engineering activities with an understanding of the limitations.
The engineer and Society: Apply reasoning informed by the contextual
PO6
knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional engineering practice.
PO7 Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate
the knowledge of, and need for sustainable development.
PO8 Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice
PO9 Individual and team work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
Communication: Communicate effectively on complex engineering activities
PO10
with the engineering community and with society at large, such as, being able to
comprehend and write effective reports and design documentation, make
effective presentations, and give and receive clear instructions.
Project management and finance: Demonstrate knowledge and understanding
PO11
of the engineering and management principles and apply these to one’s own
work, as a member and leader in a team, to manage projects and in
multidisciplinary environments.
PO12 Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of
technological Change

Program Specific Outcomes

Carry out the Analysis and Design different Analog & Digital circuits with given
PSO1
specifications.
PSO2 Construct and test different communication systems for various applications.

BEE Lab. Manual, J B Institute of Engineering & Technology

AY: 2024-25 J. B. Institute of Engineering and Technology B. Tech EEE
Onwards (UGC Autonomous) I Year-I Sem
Course Basic Electronics Engineering Lab
L T P D
Code: L1121 (Common to AIML, ECE & EEE)
Credits: 2 0 0 4 0

Pre-Requisites:

List of Experiments
1. PN Junction diode characteristics A) Forward bias B) Reverse bias.
2. Study of Rectifier characteristics with & without filters
3. Types of Clippers at different reference voltages
4. Types of Clampers at different reference voltages
5. Input and output characteristics of BJT in CB Configuration
6. Input and output characteristics of BJT in CE Configuration
7. Input and output characteristics of MOS FET in CS Configuration
8. Input and output characteristics of MOS FET in CD Configuration
9. Switching characteristics of a transistor
10. Zener diode characteristics and Zener as voltage Regulator
11. SCR Characteristics.
12. UJT Characteristics and identify negative region
13. Photo diode characteristics
14. Solar cell characteristics
15. LED Characteristics

Course Outcomes
At the end of the course, the student will be able to:

1. Acquire the knowledge of various semiconductor devices and their use in real life.
2. Design aspects of biasing and keep them in active region of the device for functional
circuits
3. Acquire the knowledge about the role of special purpose devices and their applications.

BEE Lab. Manual, J B Institute of Engineering & Technology

 List of Electronic Experiments

1. PN Junction diode characteristics A) Forward bias B) Reverse bias.

2. Study of Rectifier characteristics with & without filters
3. Types of Clippers at different reference voltages
4. Types of Clampers at different reference voltages
5. Input and output characteristics of BJT in CB Configuration
6. Input and output characteristics of BJT in CE Configuration
7. Input and output characteristics of MOS FET in CS Configuration
8. Input and output characteristics of MOS FET in CD Configuration
9. Switching characteristics of a transistor
10. Zener diode characteristics and Zener as voltage Regulator
11. SCR Characteristics.
12. UJT Characteristics and identify negative region
13. Photo diode characteristics
14. Solar cell characteristics
15. LED Characteristics

BEE Lab. Manual, J B Institute of Engineering & Technology

 Basics of BEE Laboratory
and Electronic Symbols
symbols and electronic circuit symbols are used for drawing schematic diagram. The
symbols represent and electronic components.

Table of and Electronic Symbols:

Symbol Component name Meaning

Wire Symbols

Wire Conductor of current

Connected Wires Connected crossing

Not connected Wires Wires are not connected

Switch Symbols and Relay Symbols

SPST Toggle Switch Disconnects current when open

SPDT Toggle Switch Selects between two connections

Pushbutton Switch (N.O) Momentary switch - normally open

Pushbutton Switch (N.C) Momentary switch - normally closed

DIP switch is used for onboard

DIP Switch configuration

SPST Relay Relay open / close connection by an

electromagnet
SPDT Relay

Jumper Close connection by jumper insertion

on pins.

Solder Bridge Solder to close connection

BEE Lab. Manual, J B Institute of Engineering & Technology

 Ground Symbols

Used for zero potential reference and

Earth Ground
shock protection.

Chassis Ground Connected to the chassis of the circuit

Digital / Common Ground

Resistor Symbols

Resistor (IEEE)
Resistor reduces the current flow.
Resistor (IEC)

Potentiometer (IEEE)
Adjustable resistor - has 3 terminals.
Potentiometer (IEC)

Variable Resistor /
Rheostat(IEEE)
Adjustable resistor - has 2 terminals.
Variable Resistor /
Rheostat(IEC)

Capacitor Symbols

Capacitor
Capacitor is used to store electric
charge. It acts as short circuit with
Capacitor AC and open circuit with DC.

Polarized Capacitor Electrolytic capacitor

Polarized Capacitor Electrolytic capacitor

Variable Capacitor Adjustable capacitance

BEE Lab. Manual, J B Institute of Engineering & Technology

 Inductor / Coil Symbols

Inductor Coil / solenoid that generates magnetic field

Iron Core Inductor Includes iron

Variable Inductor

Power Supply Symbols

Voltage Source Generates constant voltage

Current Source Generates constant current.

AC Voltage Source AC voltage source

voltage is generated by mechanical rotation of

Generator
the generator

Battery Cell Generates constant voltage

Battery Generates constant voltage

Generates voltage as a function of voltage or

Controlled Voltage Source
current of other circuit element.

Generates current as a function of voltage or

Controlled Current Source
current of other circuit element.

Meter Symbols

Measures voltage. Has very high resistance.

Voltmeter
Connected in parallel.

Measures electric current. Has near zero

Ammeter
resistance. Connected serially.

Ohmmeter Measures resistance

Wattmeter Measures electric power

BEE Lab. Manual, J B Institute of Engineering & Technology

 Lamp / Light Bulb Symbols

Lamp / light bulb

Lamp / light bulb Generates light when current flows through

Lamp / light bulb

Diode / LED Symbols

Diode allows current flow in one direction

Diode
only (left to right).

Allows current flow in one direction, but also

Zener Diode
can flow in the reverse direction when above
breakdown voltage

Schottky Diode Schottky diode is a diode with low voltage

drop

Varactor / Varicap Diode Variable capacitance diode

Tunnel Diode

Light Emitting Diode (LED) LED emits light when current flows through

Photodiode Photodiode allows current flow when exposed

to light
Transistor Symbols

NPN Bipolar Transistor Allows current flow when high potential at

base (middle)

PNP Bipolar Transistor Allows current flow when low potential at

base (middle)
Made from 2 bipolar transistors. Has total gain
Darlington Transistor
of the product of each gain.

BEE Lab. Manual, J B Institute of Engineering & Technology

 JFET-N Transistor N-channel field effect transistor

JFET-P Transistor P-channel field effect transistor

NMOS Transistor N-channel MOSFET transistor

PMOS Transistor P-channel MOSFET transistor

Misc. Symbols

Motor Electric motor

Transformer Change AC voltage from high to low or low to

high.

Electric bell Rings when activated

Buzzer Produce buzzing sound

Fuse
The fuse disconnects when current above
threshold. Used to protect circuit from high
Fuse currents.

Bus

Bus Contains several wires. Usually for data /

address.

Bus

Optocoupler / Opto-isolator Optocoupler isolates onnection to other board

Loudspeaker Converts signal to sound waves

Microphone Converts sound waves to signal

BEE Lab. Manual, J B Institute of Engineering & Technology

 Operational Amplifier Amplify input signal

Schmitt Trigger Operates with hysteresis to reduce noise.

Analog-to-digital converter (ADC) Converts analog signal to digital numbers

Digital-to-Analog converter (DAC) Converts digital numbers to analog signal

Crystal Oscillator Used to generate precise frequency clock

signal
Antenna Symbols

Antenna / aerial
Transmits & receives radio waves
Antenna / aerial

Dipole Antenna Two wires simple antenna

Logic Gates Symbols

NOT Gate (Inverter) Outputs 1 when input is 0

AND Gate Outputs 1 when both inputs are 1.

NAND Gate Outputs 0 when both inputs are 1. (NOT +

AND)

OR Gate Outputs 1 when any input is 1.

NOR Gate Outputs 0 when any input is 1. (NOT + OR)

XOR Gate Outputs 1 when inputs are different.

(Exclusive OR)

BEE Lab. Manual, J B Institute of Engineering & Technology

 D Flip-Flop Stores one bit of data

Multiplexer / Mux 2 to 1
Connects the output to selected input line.
Multiplexer / Mux 4 to 1

Demultiplexer / Demux 1 to 4 Connects selected output to the input line.

THE OSCILLOSCOPE

Introduction
The oscilloscope is a universal measuring instrument with applications
in physics, biology, chemistry, medicine, and many other scientific and
technological areas. It is used to give a visual representation of voltages. Thus,
any quantity which can be converted to a voltage can be displayed on an
oscilloscope. Although the oscilloscope looks very complicated, once you
familiarize yourself with its controls and functions, it is surprisingly easy to
use. The purpose of this experiment is to develop familiarity with the oscilloscope
and with the types of measurements that can be made with it.

How the Oscilloscope Works

The most important component of the oscilloscope is the cathode ray tube
(CRT), a vacuum tube in which a filament is heated to “boil off” electrons which are
then focused into a beam and “shot” toward the screen with an electron gun. In the

BEE Lab. Manual, J B Institute of Engineering & Technology

photograph above, screen is the rectangular, gridded area on the left of the
oscilloscope.
The screen is coated with fluorescent material which glows when it is hit by
the electron beam. On its way to the screen, the beam passes between two sets of
deflection plates (horizontal and vertical) and a voltage applied to these plates will
cause the beam to curve. The sketch illustrates the CRT components with a negative
voltage applied only to the vertical plates (Vy), causing the beam to bend downward.
The amount of deflection d shown on the screen is proportional to the voltage applied
to the plates, so you can measure a voltage by seeing where the beam hits the
screen.
BREADBOARD

A breadboard is a construction base for prototyping of electronics. The term is

commonly used to refer to solderless breadboard. Because the solderless
breadboard does not require soldering, it is reusable. This makes it easy to use for
creating temporary prototypes and experimenting with circuit design. Older
breadboard types did not have this property. A stripboard (veroboard) and similar
prototyping printed, which are used to build permanent soldered prototypes or one-
offs, cannot easily be reused. A variety of electronic systems may be prototyped by
using breadboards, from small analog and digital circuits to complete central
processing units (CPUs).

Bus and terminal strips

Solderless breadboards are available from several different manufacturers, but most
share a similar layout. The layout of a typical solderless breadboard is made up
from two types of areas, called strips. Strips consist of interconnected terminals.

Bus strips:
Usually Bus strips to provide power to the electronic components. A bus strip
usually contains two columns: one for ground and one for a supply voltage.
However, some breadboards only provide a single-column power distributions bus
strip on each long side. Typically the column intended for a supply voltage is
marked in red, while the column for ground is marked in blue or black. Some
manufacturers connect all terminals in a column. Others just connect groups of, for
example, 25 consecutive terminals in a column. The latter design provides a circuit
designer with some more control over crosstalk (inductively coupled noise) on the
power supply bus. Often the groups in a bus strip are indicated by gaps in the color
marking. Bus strips typically run down one or both sides of a terminal strip or
between terminal strips. On large breadboards additional bus strips can often be
found on the top and bottom of terminal strips.

BEE Lab. Manual, J B Institute of Engineering & Technology

Terminal strips
Terminal strips are the main areas, to hold most of the electronic components. In
the middle of a terminal strip of a breadboard, one typically finds a notch running
in parallel to the long side. The notch is to mark the centerline of the terminal strip
and provides limited airflow (cooling) to DIP ICs straddling the centerline. The clips
on the right and left of the notch are each connected in a radial way; typically
five clips (i.e., beneath five holes) in a row on each side of the notch are ly
connected. The five clip columns on the left of the notch are often marked as A, B,
C, D, and E, while the ones on the right are marked F, G, H, I and J. When a
"skinny" Dual In-line Pin package (DIP) integrated circuit (such as a typical DIP-14
or DIP-16, which have a 0.3 inch separation between the pin rows) is plugged into a
breadboard, the pins of one side of the chip are supposed to go into column E while
the pins of the other side go into column F on the other side of the notch.
Some manufacturers provide separate bus and terminal strips. Others just provide
breadboard blocks which contain both in one block. Often breadboard strips or
blocks of one brand can be clipped together to make a larger breadboard. In a more
robust variant, one or more breadboard strips are mounted on a sheet of metal.
Typically, that backing sheet also holds a number of binding posts. These posts
provide a clean way to connect an external power supply. This type of breadboard
may be slightly easier to handle. Several images in this article show such solderless
breadboards.

Figure:1 Example breadboard drawing. Two bus strips and one terminal strip in one
block. 25 consecutive terminals in a bus strip connected (indicated by gaps in the
red and blue lines). Four binding posts depicted at the left.
A "full size" terminal breadboard strip typically consists of around 56 to 65 rows of
connectors, each row containing the above mentioned two sets of connected clips (A
to E and F to J). Together with bus strips on each side this makes up a typical 784
to 910 tie point solderless breadboard. "Small size" strips typically come with
around 30 rows. Miniature solderless breadboards as small as 17 rows (no bus
strips, 170 tie points) can be found, but these are less well suited for practical use.

BEE Lab. Manual, J B Institute of Engineering & Technology

COLOR BANDS

To distinguish left from right there is a gap between the C and D bands.
band A is first significant figure of component value (left side)
band B is the second significant figure
band C is the decimal multiplier
band D if present, indicates tolerance of value in percent (no band means 20%)
For example, a resistor with bands of yellow, violet, red, and gold will have first digit
4 (yellow in table below), second digit 7 (violet), followed by 2 (red) zeros: 4,700
ohms. Gold signifies that the tolerance is ±5%, so the real resistance could lie
anywhere between 4,465 and 4,935 ohms.
The standard color code:
Temp.
Color Significant figures Multiplier Tolerance
Coefficient (ppm/K)
Black 0 ×100 – 250 U
Brown 1 ×101 ±1% F 100 S
Red 2 ×102 ±2% G 50 R
Orange 3 ×103 – 15 P
Yellow 4 ×104 (±5%) – 25 Q
Green 5 ×105 ±0.5% D 20 Z
Blue 6 ×106 ±0.25% C 10 Z
Violet 7 ×107 ±0.1% B 5 M
±0.05%
Gray 8 ×108 A 1 K
(±10%)
White 9 ×109 – –
Gold – ×10-1 ±5% J –
Silver – ×10-2 ±10% K –
None – – ±20% M –

BEE Lab. Manual, J B Institute of Engineering & Technology

 1. Characteristics of PN Junction Diode
Aim: To draw the Voltage-current characteristics of PN junction diode under
forward and reverse bias condition and to determine cut in voltage, reverse
saturation current and forward dynamic resistance.

Apparatus Required:
NAME RANGE TYPE QUANTITY
REGULATED POWER 1
0 -15 V
SUPPLY (RPS)
0 -20 mA 1
AMMETER
0 -200 µA
VOLTMETER 0 – 20 V 1
DIODE 1N4007 1
100Ω 1
RESISTORS
1KΩ 1
BREAD BOARD 1
CONNECTING WIRES

CIRCUIT DIAGRAM:-
Forward bias

Reverse bias

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Model Waveform

Theory:

The figure shows the physical and schematic circuit symbol of the diode.
The band on the diode and the bar on the left of the circuit symbol represent
the cathode (n-type material) and must be noted. The p-type material (the
anode) in the diode is located to the right. The circuit symbol of the diode is an
arrow showing forward bias, when the p-side is positive with respect to the n-
side, and the direction of the arrow represents the direction of large current
flow.
A p-n junction diode conducts only in one direction. The V-I
characteristics of the diode are curve between voltage across the diode and
current through the diode. When external voltage is zero, circuit is open and
the potential barrier does not allow the current to flow. Therefore, the circuit
current is zero. When P-type (Anode is connected to +ve terminal and n- type
(cathode) is connected to –ve terminal of the supply voltage, is known as
forward bias. The potential barrier is reduced when diode is in the forward
biased condition. At some forward voltage, the potential barrier altogether

BEE Lab. Manual, J B Institute of Engineering & Technology

 eliminated and current starts flowing through the diode and also in the circuit.
The diode is said to be in ON state. The current increases with increasing
forward voltage.
When N-type (cathode) is connected to +ve terminal and P-type (Anode)
is connected –ve terminal of the supply voltage is known as reverse bias and
the potential barrier across the junction increases. Therefore, the junction
resistance becomes very high and a very small current (reverse saturation
current) flows in the circuit. The diode is said to be in OFF state. The reverse
bias current due to minority charge carriers.
Procedure:-
Forward bias
1. Connections are made as per the circuit diagram.
2. For forward bias, the DC power supply +ve terminal is connected to the anode
of the diode and –ve terminal is connected to the cathode of the diode using
1N4007.
3. Switch on the power supply and increases the input voltage gradually in Steps.
4. Note down the corresponding current flowing through the diode (in mA) and
voltage across the diode for each and every step of the input voltage.
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage and current.
7. From the graph calculate cut-in voltage, Static resistance and Dynamic
resistances.

Reverse bias
1. Connections are made as per the circuit diagram.
2. For reverse bias, the DC power supply +ve terminal is connected to the
cathode of the diode and – ve terminal is connected to the anode of the diode
using 1N4007.
3. Switch on the power supply and increases the input voltage gradually in Steps.
4. Note down the corresponding current flowing through the diode (in µA) and
voltage across the diode for each and every step of the input voltage.
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage and current.
7. From the graph calculate Breakdown voltage.

BEE Lab. Manual, J B Institute of Engineering & Technology

Observation
Foreward Bias Reverse Bias
Sl NO Applied Voltage Current Sl NO Applied Voltage Current
voltage across IF (mA) voltage across IR (mA)
(V) diode(V) (V) diode(V)
1 1
2 2
3 3
. .
. .
. .
. .
30 30

Calculations
From the graph at a given operating point we can determine the static
resistance (Rd) and dynamic resistance (r d).

The static resistance (Rd) is defined as (Rd) =

The Dynamic resistance (Rd) is defined as (r)=

Precautions:-
1. All the connections should be correct.
2. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage of the diode.
3. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
4. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
5. Parallax error should be avoided while taking the readings from the (if) Analog
meters.

RESULT:-

Forward and Reverse Bias characteristics for a p-n diode is observed.

VIVA QESTIONS:-
1. Define depletion region of a diode?
2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
BEE Lab. Manual, J B Institute of Engineering & Technology
 7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?

BEE Lab. Manual, J B Institute of Engineering & Technology

 2.a Half wave Rectifier
Aim:
1. To observe the input and output waveforms of the Half-wave rectifier on CRO
with and without filter.

2. To find load regulation and ripple factor of a half-wave rectifier both with and
without filter.

Apparatus Required:

Name Range Type Quantity

Step down Transformer 230 V / 12-0-12 1
Diode 1N4007 1
Capacitors 2 .2 µF 1
100 µF 1
Resistors 100 Ω 1
1KΩ 1
2.2 KΩ 1
5.8 KΩ 1
10 KΩ 1
1 MΩ 1
Breadboard 1
Cathode Ray Oscilloscope 0 – 20 MHZ Duel channel 1
Digital multimeter 1
Connecting probes SUFFICIENT
Connecting wires SUFFICIENT

Circuit Diagram:

BEE Lab. Manual, J B Institute of Engineering & Technology

Theory:
During positive half-cycle of the input voltage, the diode D1 is in forward bias and
conducts through the load resistor R1. Hence the current produces an output
voltage across the load resistor R1, which has the same shape as the +ve half cycle
of the input voltage. During the negative half-cycle of the input voltage, the diode is
reverse biased and there is no current through the circuit. i.e, the voltage across R1
is zero. The net result is that only the +ve half cycle of the input voltage appears
across the load. The average value of the half wave rectified o/p voltage is the value
measured on dc voltmeter. For practical circuits, transformer coupling is usually
provided for two reasons.
1. The voltage can be stepped-up or stepped-down, as needed.

2. The ac source is ly isolated from the rectifier. Thus preventing shock hazards
in the secondary circuit.

Procedure:
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary
side to the rectifier input.
3. By the multimeter, measure the, ac and dc voltage at the output of the
rectifier with 100Ω load resistor VAC(RMS) and VDC respectively.
4. From the CRO output, calculate Vm.
5. Repeat the above step by using different load resistors i.e. with 1 KΩ, 2.2 KΩ,
5.8 KΩ and 10 KΩ.
6. For each reading calculate the ripple factor and percentage regulation.
(Calculate percentage regulation using 1 MΩ resistor as no load.)
7. Repeat the above steps (3, 4, 5 and 6) by using 2.2 μF capacitor filter.
8. Repeat the above steps (3, 4, 5 and 6) by using 100 μF capacitor filter.
9. Plot the graphs for AC input I-Phase signal, output of rectifier without filter
and output of rectifier with filter by considering 1 KΩ resistor as load.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Expected Waveforms:

Ob
ser
vat
ion
s

O
b
s
e
r
v
a
t
i
o
n

f
o
r

w
i
t
hout filter with varying load resistance:

S. No. Load Vdc Vac(rms) Ripple %

Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

Observation for with filter c= 2.2 μF with varying load resistance:

BEE Lab. Manual, J B Institute of Engineering & Technology

 S. No. Load Vdc Vac(rms) Ripple %
Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

Observation for with filter c= 100 μF with varying load resistance:

S. No. Load Vdc Vac(rms) Ripple %

Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

CALCULATIONS:
Theoretical Calculations:-
Without Filter:-

Vrms=Vm/ √2 =
Vdc=Vm/ π =

√(
2
Vrms
Ripple factor γ= Vdc ) – 1 =1.21

With Filter:-
1
Ripple factor, γ=
2√3 f C R
Where f =50Hz, C =100μF, R=1KΩ.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Practical calculations:-
Vac=
Vdc=
Ripple factor with out Filter = Vac / Vdc =
Ripple factor with Filter = Vac / Vdc =
VNL − V FL
% Regulation = × 100
V FL

PRECAUTIONS:
1. The primary and secondary sides of the transformer should be carefully
identified.
2. The polarities of the diode should be carefully identified.
3. While determining the % regulation, first Full load should be applied and then
it should be decremented in steps.

RESULT:
1. The Ripple factor for the Half-Wave Rectifier with and without filters is
measured.
2. The % regulation of the Half-Wave rectifier is calculated.

VIVA QUESTIONS:
1. What is the PIV of Half wave rectifier?
2. What is the efficiency of half wave rectifier?
3. What is the rectifier?
4. What is the difference between the half wave rectifier and full wave
Rectifier?
5. What is the o/p frequency of Bridge Rectifier?
6. What are the ripples?
7. What is the function of the filters?
8. What is TUF?
9. What is the average value of o/p voltage for HWR?
10. What is the peak factor?

BEE Lab. Manual, J B Institute of Engineering & Technology

 2.b Full Wave Rectifier
Aim:
1. To observe the input and output waveforms of the Full-wave rectifier on CRO
with and without filter.
2. To find load regulation and ripple factor of a Full-wave rectifier both with and
without filter.

Apparatus Required:

NAME RANGE TYPE QUANTITY

STEP DOWN TRANSFORMER 230 V / 12-0-12 1
DIODE 1N4007 2
CAPACITORS 2 .2 µF 1
100 µF 1
RESISTORS 100 Ω 1
1KΩ 1
2.2 KΩ 1
5.8 KΩ 1
10 KΩ 1
1 MΩ 1
BREADBOARD 1
CATHODE RAY 0 – 20 MHZ DUEL CHANNEL 1
OSCILLOSCOPE
DIGITAL MULTIMETER 1
CONNECTING PROBES SUFFICIENT
CONNECTING WIRES SUFFICIENT

Circuit Diagram:

BEE Lab. Manual, J B Institute of Engineering & Technology

Theory:
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During
positive half cycle of secondary voltage (input voltage), the diode D1 is forward
biased and D2 is reverse biased. The diode D1 conducts and current flows through
load resistor RL. During negative half cycle, diode D2 becomes forward biased and
D1 reverse biased. Now, D2 conducts and current flows through the load resistor RL
in the same direction.
There is a continuous current flow through the load resistor RL, during both the
half cycles and will get unidirectional current as show in the model graph. The
difference between full wave and half wave rectification is that a full wave rectifier
allows unidirectional (one way) current to the load during the entire 360 degrees of
the input signal and half- wave rectifier allows this only during one half cycle (180
degree).

Procedure:
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary
side to the rectifier input.
3. By the multimeter, measure the, ac and dc voltage at the output of the rectifier
with 100Ω load resistor VAC(RMS) and VDC respectively.
4. From the CRO output, calculate Vm.
5. Repeat the above step by using different load resistors i.e. with 1 KΩ, 2.2 KΩ,
5.8 KΩ and 10 KΩ..
6. For each reading calculate the ripple factor and percentage regulation.
(Calculate percentage regulation using 1 MΩ resistor as no load.)
7. Repeat the above steps (3, 4, 5 and 6) by using 2.2 μF capacitor filter.
8. Repeat the above steps (3, 4, 5 and 6) by using 100 μF capacitor filter.
9. Plot the graphs for AC input I-Phase signal, output of rectifier without filter
and output of rectifier with filter by considering 1 KΩ resistor as load.

BEE Lab. Manual, J B Institute of Engineering & Technology

Expected Waveforms:

Observations
Observation for without filter with varying load resistance:

S. No. Load Vdc Vac(rms) Ripple %

Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

BEE Lab. Manual, J B Institute of Engineering & Technology

 Observation for with filter c= 2.2 μF with varying load resistance:

S. No. Load Vdc Vac(rms) Ripple %

Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

Observation for with filter c= 100 μF with varying load resistance:

S. No. Load Vdc Vac(rms) Ripple %

Resistor Vm Vm Vm factor(γ) Regulation
= π =
√2

THEORITICAL CALCULATIONS:-

Vrms=Vm/ √2 =
Vdc=Vm/ π =

√(
2
Vrms
Without Filter: Ripple factor γ= Vdc ) – 1 =1.21

With Filter:-
1
Ripple factor, γ=
4 √3 f C R
Where f =50Hz, C =100μF, R=1KΩ.
Practical calculations:

BEE Lab. Manual, J B Institute of Engineering & Technology

 Without Filter:
Vac=
Vdc=
Ripple factor with out Filter = Vac / Vdc =
Ripple factor with Filter = Vac / Vdc =
VNL − V FL
% Regulation = × 100
V FL

Without Filter:
Vac=
Vdc=
Ripple factor with out Filter = Vac / Vdc =
Ripple factor with Filter = Vac / Vdc =
VNL − V FL
% Regulation = × 100
V FL

Precautions:
1. The primary and secondary side of the transformer should be carefully
identified
2. The polarities of all the diodes should be carefully identified.
Result:-
The ripple factor of the Full-wave rectifier (with filter and without filter) is
calculated.
VIVA QUESTIONS:-
1. Define regulation of the full wave rectifier?
2. Define peak inverse voltage (PIV)? And write its value for Full-wave
rectifier?
3. If one of the diode is changed in its polarities what wave form would you
get?
4. Does the process of rectification alter the frequency of the waveform?
5. What is ripple factor of the Full-wave rectifier?
6. What is the necessity of the transformer in the rectifier circuit?
7. What are the applications of a rectifier?
8. What is ment by ripple and define Ripple factor?
9. Explain how capacitor helps to improve the ripple factor?
10. Can a rectifier made in INDIA (V=230v, f=50Hz) be used in USA (V=110v,
f=60Hz)?

BEE Lab. Manual, J B Institute of Engineering & Technology

 3. TYPES OF CLIPPERS AT DIFFERENT REFERENCE VOLTAGES

Aim:
a) To study the clipping circuits using diodes.
b) To observe the transfer characteristics of all the clipping circuits in CRO.
Apparatus:
1. Function Generator.
2. Bread board
3. Connecting patch cards.
4. CRO
5. RPS
6. Resistors (1 K, 10K)
7. Diodes (1N4007)

Theory:
Clipping circuits basically limit the amplitude of the input signal either below or above certain
voltage level. They are referred to as Voltage limiters, Amplitude selectors or Slicers. A clipping
circuit is one, in which a small section of input waveform is missing or cut or truncated at the out
put section.
Clipping circuits are classified based on the position of Diode.
1.Series Diode Clipper
2.Shunt Diode Clipper
Procedure:
1. Connect the circuit as shown in fig.1
2. In each case apply 10 V P-P, 1KHz Sine wave I/P using a signal generator.
3. O/P is taken across the load RL.
4. Observe the O/P waveform on the CRO and compare with I/P waveform.
5. Sketch the I/P as well as O/P waveforms and mark the numerical values.
6. Note the changes in the O/P due to variations in the reference voltage V R = 2V, 3V..
7. Obtain the transfer characteristics of Fig.1, by keeping CRO in X-Y mode.
8. Repeat the above steps for all the circuit.

Precautions:
1. Set the CRO O/P channel in DC mode always.
2. Observe the waveform simultaneously by keeping common ground.
3. See that there is no DC component in the I/P.
4. To find transfer characteristics apply input to the X-Channel, O/P to Y-Channel, adjust the dot at
the center of the screen when CRO is in X-Y mode. Both the channels must be in ground, then
remove ground and plot the transfer characteristics.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Circuit Diagram Input&Output Wave Forms

BEE Lab. Manual, J B Institute of Engineering & Technology

 Circuit diagram O/P Wave Forms

BEE Lab. Manual, J B Institute of Engineering & Technology

Circuit Diagram O/P Wave Forms

BEE Lab. Manual, J B Institute of Engineering & Technology

Circuit Diagrams Transfer Characteristics

BEE Lab. Manual, J B Institute of Engineering & Technology

Result: Different types of clipping circuits have been studied and observed the responses for various combinations
of VR and clipping diodes.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Viva Questions:
1. Define clipping circuit?
2. What are the different types of clippers?
3. What is a break region?
4. Which kind of a clipper is called a slicer circuit?
5. What are the disadvantages of the shunt clipper?
6. What are the disadvantages of the series clipper?
7. What is piecewise linear mode of a diode?

BEE Lab. Manual, J B Institute of Engineering & Technology

 4 TYPES OF CLAMPERS AT DIFFERENT REFERENCE VOLTAGES
Aim:
To study the clamping circuits using diodes and capacitors.

Apparatus:

1. Function Generator.
2. Bread board
3. Connecting patch cards.
4. CRO
5. RPS
6. Resistors ( 100 K )
7. Diodes (1N4007)
8. Capacitor (0.1f)

Theory:

Clamping circuits add a DC level to an AC signal. A clamper is also refer to as

DC restorer or DC re-inserter. The Clampers which clamp the given waveform either above or below the
reference level, which are known as positive or negative clamping respectively.

Procedure:
1. Connect the circuit as shown in fig.1.
2. Apply a Sine wave of 10VP-P, 1 KHz at the input terminals with the help of Signal Generator.
3. Observe the I/P & O/P waveforms of CRO and plot the waveforms and mark the values with V R =
2 V, 3V
4. O/P is taken across the load RL.
5. Repeat the above steps for all clamping circuits as shown.
6. Waveforms are drawn assuming diode is ideal.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Circuit diagram I/P & O/P Wave Forms
Vi =5V

-5V
C1 V0
0.5V t
V1 0.1uF R1
10V D1
7.07V_rms
1N4007GP
100kohm V0
1000Hz
0Deg
-9.5V

C1 V0
9.5V
V1 0.1uF R1
10V
7.07V_rms
D1
100kohm V0 5V
1000Hz 1N4007GP
0Deg
-0.5V t

C1
V0

0.1uF D1 t
V1
1N4007GP
R1 -1.5V
10V
7.07V_rms 100kohm V0
1000Hz
V2
0Deg
2V
-6.5V

-11.5V

BEE Lab. Manual, J B Institute of Engineering & Technology

Circuit diagram O/P Wave forms

Result:
Different types of clamping circuits are studied and observed the response for different combinations of V R
and diodes.

BEE Lab. Manual, J B Institute of Engineering & Technology

 Viva Questions:

1.What are the applications of clamping circuits?

2.What is the synchronized clamping?
3.Why is a clamper called a dc inserter?
4.What is clamping circuit theorem. How dose the modified clamping
Circuit theorem differs from this?
5. Differentiate –ve clamping circuit from +ve clamping circuits in the
above circuits?
6. Describe the charging and discharging of a capacitor is each circuit?
7. What is the function of capacitor?
8. What are the effects of diode characteristics on the output of the
Clamper?

BEE Lab. Manual, J B Institute of Engineering & Technology

BEE Lab. Manual, J B Institute of Engineering & Technology
 5. Characteristics of transistor in Common Base
configuration
AIM:
1. To plot the input and output characteristics of a transistor connected in
common base configuration.
2. To calculate the input dynamic resistance and output dynamic resistance at a
given operating point.
3. To calculate the dc current gain ( dc )and ac current gain ( ac )at a given
operating point.

Apparatus Required:

Name Range Type Quantity

Regulated Power 0 -15 V 2
Supply (RPS)
Ammeter 0 -20 mA 1
0 -200 µA
Voltmeter 0 – 20 V 1
Transistor BC107 (NPN) 1

Resistors 1KΩ 2
Breadboard 1
Connecting wires

CIRCUIT DIAGRAM:

BEEE Lab. Manual, J B Institute of Engineering & Technology

THEORY:
A transistor is a three terminal active device. T he terminals are emitter, base,
collector. In CB configuration, the base is common to both input (emitter) and
output (collector). For normal operation, the E-B junction is forward biased and C-B
junction is reverse biased. In CB configuration, I E is +ve, IC is –ve and IB is –ve. So,
VEB=f1 (VCB,IE) and
IC=f2 (VCB,IB)
With an increasing the reverse collector voltage, the space-charge width at
the output junction increases and the effective base width ‘W’ decreases. This
phenomenon is known as “Early effect”.
Then, there will be less chance for recombination within the base region. With
increase of charge gradient with in the base region, the current of minority carriers
injected across the emitter junction increases. The current amplification factor of
CB configuration is given by,

PROCEDURE:
Input characteristics:
1. Connections are made as per the circuit diagram.
2. For plotting the input characteristics, set V CB = 0V and vary VEE gradually in
steps and note down the corresponding I E and VEB.
3. Repeat the above step by keeping VCB at 4V, 6V, and 10V.
4. Tabulate the readings.
5. Plot the graph between V EB and IE for constant VCB.
Output characteristics:
1. Connections are made as per the circuit diagram.
2. For plotting the output characteristics, set I E = 2 mA and vary VCC gradually
in steps and note down the corresponding I C and VCB.
3. Repeat the above step by keeping IE = 4 mA, 6 mA.
4. Tabulate the readings.
5. Plot the graph between VCB and IC for constant IE.

BEEE Lab. Manual, J B Institute of Engineering & Technology

OBSERVATIONS:

Input characteristics:
Sl No VCB=0V VCB=4V VCB=6V
VEB(V) IE(mA) VEB(V) IE(mA) VEB(V) IE(mA)
1
2
3
.
.
.
.
30

Output characteristics:
Sl No IE = 2mA IE = 4mA IE = 6mA
VCB(V) IC(mA) VCB(V) IC(mA) VCB(V) IC(mA)
1
2
3
.
.
.
.
30

Calculations:-

Input dynamic resistance (ri) = =

Output dynamic resistance (r o) = =

Dc current gain, ( dc) = =

Ac current gain ( ac) = =

BEEE Lab. Manual, J B Institute of Engineering & Technology

MODEL GRAPHS:

PRECAUTIONS:
1. The supply voltages should not exceed the rating of the transistor.
2. Meters should be connected properly according to their polarities.

RESULT:
1. The input and output characteristics of the transistor are drawn.
2. The of the given transistor is calculated.

Viva questions:
1. What is the range of for the transistor?
2. Draw the input and output characteristics of the transistor in CB
configuration?
3. Identify various regions in output characteristics?
4. What is the relation between and β?
5. What are the applications of CB configuration?
6. What are the input and output impedances of CB configuration?
7. Define (alpha)?
8. What is EARLY effect?
9. Draw diagram of CB configuration for PNP transistor?
10. What is the power gain of CB configuration?

BEEE Lab. Manual, J B Institute of Engineering & Technology

 6. Characteristics of Transistor in CE Configuration

Aim:
1. To draw the input and output characteristics of transistor connected in
CE configuration.

2. To find β of the given transistor.

Apparatus Required:

Name Range Type Quantity

Regulated Power Supply (RPS) 0 -15 V 2
Ammeter 0 -20 mA 1
0 -200 µA
Voltmeter 0 – 20 V 1
Transistor BC107 (NPN) 1
Resistors 1KΩ 2
Breadboard 1
Connecting wires

Circuit Diagram:

BEEE Lab. Manual, J B Institute of Engineering & Technology

Theory:
A transistor is a three terminal device. The terminals are emitter, base,
collector. In common emitter configuration, input voltage is applied between base
and emitter terminals and out put is taken across the collector and emitter
terminals. Therefore the emitter terminal is common to both input and output. The
input characteristics resemble that of a forward biased diode curve. This is expected
since the Base-Emitter junction of the transistor is forward biased. As compared to
CB arrangement I B increases less rapidly with VBE . Therefore input resistance of
CE circuit is higher than that of CB circuit.
The output characteristics are drawn between I c and VCE at constant IB.
the collector current varies with VCE unto few volts only. After this the collector
current becomes almost constant, and independent of VCE. The value of VCE up to
which the collector current changes with V CE is known as Knee voltage. The
transistor always operated in the region above Knee voltage, I C is always constant
and is approximately equal to IB. The current amplification factor of CE
configuration is given by

Procedure:

Input Charecterstics:
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage V CE is kept constant
at 0V and for different values of V BE note down the values of IC.
3. Repeat the above step by keeping VCE at 2V and 4V.
4. Tabulate all the readings.
5. Plot the graph between V BE and IB for constant VCE

Output Characterstics:
1. Connect the circuit as per the circuit diagram.
2. For plotting the output characteristics the input current I B is kept constant at
10μA and for different values of VCE note down the values of I C. Repeat the
above step by keeping IB at 75μA 100μA
3. Tabulate the all the readings.
4. Plot the graph between VCE and IC for constant IB

BEEE Lab. Manual, J B Institute of Engineering & Technology

MODEL GRAPHS:

Observations:

Input characteristics:
Sl No VCE=0V VCE=4V VCE=6V
VEB(V) IB(μA) VEB(V) IB(μA) VEB(V) IB(μA)
1
2
3
.
.
.
.
30

Output characteristics:
Sl No IB = 2μA IB = 4μA IB = 6μA
VCE(V) IC(mA) VCE(V) IC(mA) VCE(V) IC(mA)
1
2
3
.
.
.
.
30

BEEE Lab. Manual, J B Institute of Engineering & Technology

Calculations:
vBE
Input dynamic resistance (r i ) = I B =
r ∇ VCE
Output dynamic resistance ( o ) = ∇ IC =
Ic
Dc current gain, (βdc) = =
IB
∇ IC
Ac current gain (βac) = ∇ IB =

Precautions:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities

Result:
1. The input and out put characteristics of a transistor in CE configuration are
Drawn.
2. The β of a given transistor is calculated
VIVA QUESTIONS:
1. What is the range of β for the transistor?
2. What are the input and output impedances of CE configuration?
3. Identify various regions in the output characteristics?
4. what is the relation between and β?
5. Define current gain in CE configuration?
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor?
9. What is the power gain of CE configuration?
10. What are the applications of CE configuration?

BEEE Lab. Manual, J B Institute of Engineering & Technology

 7. M O S FET Characteristics in CS Configuration
Aim:
1. To plot a family of drain and transfer characteristics of a given FET.

2. To find the FET parameters drain resistance (rd), amplification factor (μ), and
transconductance (gm) of the given FET.

Apparatus Required:

NAME RANGE TYPE QUANTITY

REGULATED POWER SUPPLY 0 – 15 V 2
(RPS)
AMMETER 0 – 20 mA 1
0 – 200 µA
VOLTMETER 0 – 20 V 1
FIELD EFFECT TRANSISTOR BFW11 1
(FET)
RESISTORS 100KΩ 1
680Ω 1
BREADBOARD 1
CONNECTING WIRES SUFFICIENT

Circuit Diagram:-

BEEE Lab. Manual, J B Institute of Engineering & Technology 43

Theory:
An FET is a three terminal device, having the characteristics of high input
impedance and less noise, the Gate to Source junction of the FET s always
reverse biased. In response to small applied voltage from drain to source, the n -
type bar acts as sample resistor, and the drain current increases linearly with
VDS. With increase in ID the ohmic voltage drop between the source and the
channel region reverse biases the junction and the conducting position of the
channel begins to remain constant. The VDS at this instant is called “pinch of
voltage”. If the gate to source voltage (V GS) is applied in the direction to provide
additional reverse bias, the pinch off voltage ill is decreased.
In amplifier application, the FET is always used in the region beyond the pinch-
off. The current equation is given by
I D = I DSS(1− V GS/V P)2

Procedure:
To obtain drain characteristics:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep V GS constant at 0V (VGS can be set 0V by
short circuiting the terminals of input power supply).
3. Vary the drain voltage (VDD) and observe the values of source voltage (V DS) and
drain current ID) and note down values in convenient steps.
4. Repeat the above step 3 for different values of VGS at -1V and -2V.
5. All the readings are tabulated and plot the graph V DS verses ID for a constant
VGS.

To obtain transfer characteristics:

6. To plot the transfer characteristics, keep VDS constant at 0.5 V.
7. Vary the gate voltage (VGG) and observe the values of gate source voltage (VGS)
and drain current (ID) and note down values in convenient steps.
8. Repeat step 7 for different values of VDS at 1 V and 1.5 V.
9. The readings are tabulated and plot the graph VGS verses ID for a constant
VDS.
10. From drain characteristics, calculate the values of dynamic resistance (r d) by
using the formula
∇ V DS
r =
d ∇ ID

BEEE Lab. Manual, J B Institute of Engineering & Technology 44

 11. From transfer characteristics, calculate the value of trans conductace (g m) By
using the formula
∇ ID
gm=
∇ VDS
∇ V DS
12. Amplification factor μ = dynamic resistance. Tranconductance μ=
∇ V GS

Model Graph:
Drain ctaracteristic

BEEE Lab. Manual, J B Institute of Engineering & Technology 45

Transfer characteristic

Observations:
Drain characteristics:

Sl. No VGS=0V VGS=-1V VGS=-2V

VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)

Transfer characteristics:

Sl. No VDS=0.5V VDS=1.0V VDS=1.5V

VGS(V) ID(mA) VGS(V) ID(mA) VGS(V) ID(mA)

BEEE Lab. Manual, J B Institute of Engineering & Technology 46

 Calculations:
At a suitable operating point, the parameters are calculated as follows:
VDS
r= with V as constant =
1. Drain resistance, d
GS
I DS
I DS
g= with V as constant =
2. Trans-conductance, m DS
V DS
∇ V DS
3. Amplification factor, μ= with I D as constant =
∇ V
GS

These parameters are related by the equation μ= r d gm

Precautions:
1. The three terminals of the FET must be care fully identified
2. Practically FET contains four terminals, which are called source, drain,
Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.
Result :
1. The drain and transfer characteristics of a given FET are drawn
2. The dynamic resistance (rd), amplification factor (μ) and
Transconductance (g m) of the given FET are calculated.
VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?

BEEE Lab. Manual, J B Institute of Engineering & Technology 47

 8. M O S FET Characteristics in CD Configuration
Aim:
1. To plot a family of drain and transfer characteristics of a given FET.

2. To find the FET parameters drain resistance (rd), amplification factor (μ), and
transconductance (gm) of the given FET.

Apparatus Required:

NAME RANGE TYPE QUANTITY

REGULATED POWER SUPPLY 0 – 15 V 2
(RPS)
AMMETER 0 – 20 mA 1
0 – 200 µA
VOLTMETER 0 – 20 V 1
FIELD EFFECT TRANSISTOR BFW11 1
(FET)
RESISTORS 100KΩ 1
680Ω 1
BREADBOARD 1
CONNECTING WIRES SUFFICIENT

Circuit Diagram:-

BEE Lab. Manual, J B Institute of Engineering & Technology

Theory:
An FET is a three terminal device, having the characteristics of high input
impedance and less noise, the Gate to Source junction of the FET s always
reverse biased. In response to small applied voltage from drain to source, the n-
type bar acts as sample resistor, and the drain current increases linearly with
VDS. With increase in ID the ohmic voltage drop between the source and the
channel region reverse biases the junction and the conducting position of the
channel begins to remain constant. The VDS at this instant is called “pinch of
voltage”. If the gate to source voltage (V GS) is applied in the direction to provide
additional reverse bias, the pinch off voltage ill is decreased.
In amplifier application, the FET is always used in the region beyond the pinch-
off. The current equation is given by
I D = I DSS(1− V GS/V P)2

Procedure:
To obtain drain characteristics:
13. All the connections are made as per the circuit diagram.
14. To plot the drain characteristics, keep V GS constant at 0V (VGS can be set
0V by short circuiting the terminals of input power supply).
15. Vary the drain voltage (VDD) and observe the values of source voltage (V DS)
and drain current ID) and note down values in convenient steps.
16. Repeat the above step 3 for different values of VGS at -1V and -2V.
17. All the readings are tabulated and plot the graph V DS verses ID for a
constant VGS.

To obtain transfer characteristics:

18. To plot the transfer characteristics, keep VDS constant at 0.5 V.
19. Vary the gate voltage (VGG) and observe the values of gate source voltage
(VGS) and drain current (ID) and note down values in convenient steps.
20. Repeat step 7 for different values of VDS at 1 V and 1.5 V.
21. The readings are tabulated and plot the graph VGS verses ID for a
constant VDS.
22. From drain characteristics, calculate the values of dynamic resistance (r d) by
using the formula
∇ V DS
r =
d ∇ ID

BEE Lab. Manual, J B Institute of Engineering & Technology

 23. From transfer characteristics, calculate the value of trans conductace (g m) By
using the formula
∇ ID
gm=
∇ VDS
∇ V DS
24. Amplification factor μ = dynamic resistance. Tranconductance μ=
∇ V GS

Model Graph:
Drain ctaracteristic

BEE Lab. Manual, J B Institute of Engineering & Technology

Transfer characteristic

Observations:
Drain characteristics:

Sl. No VGS=0V VGS=-1V VGS=-2V

VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)

Transfer characteristics:

Sl. No VDS=0.5V VDS=1.0V VDS=1.5V

VGS(V) ID(mA) VGS(V) ID(mA) VGS(V) ID(mA)

BEE Lab. Manual, J B Institute of Engineering & Technology

 Calculations:
At a suitable operating point, the parameters are calculated as follows:
VDS
r= with V as constant =
4. Drain resistance, d
GS
I DS
I DS
g= with V as constant =
5. Trans-conductance, m DS
V DS
∇ V DS
6. Amplification factor, μ= with I D as constant =
∇ V
GS

These parameters are related by the equation μ= r d gm

Precautions:
1. The three terminals of the FET must be care fully identified
2. Practically FET contains four terminals, which are called source, drain,
Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.
Result :
1. The drain and transfer characteristics of a given FET are drawn
2. The dynamic resistance (rd), amplification factor (μ) and
Transconductance (g m) of the given FET are calculated.
VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?

BEE Lab. Manual, J B Institute of Engineering & Technology

 9. SWITCHING CHARACTERISTICS OF A TRANSISTOR
Aim:
Design Transistor to act as a Switch and verify the operation. Choose VCC =
10V, ICmax = 10 mA, hfe = 50, VCESat = 0.2, Vin = 4Vp-p, VBESat = 0.6 V

Apparatus:

1. Transistor (BC 107).

2. Breadboard.
3. CRO.
4. Resistors (1K, 8.2K).
5. RPS.
6. Function Generator.
7. Connecting patch cards.

Theory:

When the I/P voltage Vi is negative or zero, transistor is cut-off and no current
flows through Rc hence V0  VCC when I/P Voltage Vi jumps to positive voltage,
transistor will be driven into saturation. Then
V0 = Vcc – ICRC  VCESat

Design procedure:
VCC  VCESat
When Q is ON RC =
I C max
= (10-0.2) / 10 mA = 1K

IB ICmax / hfe
 10mA / 50

IB 0.2 mA

To keep transistor remain in ON, IB should be greater than

Ibmin = 0.2mA

Vin = IBRB + VBE Sat

2V = 0.2 mA RB + 0.6V
RB = 7 K (choose practical values as 8.2 K)

1
Circuit diagram:

Procedure:

1. Connect the circuit as shown in figure.

2. Apply the Square wave 4 Vp-p frequency of 1 KHz
3. Observe the waveforms at Collector and Base and plot it.

Precautions:

1. When you are measuring O/P waveform at collector and base, keep the
CRO in DC mode.
2. When you are measuring VBE Sat, VCE Sat keep volts/div switch at either 0.2
or 0.5 position.
3. When you are applying the square wave see that there is no DC voltage in
that. This can be checked by CRO in either AC or DC mode, there should
not be any jumps/distortion in waveform on the screen.

2
Expected waveforms:

Result:

Transistor as a switch has been designed and O/P waveforms are observed.

3
Viva Questions:

1. Differentiate between Diode and Transistor as a switch?

2. Mention typical values of VBE Sat, VCE Sat for both Si, Ge Transistors?
3. Define ON time, OFF time of the transistor?
4. In which regions Transistor acts as a switch?
5. Explain phenomenon of “ latching “ in a Transistor switch?
6. Define Rise time & fall time of a transistor switch?

4
 10.Characteristics of Zener diode as Voltage regulator
AIM:
To volt-ampere characteristics of a given Zener diode, breakdown voltage, voltage
regulation of a given zener diode and Dynamic reverse bias resistance at breakdown
voltage.

Apparatus Required:

Name Range Type Quantity

Regulated Power Supply (RPS) 0 -15 V 1
Ammeter 0 -20 mA
1
0 -200 µA
Voltmeter 0 – 20 V 1
Diode BZX5V 1
BZX8V 1
Resistors 100Ω 1
1KΩ 1
Breadboard 1
Connecting wires

CIRCUIT DIAGRAM:-

Forward bias Reverse bias

A zener diode is heavily doped p-n junction diode, specially made to operate in the
break down region. A p-n junction diode normally does not conduct when reverse
biased. But if the reverse bias is increased, at a particular voltage it starts
conducting heavily. This voltage is called Break down Voltage. High current through

BEE Lab. Manual, J B Institute of Engineering & Technology

the diode can permanently damage the device. To avoid high current, we connect a
resistor in series with zener diode. Once the diode starts conducting it maintains
almost constant voltage across the terminals what ever may be the current through
it, i.e., it has very low dynamic resistance. It is used in voltage regulators.

PROCEDURE:
Forward bias:-
1. Connections are made as per the circuit diagram.
2. For forward bias, the DC power supply +ve terminal is connected to the anode
of the diode and –ve terminal is connected to the cathode of the zener diode
using BZX5V or BZX8V.
3. Switch on the power supply and increases the input voltage gradually in Steps.
4. Note down the corresponding current flowing through the diode (in mA) and
voltage across the diode for each and every step of the input voltage and
tabulate the readings.
5. Graph is plotted between voltage and current.
6. From the graph calculate cut-in voltage, Static resistance and Dynamic
resistances.
Reverse bias:-
1. Connections are made as per the circuit diagram.
2. For reverse bias, the DC power supply +ve terminal is connected to the cathode
of the diode and-ve terminal is connected to the anode of the zener diode using
BZX5V or BZX8V.
3. Switch on the power supply and increases the input voltage gradually in Steps.
4. Note down the corresponding current flowing through the diode (in µA) and
voltage across the diode for each and every step of the input voltage.
5. The reading of voltage and current are tabulated.
Graph is plotted between voltage and current, and from the graph calculate the
Breakdown voltage.

BEE Lab. Manual, J B Institute of Engineering & Technology

Observation

Foreward Bias Reverse Bias

S.No Applied Voltage across Current S.No Applied Voltage across Current
voltage (V) diode(V) IF (mA) voltage (V) diode(V) IR (mA)
1 1
2 2
3 3
. .
. .
. .
. .
30 30

Calculations
From the graph at a given operating point we can determine the static
resistance (Rd) and dynamic resistance (r d).

The static resistance (Rd) is defined as (Rd) =

The Dynamic resistance (Rd) is defined as (r)=

Precautions:
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed the
ratings of the diode.

RESULT:
 Static characteristics of zener diode are obtained and drawn.
 Percentage regulation of zener diode is calculated.

BEE Lab. Manual, J B Institute of Engineering & Technology

VIVA QUESTIONS:
1. What type of temperature Coefficient does the zener diode have?
2. If the impurity concentration is increased, how the depletion width effected?
3. Does the dynamic impendence of a zener diode vary?
4. Explain briefly about avalanche and zener breakdowns?
5. Draw the zener equivalent circuit?
6. Differentiate between line regulation & load regulation?
7. In which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What type of temperature coefficient does the Avalanche breakdown has?
10. By what type of charge carriers the current flows in zener and avalanche
breakdown diodes?

BEE Lab. Manual, J B Institute of Engineering & Technology

 11.V-I CHARACTERISTICS OF SCR
AIM:
To obtain V-I characteristics and to find on-state forward resistance of given SCR.
To determine holding, latching current and break over voltage of given SCR.
APPARATUS REQUIRED: Trainer kit, Patch cards, Multimeters.

CIRCUIT DIAGRAM:

Fig 1.1(a) Circuit diagram for VI characteristics of SCR.

VBO = Forward break over voltage

VBR = Reverse break over voltage
Ig = Gate current

Characteristic curve:

IAK

IG=I
VBR

VBO VAK

Fig 1.2(a) Static characteristic of SCR.

TABULAR COLUMN:

Gate current IG = IG1 =…..mA

VAK (Volts) IA (mA)

PROCEDURE:

 Connections are made as shown in the circuit diagram.

Set R1 and R2 to mid position and V1 and V2 to minimum
 Set the gate current IG = IG1 (such that forward break over voltage is between 15 to 20
V), by varying R2 and V2.
 Slowly vary V1 in steps of 2V and note down VAK and I Ak at each step till SCR
conducts. (Note down maximum VAK, which is forward break over voltage just before
SCR conducts).
FINDING LATCHING CURRENT:
 Ensure that the SCR is in the state of conduction.
 Start reducing (VAK) anode voltage in steps of 2V; simultaneously check the state of
SCR by switching off gate supply V2. If SCR switches off just by removing gate
terminal, and switches on by connecting gate supply, then the corresponding anode
current IA is the latching current (IL) for the SCR.
FINDING HOLDING CURRENT:
 Ensure that the SCR is in the state of conduction.
 Switch off the gate supply permanently.
 Start reducing (VAK) anode voltage in steps of 2V; simultaneously check the state of
SCR. If SCR switches off. Note down the anode current (I A) just before it drops to
zero, which will be IH.
 Reverse the anode voltage polarity.
 Vary VAK in steps of 5V till 25V and note down VAK and IA values at each step
 Plot forward and reverse characteristics using the above-tabulated values. Find the
SCR forward resistance using the graph.
 Repeat the above procedure for the forward and reverse characteristics of SCR for a
gate current Ig = Ig2.

RESULT: The values of VAK and IAK are noted down, plotted and SCR forward
resistance is found. The values obtained are verified.
 12. UJT Characteristics and identify negative region
Aim:
To study the operation of UJT Relaxation Oscillator

Apparatus:
1.Resistors (470E, 220E, 100K Potentiometer)
2.Capacitors (.01F,0.1F, 1F)
3.Cathode Ray Oscilloscope
4.Bread board

Circuit diagram:

FIG: UJT Relaxation Oscillator

Theory:
 The UJT exhibits a negative resistance characteristics, it can be used to provide time
delayed trigger pulses for activating other devices like SCR. The basic trigger circuit is shown
in the figure.
The external resistances RB1 and RB2 are of the UJT base. The emitter potential Ve is
varied depending on the charging rate of capacitor C. The Charging resistance Rc should be
such that the load line intersects the device characteristics only , in the negative resistance
region AB. If the Rc load line intersects the device characteristics either in region PR or in BQ
,the resulting operating point will be stable and the circuit will not oscillate. This sets the max
and minimum limits on the permissible values of Rc.

As the Capacitor charges, when the emitter voltage goes to the peak point voltage
(Vb +VD ) , regeneration will start and the capacitor will discharges through resistor RB1. The
rise time of the output pulse will depend on the switching speed of the UJT, and the duration
will be proportional to the time constant RB1C of the discharge circuit. The emitter –base -1
diode will again be reverse biased until the capacitor is charged to (Vb +VD ) . The output
pulses are shown in figure and the duration and their period T is given by T = RC
ln (1/1-)

Procedure:
1. Connect the circuit as shown in figure. Apply 15V DC power supply to the circuit.
2. Observe the output pulses on the CRO at B1, B2 and Ve (Vc).
3. Vary the time constant (RC) by varying capacitance value and potentiometer value (R)
,observe the variations in the out pulses on the CRO at B1, B2 and Ve (Vc).
4. Plot the graphs as shown in the expected waveforms.

Expected waveforms:
 The UJT relaxation oscillator output wave forms are as shown in the figure .

Result: The waveforms are plotted as shown and the practical T is verified to the theoretical
value.

Questions: -

1. What is a relaxation oscillator?

2. Specifications of UJT?
3. What is the importance of UJT?
4. When will be UJT is switched
 13.Characteristics of LDR and PHOTODIODE
Aim: To plot distance Vs Photocurrent Characteristics of Photodiode

APPARATUS REQUIRED: COMPONENTS REQUIRED:

S.No. Name Range Type Qty

Photodiod e
1 1

LDR 1K Ω 1
2
1
Bread
3 1
Board
4 Wires

Theory:

Photodiode
A silicon photodiode is a solid state light detector that consists of a shallow
diffused P-N junction with connections provided to the out side world. When the
top surface is illuminated, photons of light penetrate into the silicon to a depth
determined by the photon energy and are absorbed by the silicon generating
electron-hole pairs.

The electron-hole pairs are free to diffuse (or wander) throughout the bulk of the
photodiode until they recombine. The average time before recombination is the
“minority carrier lifetime”.
At the P-N junction is a region of strong electric field called the depletion region.
It is formed by the voltage potential that exists at the P-N junction. Those light
generated carriers that wander into contact with this field are swept across the
junction.
If an external connection is made to both sides of the junction a photo induced
current will flow as long as light falls upon the photodiode. In addition to the
photocurrent, a voltage is produced across the diode. In effect, the photodiode
functions exactly like a solar cell by generating a current and voltage when
exposed to light.

Procedure:
Photodiode:
Connect circuit as shown in figure
Maintain a known distance between the bulb and photodiode say 5cm
Set the voltage of the bulb,vary the voltage of the diode in steps of 1 volt and note
down the diode current Ir.
Repeat above procedure for VL=4V,6V,etc.
Plot the graph :Vd Vs Ir for constant VL
Tabulation

Photodiode Distance-constant, VL-Constant

S. No VD(V) IR (mA)

Result:
The characteristics of Photodiode is to be tabulated and the graphs are plotted
 14.SOLAR CELL Characteristics
AIM:

To study the characteristics of a Solar cell

APPARATUS:

Trainer board, solar cell, source of light and patch cords

THEORY:

Solar cell is basically a PN junction diode which converts light

energy into electrical energy. When a p-n junction diode IS exposed to
light, photons are absorbed and electron hole pairs are generated in
both the p-side and n-side of the junction. The electron-hole pairs are
then separated by the strong barrier field that exists across the junction.
The electron in the p-side slide down the barrier potential and move to
the n- side while the holes in the n-side move towards the p-side. The
accumulation of electrons and holes on the two sides of the junction
gives rise to open circuit voltage when the diode is open circuited. If a
resistance is connected across the diode, current flows in the circuit.
This current flows as long as the diode is exposed to sunlight and the
magnitude of the current is proportional to the light intensity.

SYMBOL OF SOLAR CELL:

 CIRCUIT DIAGRAM :

mA

S.CELL

PROCEDURE:

1. Connect 10k Ohms between the (-) and (+) terminals of the solar cell.
2. Focus bright light on the solar cell.
3. Measure the voltage between the terminals of the solar cell
and also the current through the resistance.
4. Repeat steps 2 & 3 for different values of the resistors provided on the
trainer.
5. Note the effect of increased resistance in series with the solar cell.
6. Plot graph with voltage on X-axis and current on Y-axis

OBSERVATION TABLE:

For R = Ω For R = Ω
S.No. Voltage Current Voltage Current
(V) (mA) (V) (mA)
MODEL GRAPH:

PRECAUTIONS:

1. Make the connections properly.

2. Make sure that the solar cell is properly biased while connecting in the
circuit.

RESULT:

The V-I characteristics of solar cell is obtained practically.

VIVA VOICE QUESTIONS:

1. What is a solar cell?

2. What is the working principle of solar cell?
3. What is open circuit voltage and short circuit current?

1. Expected Value or Theoretical Values

2. Achieved Value or Experimental Value

3. Error Value

4. Reasons For Error

 15 LED Characteristics

AIM : To study of V/ I (Electrical ) characteristics and L/ I ( optical ) characteristics ofLight Emitting Diode.

APPRATURS :

Mikron /Micro Light emitting Diode Characteristics board comprising of:

1. Light emitting diode
2. 0-5V variable Supply for Light emitting diode
3. 20mW Digital Optical power meter to measure optical power of Light emittingdiode
4. 20V Digital Voltmeter to measure voltage across Light emitting diode
5. 200mA DC Digital Ammeter to measure Light emitting diode Current
THEORY: -

When a PN junction diode is forward biased , the potential barrier is lowered and themajority charge carriers start
crossing the junction. A PN junction diode, which emitslight on forward biasing, is known as light emitting diode. The
emitted light may be inthe visible range or invisible range and the intensity of light depends on the applied potential.

PRINCIPLE: -

In a PN junction charge carrier recombination takes place when the electrons cross from the n-layer to the P-layer. The
electrons are in the conduction band on the p-sidewhile holes are in the valence band on the p-side. The conduction band
has a higher energylevel compared to the valence band and so when the electrons recombine with ahole the difference in
energy is given out in the form of heat or light. In case of silicon orgermanium, the energy dissipation is in the form of
heat, whereas in case of gallium- arsenide and gallium phosphide, it is in the form of light. But this light is in the
invisibleregion & so these materials cannot be used in the manufacture of LED. Hence gallium –arsenide phosphide
which emits light in the visible region is used to manufacture an LED.

CONSTRUCTION: -

An n-type layer is grown on a substance and a p-type layer is grown over it bydiffusionprocess. The P-layer is kept at the
top because carrier recombination takes place in it. The terminals anode and cathode are taken out of the n-layer and P-
layer respectively. The anode connections are made at the edge in order to provide more surface area for
 the emission of light. A metal film is applied to the bottom of substance to reflect light to the surface of the device
and also to provide connection for the cathode terminal. Finally the structure are provided with an encapsulated
(cover) to protect them from destruction.

CIRCUIT DIAGRAM:

Procedure for V/I characteristics of a Light emitting diode:

1. Connect the Light emitting diode circuit as shown below

2. Slowly increase supply voltage using variable Power supply using coarse and fineknobs.
3. Note down current through the Light emitting diode at increasing values of Lightemitting
diode voltage of 0.5V, 1.0V, 1.5V, 2.5 V.
4. Do not exceed current limit of 30mA else the Light emitting diode may get
damaged.
5. Plot a graph of Light emitting diode voltage Vs Light emitting diode current .0-5V
Variable Supply
Coarse Fine

200
LED 20V DVM
 TABULAR FORM FOR V/I CHARACRISTICS :

S.No Voltage Current

in in

(mV) (mA)

MODEL GRAPH:
Procedure for L/I characteristics of a Light emitting diode:
1. Connect the Light emitting diode circuit as shown below:

2. Slowly increase supply voltage using variable Power supply coarse and fine knobs.

3. Note down the optical power measured by the optical power meter in mW at increasing
current through the Light emitting diode of 1mA to 20 mA at 1 mA step.
4. Do not exceed current limit of 30mA else the Light emitting diode may get damaged.
5. Plot a graph of Light emitting diode intensity V/s Light emitting diode current asshown
in figure2

0-5V Variable Supply

Coarse Fine

100

LED Inbuilt
Optical
power meter
+
200mA
TABULAR FORM:

S.NO Current Power

in in

(mA) (mcd)
 MODEL GRAPH :

PRECAUSTIONS:

1. 1 Make sure that the connections are tight.

2. After the completion of experiment switch off the power supply.

3. Avoid parallax error

RESULT :

We studied V/ I (Electrical ) characteristics and L/ I ( optical ) characteristics of Light Emitting Diode.

VIVA QUESTIONS:

1. How LED is fabricated?

2. What is a Lighting Emitting Diode and howit works?
3. What if LED?
4. What happens when LED in reverse biased?
5. what material is used in LED manufacture?
6. What are the characteristics of LED?
7. What symbol we use for Light Emitting Diode?
8. what is the difference between ordinary diode and Led?
9. What are the I-V Characteristics Light Emitting Diodes