Lab Report

Experiment No: 01
Experiment Name: Introduction to Primary and Universal Logic
Gate
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 20/09/24

Experiment No : 01
Experiment Name : Introduction to Primary and Universal Logic Gate
a. Get familiar with IC and ALU
b. Understanding Different Combinational circuit.
c. Gathering Idea about sequential circuit and logic design.
Expected Skills:
a. Basic knowledge on logic gate implementation.
b. Basic knowledge on Hardware
Tools Required:
a. Various type of IC
b. Breadboard Board
c. LED
Session Details :
To verify the input and output relationships/characteristics of 2-input AND, OR and 1-input NOT
gates.
Required Instruments and ICs:
1. AT-700 Portable Analog/Digital Laboratory (or AT-800 Modular Lab, AT-701 Personal Lab)
2. 7404(NOT), 7408(AND), 7432(OR)
Circuit Diagram:
Procedure:

Step 1: Find out correctly the input and output pin numbers of each gate.
Step 2: Install the components of Fig 1-1 onto the breadboard of AT-700 and check properly the
connections. Remember to connect each IC’s pin 14 to “+5V” of DC power supply of AT-700 and
pin 7 to “GND”.
Step 3: Connect the Data switches “0” and “1” to point A and B of fig. 1-1 respectively. Then
connect 8 bit LED Display’s “0”, “1” and “2” to the output of point Y1, Y2 and Y3 of Fig. 1-1
respectively. The connection diagram is as follows.

Step 4: Change Data Switches “0” and “1” between “0” and “1” position and observe the
situation of 8 bit LED Display “0”, “1” and “2”. The LED is light that indicates the output is in the
logic 1 condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Step 5: Record the results that you have observed into the truth table as follows.

Truth Table :

A B Y1 Y2 Y3

0 0 0 0 1

0 1 0 1 1

1 0 0 1 0

1 1 1 1 0
 Lab Report

Experiment No: 02
Experiment Name: Introduction to Characteristics of NAND and
NOR Gates
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 20/09/24

Experiment No : 02
Experiment Name : Introduction to Characteristics of NAND and NOR Gates.
Session Details :
To verify the input and output relationships/characteristics of 2-input NAND and NOR gates.
Required Instruments and ICs:
1. AT-700 Portable Analog/Digital Laboratory (or AT-800 Modular Lab, AT-701 Personal Lab)
2. 7400(NAND), 7402(NOR)
Circuit Diagram:

Procedure:

Step 1: Find out correctly the input and output pin numbers of each gate.
Step 2: Install the components of Fig 2-1 onto the breadboard of AT-700 and properly check the
connections. Remember to connect IC’s pin 14 to “+5V” of DC power supply of AT-700 and pin 7
to “GND”.
Step 3: Connect the Data switches “0” and “1” to point A and B of fig. 2-1 respectively. Then
connect 8 bit LED Display’s “0” and “1” to the output of point Y1 and Y2 of Fig. 2-1 respectively.
The connection diagram is as follows.

Step 4: Change Data Switches “0” and “1” between “0” and “1” position and observe the
situation of 8 bit LED Display “0” and “1”. The LED is light that indicates the output is in the logic
1 condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Step 5: Record the results that you have observed into the truth table as follows.

Truth Table :

A B Y1 Y2

0 0 1 1

0 1 1 0

1 0 1 0

1 1 0 0
 Lab Report

Experiment No: 03
Experiment Name: Verification of De Morgan’s Theorem
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 30/09/24

Experiment No : 03
Experiment Name : Verification of De Morgan’s Theorem
Session Details :
To verify that A.B = A + B and A+B = A. B by constructing truth tables for both
sides of each of these two equations that describe De Morgan’s Theorem.
Required Instruments and ICs:
1. AT-700 Portable Analog/Digital Laboratory (or AT-800 Modular Lab, AT-701 Personal Lab)
2. 7404(NOT), 7408(AND), 7432(OR), 7400(NAND), 7402(NOR)
Circuit Diagram:

Procedure:

Step 1: Install the components of Fig 4-1 onto the breadboard as in Fig 4-2.
Step 2: Connect the Data switches “0” and “1” to point A and B and output “Y” to LED Display
“0” of fig. 4-1(a). Connect the Data switches “2” and “3” to point A and B and output “Y” to LED
Display “1” of fig. 4-1(b). Refer to Fig 4-2.
Step 3: Change Data Switches “0” and “1” between “0” and “1” position and observe the
situation of 8 bit LED Display “0”. The LED is light that indicates the output is in the logic 1
condition. When LED is dark, it indicates that the output is in the logic 0 condition. Record the
results into the first empty column of Truth Table 4-3.
Truth Table (A):

A B Y= (AB)’ Y= A’ + B’

0 0 1 1

0 1 1 1

1 0 1 1

1 1 0 0

Step 4: Change both of the Data Switches “2” and “3” between “0” and “1” position and observe
the situation of 8 bit LED Display “1”. Record the results into the final empty column of Truth
Table (A). The results of the last two columns must be identical.

Step 5: Install the components of Fig 5-1 onto the breadboard as shown in Fig. 5-2.
Step 6: Connect the Data switches “0” and “1” to point A and B and output “Y” to LED Display
“0” of fig. 5-1(a). Connect the Data switches “2” and “3” to point A and B and output “Y” to LED
Display “1” of fig. 5-1(b). Refer to Fig. 5-2.
Step 7: Change Data Switches “0” and “1” between “0” and “1” position and observe the
situation of LED Display “0”. The LED is light that indicates the output is in the logic 1 condition.
When LED is dark, it indicates that the output is in the logic 0 condition. Record the results into
the first empty column of Truth Table (B).

Truth Table (B):

A B Y= (A+B)’ Y= A’B’

0 0 1 1

0 1 0 0

1 0 0 0

1 1 0 0

Step 8: Change both of the Data Switches “2” and “3” between “0” and “1” position and observe
the situation of 8 bit LED Display “1”. Record the results into the final empty column of Truth
Table (B). The results of the last two columns must be identical.
 Lab Report

Experiment No: 04
Experiment Name: XOR, XNOR gates, Parity Generator & Parity
Checker Circuits
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 30/09/24

Experiment No : 04
Experiment Name : XOR, XNOR gates, Parity Generator & Parity Checker Circuits
Session Details :
To verify the input-output relationships of XOR, XNOR gates by constructing their
truth tables and implement them in parity generator and checker circuits for a 3-bit message.
Required Instruments and ICs:
1. AT-700 portable laboratory
2. 7486(XOR), 7481(XNOR)
Circuit Diagram:
Procedure:

Step 1: Install the components of Fig 3-1 onto the breadboard of AT-700 and properly link the
connections. Remember to connect each IC’s pin 14 to “+5V” of DC power supply of AT-700 and
pin 7 to “GND”.
Step 2: Connect the Data switches “0” and “1” to point x and y of fig. 3-1 respectively. Then
connect 8 bit LED Display’s “0”, and “1” to the outputs of the XOR and XNOR gates of Fig. 3-1
respectively.
Step 3: Change Data Switches “0” and “1” between “0” and “1” position and observe the
situation of 8 bit LED Display “0” and “1”. The LED is light that indicates the output is in the logic
1 condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Step 4: Record the results that you have observed in the following truth table.

Truth Table (A):

A B XOR XNOR

0 0 0 1

0 1 1 0

1 0 1 0

1 1 0 1

Step 5: Install the components of Fig 3-2(a) onto the breadboard of AT-700 and properly link the
connections. The parity generator circuit can also be implemented by the parity checker circuit
of Fig. 3-2(b) with the p input permanently held at logic “0”. Remember to connect each IC’s pin
14 to “+5V” of DC power supply of AT-700 and pin 7 to “GND”.
Step 6: Connect the Data switches “0”, “1” and “2” to point x, y and z of fig. 3-1 respectively.
Then connect 8 bit LED Display’s “0” to point p of Fig. 3-2(a).
Step 7: Change Data Switches “0”, “1” and “2” between “0” and “1” position and observe the
situation of 8 bit LED Display “0”. The LED is light that indicates the output is in the logic 1
condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Step 8: Record the results that you have observed in the following truth table.
Truth Table (B):

A B C P

0 0 0 1

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0

Step 9: Install the components of Fig 3-2(b) onto the breadboard of AT-700 and properly link the
connections. Remember to connect each IC’s pin 14 to “+5V” of DC power supply of AT-700 and
pin 7 to “GND”.
Step 10: Connect the Data switches “0”, “1”, “2” and “3” to point x, y, z and p of fig. 3-2(b)
respectively. Then connect 8 bit LED Display’s “0” to point C of Fig. 3-2(b).
Step 11: Change Data Switches “0”, “1”, “2” and “3” between “0” and “1” position and observe
the situation of 8 bit LED Display “0”. The LED is light that indicates the output is in the logic 1
condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Step 12: Record the results that you have observed in the following truth table.
Truth Table (C):

A B C P CP

0 0 0 0 1

0 0 0 1 0

0 0 1 0 0

0 0 1 1 1

0 1 0 0 0

0 1 0 1 1

0 1 1 0 1

0 1 1 1 0

1 0 0 0 0

1 0 0 1 1

1 0 1 0 1

1 0 1 1 0

1 1 0 0 1

1 1 0 1 0

1 1 1 0 0

1 1 1 1 1
 Lab Report

Experiment No: 05
Experiment Name: Design and Implementation of Full-adder
and Half-adder Circuits Using Basic Logic Gates
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 30/10/24

Experiment No : 05
Experiment Name : Design and Implementation of Full-adder and Half-adder Circuits Using
Basic Logic Gates
Session Details :
Design and implementation of a Half-adder circuit using basic logic gates and cascade such two
circuits to implement a Full-adder circuit.
Required Instruments and ICs:
1. AT-700 portable laboratory
2. 7408(AND), 7432(OR), 7486(XOR)

Circuit Diagram:
Truth Table For Half Adder:

X Y S C

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Truth Table For Full Adder:

X Y Z S C

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1
Procedure:

Half-adder Circuit
Step 1: Install the components for the Half-adder circuit onto the breadboard of AT-700 and
properly link the connections.
Step 2: Connect the Data switches “0”, and “1” to point x and y of the circuit respectively. Then
connect 8 bit LED Display’s “0” and “1” to the points C and S respectively.
Step 3: Change Data Switches “0”, and “1” between “0” and “1” position and observe the
situation of 8 bit LED Display “0” and “1”. Verify that the circuit realizes a Half-adder by
constructing its truth table and comparing it to the one given in the figure.

Full-adder Circuit
Step 1: Install the components for the Full-adder circuit onto the breadboard of AT-700 and
properly link the connections.
Step 2: Connect the Data switches “0”, “1”, and “2” to points x, y and z of the circuit respectively.
Then connect 8 bit LED Display’s “0” and “1” to the points C and S respectively.
Step 3: Change Data Switches “0”, “1” and “2” between “0” and “1” position and observe the
situation of 8 bit LED Display “0” and “1”. Verify that the circuit realizes a Full-adder by
constructing its truth table and comparing it to the one given in the figure.
 Lab Report

Experiment No: 06
Experiment Name: Design and Implementation of Decoder and
Encoder Circuits Using Logic Gates

Course Code: CSE224

Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 01/11/24

Experiment No : 06
Experiment Name : Design and Implementation of Decoder and Encoder Circuits Using Logic
Gates
Session Details :
This experiment is intended for the Implementation of a 2-to-4 decoder and a 4-to-2 encoder
circuits using logic gates.
Required Instruments and ICs:
1. AT-700 portable laboratory
2. 7404(NOT), 7408(AND), 7432(OR)

Circuit Diagram:

Truth Table (A):

EP w1 w0 y0 y1 y2 y3

1 0 0 1 0 0 0

1 0 1 0 1 0 0

1 1 0 0 0 1 0

1 1 1 0 0 0 1

0 x x 0 0 0 0
Truth Table (B):

w3 w2 w1 w0 y1 y0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1
Procedure:

Step 1: Install the components of Fig 8-1(c) onto the breadboard of AT-700 and properly link the
connections. Use two 2-input AND gates to implement a 3-input AND gate. Remember to
connect each IC’s pin 14 to “+5V” of DC power supply of AT-700 and pin 7 to “GND”.
Step 2: Connect the Data switches “0”, “1” and “2” to points En, w0 and w1 of fig. 8-1(c)
respectively. Then connect 8 bit LED Display’s “0”, “1”, “2” and “3” to the points Y0, Y1, Y2 and
Y3 of Fig. 8-1(c) respectively.
Step 3: Change Data Switches “0”, “1” and “2” between “0” and “1” position and observe the
situation of 8 bit LED Display “0”, “1”, “2” and “3”. The LED is light that indicates the output is in
the logic 1 condition. When LED is dark, it indicates that the output is in the logic 0 condition.
Reconstruct and verify the truth table of Fig. 8-1(c).
Step 4: Install the components of Fig 8-2(b) onto the breadboard of AT-700 and properly link the
connections. Remember to connect each IC’s pin 14 to “+5V” of DC power supply of AT-700 and
pin 7 to “GND”.
Step 5: Connect the Data switches “0”, “1”, ”2” and “3” to points w0, w1, w2 and w3 of fig. 8-2(b)
respectively. Then connect 8 bit LED Display’s “0” and “1” to the points Y0 and Y1 of Fig. 8-2(b)
respectively.
Step 6: Change Data Switches “0”, “1”, “2” and “3” between “0” and “1” position and observe the
situation of 8 bit LED Display “0” and “1”. The LED is light that indicates the output is in the logic
1 condition. When LED is dark, it indicates that the output is in the logic 0 condition. Reconstruct
and verify the truth table of Fig. 8-2(a).
 Lab Report

Experiment No: 07
Experiment Name: Design and implementation of multiplexers

Course Code: CSE224

Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 16/11/24

Experiment No : 07
Experiment Name : Design and Implementation of Multiplexers
Session Details : Design and implementation of a 2/1 Multiplexer using logic gates and
hence design a 4/1 Multiplexer using 2/1 Multiplexer.
Equipment Required:
1. AT-700 portable laboratory
2. 7404(NOT), 7408(AND), 7432(OR)
Circuit Diagram:
Procedure:

Step 1: Install the components of Fig 10-1 onto the breadboard of AT-700 and properly
link the connections. Remember to connect each IC’s pin 14 to “+5V” of the DC power
supply of AT-700 and pin 7 to “GND”.

Step 2: Connect the Data switches “0”, “1” and “2” to points s, w0 and w1 fig. 10-1
respectively. Then connect 8 bit LED Display “0”, to the point f of Fig. 10-1.

Step 3: Change Data Switches “0”, “1” and “2” between “0” and “1” position and
observe the situation of 8 bit LED Display “0”. Verify that the output follows the correct
inputs as selected by the selector input s.

Step 4: Install the components of Fig 10-2 onto the breadboard of AT-700 and properly
link the connections. Remember to connect each IC’s pin 14 to “+5V” of the DC power
supply of AT-700 and pin 7 to “GND”.

Step 5: Connect the Data switches to the inputs s0, s1, w0, ... w3 fig. 10-2. Then
connect 8 bit LED Display “0”, to the point f of Fig. 10-2.

Step 6: Change Data Switches between “0” and “1” position and observe the situation
of 8 bit LED Display “0”. The LED is light that indicates the output is in the logic 1
condition. When the LED is dark, it indicates that the output is in the logic 0 condition.
Verify that the output follows the correct inputs as selected by the selector inputs s0 and
s1.
 Lab Report

Experiment No: 08
Experiment Name: Realization of SR Latch Using Integrated
Circuit NAND and NOR gates
Course Code: CSE224
Course Title: Digital Logic Design Lab

Submitted to:

Name: Rimi Akter

Designation: Lecturer
Department of CSE

Submitted by:

Name: Md. Taufikul Islam Rudro

Id: 0242310005101795
Section: 64_M
Semester: Fall 2024
Department of CSE

Submission Date: 6/12/24

Experiment No : 08
Experiment Name : Realization of SR Latch Using Integrated Circuit NAND and NOR
gates
Session Details : To construct SR latch circuits using NAND and NOR gate ICs
separately and verify the input-output relations for both circuits.
Equipment Required:
1. AT-700 portable laboratory
2. 7400(NAND), 7402(NOR)

Circuit Diagram:
Procedure:

Step 1: Install the components of Fig 4-1 onto the breadboard of AT-700 and properly
link the connections. Remember to connect each IC’s pin 14 to “+5V” of the DC power
supply of AT-700 and pin 7 to “GND”.

Step 2: Connect the Data switches “0”, “1” and “2” to point E, S and R of fig. 4-1
respectively. Then connect 8 bit LED Display “0”, and “1” to the outputs Q and Q’ of Fig.
4-1 respectively.

Step 3: Change Data Switches “0”,”1” and “2” between “0” and “1” position and observe
the situation of the 8 bit LED Display “0” and “1”. The LED is light that indicates the
output is in the logic 1 condition. When the LED is dark, it indicates that the output is in
the logic 0 condition.
Step 4: Record the results that you have observed in the following truth table.

E S R Q(t+1)

0 X X No change

1 0 0 No change

1 0 1 0

1 1 0 1

1 1 1 X

Step 5: Repeat Step 1 to Step 4 for the circuit of Fig 4-2.