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Study of Logic Gates AND HALF ADDER FULL ADDER

The document outlines an experiment to study logic gates and verify their truth tables using various integrated circuits (ICs) such as AND, OR, NOT, NAND, NOR, and EX-OR gates. It includes the components required, the theory behind logic gates, their operations, and the procedure for conducting the experiment. The result confirms that the truth tables of different logic gates have been verified successfully.

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0% found this document useful (0 votes)
18 views6 pages

Study of Logic Gates AND HALF ADDER FULL ADDER

The document outlines an experiment to study logic gates and verify their truth tables using various integrated circuits (ICs) such as AND, OR, NOT, NAND, NOR, and EX-OR gates. It includes the components required, the theory behind logic gates, their operations, and the procedure for conducting the experiment. The result confirms that the truth tables of different logic gates have been verified successfully.

Uploaded by

boss
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Exp No:11

Date:

STUDY OF LOGIC GATES AND HALF ADDER/ FULL ADDER


AIM:
To verify the truth tables of different logic gates.
COMPONENTS REQUIRED:
1. IC’s 74LS08, 74LS32, 74LS04, 74LS00, 74LS02, 74LS86 ( each 1No)
2. Light Emitting Diode (LED)
3. Bread Board
4. Connecting wires as required
5. Fixed Power Supply (0 - 5V)
THEORY:

A logic gate is an electronic circuit which makes logical decisions. To arrive at this
decisions, the most common logic gates used are OR, AND, NOT, NAND, and NOR gates. The
NAND and NOR gates are called as the universal gates. The exclusive OR gate is anotherlogic
gate which can be constructed during basic gates such as AND, OR and NOT gates.
Logic gates have two or more inputs and only one output except for the NOT gate, which has
only one input. The output signal appears only for certain combinations of the input signal.
The manipulation of binary information is done by the gates. The logic gates are the building
blocks of hardware which are available in the form of various IC families. Each gate has a
distinct logic symbol and its operation can be described by means of an algebraic function. The
relationship between the input and output variables of each gate can be represented in tabular
form called truth table.

AND: This operation is represented as ‘dot’. The IC number of AND gate is 74LS08. The output of
logical operation AND is 1 if and only if both inputs are 1 in all other cases it is 0.
Z=A.B
Inputs Output

A A B Y
Y 0 0 0
B
Y=A.B 0 1 0
1 0 0
74 LS 08
1 1 1
OR: This operation is represented as ‘plus’. The IC number of OR gate is 74LS32. The output of
logical operation OR is 1 if any one of the input is 1. If both the inputs are 0, the output is 0.
Z=A+B

Inputs Output
A B Y
A
0 0 0
Y 0 1 1
B 1 0 1
Y=A+B 1 1 1
74 LS 32

NOT: This operation is represented by a ‘bubble’ before a common gate. The IC number of NOT
gate is 74LS04. The output NOT gate is 1 if the input is 0 and vice versa
Z=A

Input Output
A Y
0 1
Y=A 1 0

74 LS 04
NAND: This operation is a compliment of the AND function. It is graphically represented by an AND
gate followed by a bubble. The IC number of NAND gate is 74LS00. The output is 1, if any of the
input is 0.The output is 0 if both the inputs are 1.
Inputs Output
Z=A.B
A B Y
0 0 1
0 1 1
A
Y 1 0 1
A 1 1 0
Y=A.B

74 LS 00
NOR: This operation is a compliment of the OR function. It is graphically represented by an OR gate
followed by a bubble. The IC number of NOR gate is 74LS02. The output of logical operation NOR
is 0, if any one of the input is 1. The output is 1, if both the inputs are 0.
Z=A+B

Inputs Output
A
A B Y
Y 0 0 1

B 0 1 0
Y=A+B 1 0 0
74 LS 02
1 1 0

EX - OR: The EXCLUSIVE – OR gate has a graphic symbol similar to that of OR gate except for the
additional curved lines on the input side. If both the inputs are same the output is 0 otherwise the
output is 1.
Z=A.B+A.B

Inputs Output
A
A B Y
Y 0 0 0
0 1 1
B
Y=A B 1 0 1
74 LS 86
1 1 0
PIN DIAGRAMS OF ALL LOGIC GATES:
AND GATE OR GATE

14 13 12 11 10 9 8 14 13 12 11 10 9 8

VCC VCC

IC 74 LS 08 IC 74 LS 32

GND GND

1 2 3 4 5 6 7 1 2 3 4 5 6 7

NOT GATE NAND GATE

14 13 12 11 10 9 8 14 13 12 11 10 9 8

VCC VCC

IC 74 LS 04 IC 74 LS 00

GND GND

1 2 3 4 5 6 7 1 2 3 4 5 6 7

NOR GATE EX - OR GATE

14 13 12 11 10 9 8 14 13 12 11 10 9 8

VCC VCC

IC 74 LS 02 IC 74 LS 86

GND GND

1 2 3 4 5 6 7 1 2 3 4 5 6 7
Digital Electronics Lab SSIT

PROCEDURE:
1. The IC’s are placed on the bread board.
2. A voltage of +5V is applied to pin no.14 and –Ve is applied to pin no.7.
3. Inputs and Outputs are connected according the gates which are taken.
4. For the input 1 we have to connect the input terminal
to +5V and for 0to –Ve.
5. Output is verified in LED. If the LED is ON the output is 1, if OFF output is 0.
6. According to the Logic gates truth table we have to verify the inputs and outputs.

Half Adder using basic gates:-

S  AB  AB

SA

 BC

 AB
Full Adder using basic gates:-

5
Digital Electronics Lab SSIT

Half Adder using NAND gates only:-

Full Adder using NAND gates only:-

RESULT:
The truth tables of different Logic gates are verified.

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