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Lab Manual - LIC LAB

LIC lab manual

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20 views40 pages

Lab Manual - LIC LAB

LIC lab manual

Uploaded by

ras700060
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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LAB MANUAL

LINEAR INTEGRATED CIRCUITS


LAB
(SUBJECT CODE-2021408)

NEW GOVERNMENT POLYTECHNIC


PATNA - 13
1
LINEAR INTEGRATED CIRCUITS LAB
(SUBJECT CODE-2021408)

LIST OF EXPERIMENTS

1. (a) Verify the open loop transfer characteristics of Op-Amp using IC- 741. Also

determine gain of

(b) Inverting amplifier using IC-741 on breadboard.

(c) Non-inverting amplifier using IC-741 on breadboard.

(d) Buffer amplifier using IC-741on breadboard.

2. Design Wein Bridge Oscillator using IC-741on bread board and determine the

frequency of oscillation.

3. Design Square wave generator using IC-741 on breadboard and calculate the duty

cycle of the generated waveform.

4. Design an Astable Multivibrator using IC-555 Timer on breadboard and calculate

the duty cycle and pulse width of the generated waveform.

5. Design a Monostable multivibrator using IC-555 Timer on breadboard and calculate

the pulse width of the generated waveform.

6. Design a 2nd order active low pass filter using IC 741 Op-Amp on breadboard.

7. Design a 2nd order active high pass filter using IC 741 Op-Amp on breadboard.

8. Design a 2nd order active band pass filter using IC 741 Op-Amp on breadboard.

9. Design a 2nd order active band reject filter using IC 741 Op-Amp on breadboard.

10. Calculate the lock range and capture range of PLL using IC-565

11. Construct Sample and Hold circuit using IC-741on breadboard.

2
EXPERIMENT NO. 1
a) DETERMINE GAIN OF INVERTING AMPLIFIER USING IC-741 ON BREAD
BOARD

AIM: To design and setup an inverting amplifier circuit with OP AMP 741C for a gain of
3, plot the input and output waveforms, observe the phase reversal, measure the gain.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl .No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0 - 1MHz) 1

3 Oscilloscope/DSO 1

4 Bread board 1

5 IC 741C 1

6 Resistors 2 (1KΩ, 3 KΩ)

7 Probes and connecting wires As required.

Operational Amplifier (741-type)

I+ Vcc
V+ + 7
3
6
Av
I-
V- - 4
2 V0
-Vee

Fig. Symbolic notation

3
PIN CONFIGURATION

-Offset Null 1 8 NC

Invertig Input 2 7 +Vcc


IC-741
Non-Invertig 3 6 Output
Input

-Vee 4 5 +Offset Null

PRINCIPLE:

It is a closed loop mode application of Op-Amp and employs negative feedback. The
Rf and Ri are the feedback and input resistance of the circuit respectively. The input
terminals of the Op-Amp draws no current because of the large differential input impedance.
The potential difference across the input terminals of an Op-Amp is zero because of the
large open loop gain. Due to these two conditions, the inverting terminal is at virtual ground
potential. So the current flowing through Ri and Rf are the same.

Ii = If

Vin Vo
That is =−
Ri Rf

Vo R
Therefore = Av = − f
Vin Ri

Here the –Ve sign indicates that the output will be an amplified wave with 1800
phase shift (inverted output). By varying the Rf or Ri, the gain of the amplifier can be varied
to any desired value.

PROCEDURE:

1. Check the components.


2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 1 Vpp / 1 KHz sine wave as input.
5. Observe input and output on the two channels of the oscilloscope simultaneously.
6. Note down and draw the input and output waveforms on the graph.
7. Verify the input and output waveforms are out of phase.

4
8. Verify the obtained gain is same as designed value of gain.

(Note: The experiment may be repeated for different values of gain)

CIRCUIT DIAGRAM:

RF = 3k

+15V
R1 = 1k
- 7
2
Av Vo
Vin 3 6
+ 4

-15V

DESIGN:
Vo R
Gain of an inverting amplifier Av = =− f
Vin Ri
The required gain = -3,
R
That is Av = − f = -3
Ri
Let Ri = 1KΩ, Then Rf = 3KΩ

RESULT:

Vin = 1 Vpp

Vo=?

Vo
Gain, Av = =?
Vin

Observed phase difference between the input and the output on the CRO =?

GRAPH:

5
4
Output Input
3
2

Voltage (V)
1
0
-1
-2
-3
-4
0 0.5 1 1.5 2 2.5 3
-3
Time (s) x 10

b) DETERMINE GAIN OF NON- INVERTING AMPLIFIER USING IC-741 ON


BREAD BOARD

AIM: To design and setup a non-inverting amplifier circuit with OP-AMP IC 741C for a
gain of 4, plot the input and output waveforms, observe the phase, measure the gain.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl .No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0 - 1MHz ) 1

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6
6 Resistors 2 ((1KΩ, 3 KΩ)

7 Probes and connecting wires As required.

PRINCIPLE:

It is a linear closed loop mode application of op-amp and employs negative feedback. The
Rf and Ri are the feedback and input resistance of the circuit respectively. There will be no
phase difference between the output and input. Hence it is called non-inverting amplifier.

Vo R
Av = = 1+ 2
Vin R1

Here the +Ve sign indicates that the output will be an amplified wave in phase
with the input. By varying the R2 or R1, the gain of the amplifier can be varied to any desired
value.

PROCEDURE:

1. Check the components.


2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 1 Vpp / 1 KHz sine wave as input.
5. Observe input and output on the two channels of the CRO simultaneously.
6. Note down and draw the input and output waveforms on the graph.
7. Verify the input and output waveforms are in phase.
8. Verify the obtained gain is same as designed value.

(Note: The experiment may be repeated for different values of gain)

CIRCUIT DIAGRAM

R2 = 3k

+15V
R1 = 1k
7
2
-
Av Vo
3 6
+ 4

Vin -15V

7
DESIGN:
Vo R
Gain of an inverting amplifier Av = = 1+ 2
Vin R1
Let the required gain be 4,
R
Therefore Av = 1 + 2 = 4
R1
R2
=3
R1
Take R1= 1KΩ, Then R2= 3KΩ

RESULT:

Vin = 1Vpp

Vo = ?

Vo
Gain Av = =?
Vin
Observed phase difference between the input and the output on the CRO =?

GRAPH:

0.06
input output
0.04

0.02
Voltage (V)

-0.02

-0.04

-0.06
0 0.5 1 1.5 2
Time (s) -3
x 10

8
c) DETERMINE GAIN OF VOLTAGE FOLLOWER USING IC-741 ON BREAD
BOARD

AIM: To design and setup a buffer (voltage follower) circuit with Op-Amp IC 741C and
observe the input and output waveforms.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0- 1MHz) 1

3 Oscilloscope / DSO 1

4 Bread board 1

5 IC-741 1

6 Probes and connecting wires As required.

PRINCIPLE:

A voltage follower (also called a unity-gain amplifier or buffer amplifier or


isolation amplifier) is an op-amp circuit which has a voltage gain of 1. This means that the
9
op amp does not provide any amplification to the signal. It is called a voltage follower
because the output voltage follows the input voltage; means the output voltage is same as the
input voltage. Though the gain is unity, this circuit offers high input impedance and low
output impedance and hence it is used as buffer , which is used to isolate a low impedance
load from a voltage source to eliminate any loading that might occur.

CIRCUIT DIAGRAM

+15V
7
2 -
Av Vo
3 6
+ 4

Vin -15V

DESIGN:

The voltage follower is a non-inverting amplifier with unity gain.

R2
Av = 1 + =1
R1
R2
Or =0
R1

Therefore R 2 = 0

PROCEDURE:

1. Check the components.


2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 2Vpp/ 1 KHz sine wave as input.
5. Observe input and output on the two channels of the oscilloscope simultaneously.
6. Note down and draw the input and output waveforms on the graph.
7. Verify that the input and output waveforms are same in magnitude and phase.

RESULT:
OBSERVATION:
Vi =
Vo =

10
Vo
Voltage gain, Av = =?
Vin
Phase difference between input and output Waveforms =

GRAPH:

0.5
Voltage (V)

-0.5

-1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Time (s) x 10
-3

**

11
EXPERIMENT NO. 2
DESIGN WEIN BRIDGE OSCILLATOR USING IC-741 ON BREAD BOARD AND
DETERMINE THE FREQUENCY OF OSCILLATION
AIM: To design the Wien Bridge oscillator using OP-AMP IC for producing a frequency of
fo = 1000Hz.
EQUIPMENTS/COMPONENTS REQUIRED:

Equipment and
S.No Range Quantity
Components
1. Resistor 1 KΩ, 5 KΩ, 10 KΩ 2, 1, 1
2. Capacitor 0.001µF 2
3. Op-amp IC741 1
4. Dual RPS (0-30)V 1
5. AFO - 1
6. CRO - 1
7. Bread board - 1
8. Connecting wires - few

THEORY:
The Wien bridge oscillator is the most commonly used audio frequency oscillator
12
because of its simplicity and stability. Figure shows the Wien bridge oscillator in which
Wien bridge circuit is connected between the amplifier input terminals and the output
terminal. The bridge has a series RC network in one arm and a parallel RC network in the
adjoining arm. In the remaining two arms of the bridge, resistors RA and RB are connected.
The phase angle criterion for oscillation is that the total phase shift around the circuit must
be 0o. This condition occurs only when the bridge is balanced. The frequency of oscillation
fo is exactly the resonant frequency of the balanced Wien bridge and is given by,
1
fo =
2π R C

DESIGN:
fo=159.155 kHz
1
fo =
2π R C
R1= R2= R and RB = 2RA
C1 = C2 = C
Choose, R = 1 KΩ
C=0.001μ F
Take RA=5 KΩ and RB=2RA= 10 KΩ

CIRCUIT DIAGRAM:

R1 C1

Vcc

- 7
2
Av Vo
3 6
+ 4
R2 C2
RA -Vcc

RB

TABULATION:

Sweep – X-Axis Magnitude – Y-Axis

13
Time
Time/Div. No. of Frequency Magnitude/Divisi No. of Amplitude
Period T
(s) Divisions f=1/T on (V) Divisions (V)
(s)

MODEL GRAPH:

PROCEDURE:
1. Construct the circuit with the values obtained in the design.
2. Observe the output wave form on an Oscilloscope. Adjust Rf to obtain a sine wave output.
3. Measure the frequency of oscillator and voltage amplitude.

RESULT:
Thus the Wein bridge oscillator is designed to produce the required frequency.

OBSERVATION:

14
Frequency of oscillation fo

i. Theoretical = ii. Practical =

**

EXPERIMENT NO. 3

DESIGN SQUARE WAVE GENERATOR USING IC-741 ON BREAD BOARD AND


CALCULATE THE DUTY CYCLE OF THE GENERATED WAVEFORM

AIM: Design Square wave generator using IC-741 on breadboard and calculate the duty
cycle of the generated waveform.
Equipments/Components Required:

Sl .No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0- 1MHz) 1

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

15
6 Resistors 1 KΩ- 3Nos

7 Capacitor 0.001 μF

8 Probes and connecting wires As required.

PRINCIPLE:

Waveform generator using IC741 is a circuit which generates Sine wave, Square wave and
Triangular wave. This circuit is a combination of Wien Bridge oscillator, Zero crossing
detector (Comparator with zero reference voltage) and Integrator. The Wien Bridge
oscillator generates Sine wave which is fed to the input of Zero crossing detector. This
detector gives the square wave output which is connected to the input of the Integrator
which in turn produces the Triangular wave output.
The frequency of oscillations of the Square wave is given by
1
fo =
2π R C

It is the open loop/ saturation mode operation of op-amp. Here the signal is given the non-
inverting terminal. So the output signal is in phase with the input signal. Such a circuit
is called non-inverting zero crossing detector. In open loop configuration, the gain of the
Op-Amp is very high, so when the input voltage is above zero voltage, output of the circuit
goes to +Vsat which is approximately +13V. Similarly when the input voltage is below zero
voltage, the output goes to -Vsat which is approximately -13V.

CIRCUIT DIAGRAM:

Vcc
7
-
2
A Vo
C 3 6
+
4
-Vcc

R1
R2

PROCEDURE:
1. Switch OFF the power supply.
2. Connect the components/equipment as shown in the circuit diagram.
3. Switch ON the power supply.
4. Connect the input to the channel-1 of CRO and output to the channel-2 of CRO.
5. Observe the square wave output at channel-2 and note down the amplitude and time
period, T of the waveform.
16
6. Verify that the frequency of oscillation of both the input and the output waves is same.
Also, verify that both the input and the output waves are in same phase.
7. Plot the output waveform in accordance with the input waveform.

CALCULATIONS:
1
Theoretical Frequency of Oscillation fo = 2π R C =
1
Practical Frequency of Oscillation fo = T =
EXPECTED WAVEFORMS:

**
EXPERIMENT NO. 4
DESIGN AN ASTABLE MULTIVIBRATOR USING IC-555 TIMER ON
BREADBOARD AND CALCULATE THE DUTY CYCLE AND PULSE WIDTH OF
THE GENERATED WAVEFORM

AIM: Design an Astable Multivibrator using IC-555 Timer and calculate the duty cycle and
pulse width of the generated waveform.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0- 1MHz) 1

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

17
6 Resistors 7.5 KΩ - 2 Nos

7 Capacitors 0.1µF, 0.01µF

8 Probes and connecting wires As required.

PRINCIPLE:

In this circuit, the Op-Amp is operated in saturation mode and the output
swings between +Vsat and –Vsat giving square wave output. This circuit is also called
free running oscillator or square wave generator. A positive feedback with feedback
R1
factor  = is provided to the non-inverting terminal. When Vo= +Vsat, the capacitor
R1 + R2
C starts to charge to +Vsat through R. when the capacitor voltage crosses +βVsat,
output switches from +Vsat to –Vsat. Now the voltage appearing at the non-inverting
terminal is –βVsat and capacitor discharges through R towards -Vsat. When the capacitor
voltage crosses –βVsat, the output switches from –Vsat to +Vsat and this process continues
to generate square wave output with time period T = Ton + Toff = 2RC ln[(1+β)/(1-β)].
In asymmetrical astable multivibrators, the charging and discharging time of capacitor is
made unequal to get asymmetrical square wave with different Ton and Toff.

PROCEDURE:

1. Check the components.


2. Setup the symmetric astable multivibrator circuit on the breadboard and check the
connections.
3. Switch on the power supply.
4. Observe output and capacitor voltage on two channels of the
oscilloscope simultaneously.
5. Draw the waveforms on the graph.

18
6. Measure the frequency of oscillation and duty cycle.
7. Repeat the procedures for asymmetric astable multivibrator.

(Note: The experiment may be repeated for different values of frequency and duty cycle)

DESIGN:

OBSERVATION:

Vo (p-p) =?
f=?
TON
Duty Cycle = =?
TON + TOff
**
EXPERIMENT NO. 5

DESIGN A MONOSTABLE MULTIVIBRATOR USING IC-555 TIMER ON


BREADBOARD AND CALCULATE THE PULSE WIDTH OF THE GENERATED
WAVEFORM

AIM: Design a Monostable multivibrator using IC-555 Timer and calculate the pulse width
of the generated waveform.
EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 7.5 KΩ

3 Capacitor 0.1µF, 0.01µF

4 IC 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

19
8 Bread board 1

9 Connecting wires and probes As required

PRINCIPLE:

The monostable multivibrator is also called as one shot multivibrator. The circuit produces
a single pulse of specified duration in response to each external trigger pulse. It always has
one stable state (+Vsat). When an external trigger is applied, the output state changes and the
new state is called quasi-stable state (-Vsat). The circuit remains in this state for a fixed
interval of time and then it returns to the original state after this interval. This time interval is
determined discharging of the capacitor from 0.7V to -βVsat. The time period of quasi-stable
state or the delay is given by
T = 0.69RC

PROCEDURE:

1. Check the components.


2. Setup the monostable multivibrator circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Put the function generator output to square wave mode. Adjust the amplitude to 5V.
5. Observe trigger input, output and capacitor voltage on different channels of the
oscilloscope simultaneously.
6. Draw the waveforms on the graph.
7. Measure the time delay.

(Note: The experiment may be repeated for different values of time delay)

CIRCUIT DIAGRAM:

DESIGN:
20
Thigh = 1.1RAC = 1.1(7.5 X 103 )(0.1 X 10-6 ) = 0.825 ms

OBSERVATIONS:

Measured time period or delay =?

GRAPH:

**

EXPERIMENT NO. 6

DESIGN A SECOND ORDER ACTIVE LOW PASS FILTER USING IC741 OP-AMP
ON BREAD BOARD

AIM: Design a second order active low pass filter using IC741 Op-Amp
EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Values Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 2.4k, 4.8k, 10k, 10k 1 each

3 Capacitor 0.1μF, 0.005μF 1 each

4 IC 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

7 Bread board 1

8 Connecting wires and probes As required

21
THEORY:
A low-pass filter is an electronic filter that passes low frequency signals but
attenuates (reduces the amplitude of) signals with frequencies higher than the cutoff
frequency. The actual amount of attenuation for each frequency varies from filter to filter. A
low-pass filter is the opposite of a high-pass filter. A band- pass filter is a combination of a
low-pass and a high-pass. Low-pass filters exist in many different forms, including
electronic circuits (such as a hiss filter used in audio), anti-aliasing filters for conditioning
signals prior to analog-to-digital conversion, digital filters for smoothing sets of data,
acoustic barriers, blurring of images, and so on. Low-pass filters provide a smoother form of
a signal, removing the short-term fluctuations, and leaving the longer-term trend.

DESIGN:
For a 2nd order Filter,
F C = 1 / 2π RC Hz Let FC = 1 KHz and R1 = R2 = R = 1.5 KΩ and C1 = C2 = C
1 x 103 = 1 / 2π x 1.5 x 103 x C
C = 0.1µF
R
The pass band gain of the filter, A f =1 + A
RB
For a second order filter, AF = 1.586,
R
1.586= 1 + A
RB

Let RB = 10KΩ

1.586= (1+R A /10KΩ)

RA = 5.86 KΩ

PROCEDURE:
1. Connect the Low pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1-V (p-p) and measure the output voltage for different
frequency.
3. Plot the frequency response 20 log (Vo/Vi ) versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency.

CIRCUIT DIAGRAM:

22
C1

VCC
R1 R2 2
_
7
6
AV VO
AC C2 3
+ 4

VEE

RA
RB

TABULATION:
Input Voltage Vi= (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)

MODEL GRAPH:

23
RESULT:
Thus, the frequency response of a second order low pass filter are plotted.

OBSERVATION:

Cutoff frequency of LPF

i. Theoretical = ii. Practical =

**

24
EXPERIMENT NO. 7
DESIGN A SECOND ORDER ACTIVE HIGH PASS FILTER
AIM: To obtain the frequency response of an active high pass filter for the desired cut off
frequency.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 10 KΩ - 4Nos

3 Capacitor 0.1μF;0.01μF 1 each

4 IC 741 1

5 Function generator (0-1)MHz 1


25
6. Oscilloscope 1

8 Bread board 1

9 Connecting wires and probes As required

THEORY:
HPF is the complement of the Low pass filter and can be obtained simply by
Interchanging R and C in the low pass configuration. The frequency response of a
second-order high-pass filter is opposite to that of a second-order low-pass filter. A high-
pass filter attenuates the output voltage for all frequencies below the cutoff frequency.
Above the cutoff frequency, the magnitude of the output voltage is constant.

DESIGN:
For a 2nd order Filter,
F C = 1/2πRC Hz Let FC = 1 KHz and R1 = R2 = R = 1.5 KΩ and C1 = C2 = C
1 x 103 = 1 / 2π x 1.5 x 103 x C
C = 0.1µF
The pass band gain of the filter,
R
A f =1 + A
RB
For a second order filter, AF = 1.586,
R
1.586= 1 + A
RB
Let R1 = 10KΩ
1.586= (1+R A/10 KΩ )
RF = 5.86 KΩ

CIRCUIT DIAGRAM:

26
R1

VCC
C1 C2 3
+ 7
2 6
AV Vo
AC R2
2
_
4

VEE

RA
RB

PROCEDURE:
1. Connect the high pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1-V(p-p) and measure the output voltage for different
frequency.
3. Plot the frequency response 20 log(Vo/Vi ) versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency.
TABULATION:
Input Voltage Vi= (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)

MODEL GRAPH:

27
RESULT:
Thus, the frequency response of a second order high pass filter is plotted.

OBSERVATION:
Cutoff frequency of HPF

i.Theoretical = ii. Practical =

**

28
EXPERIMENT NO. 8

DESIGN AND TESTING OF SECOND ORDER ACTIVE BAND PASS


FILTER
AIM: To obtain the frequency response of an active band pass filter for the desired cut off
frequency.
EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 10 KΩ – 4 Nos

3 Capacitor 0.1μF;0.01μF 1 each

4 IC 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

8 Bread board 1

9 Connecting wires and probes As required

THEORY:
A wide band pass filter can be formed by cascading a HPF and LPF section. If the
HPF and LPF are of the first order, then the band pass filter (BPF) will have a roll off
rate of -20 dB/decade. A wide band pass filter formed by cascading I order HPF and I order
LPF is shown in the circuit diagram.

DESIGN:
For a 1st order Filter,
1
F= Hz
2RC

(i) For High pass section


Let FL = 400Hz and R = 7.95 KΩ
400 = 1 / 2π x 7.95 x 103 x C
C = 0.05µF
(ii) For low pass section
Let FH = 2 KHz and R = 7.95 kΩ
2 x 103 = 1 / 2π x 7.95 x 103 x C
C = 0.01µF

29
The pass band gain of the filter,
Rf
Af = 1 +
R2

For a first order filter, AF =2, Let R1 = 10KΩ


RF = 10 kΩ

The Center frequency FC = FH  FL

PROCEDURE:

1. Connect the Band pass filter circuit as shown in the diagram.


2. Give an input signal Vi of 1 V(p-p) and measure the output voltage for different
frequency.
3. Plot the frequency response 20 logVo/Vi versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency fh and fl .

CIRCUIT DIAGRAM:

R2

VCC
R1 C2 3
+ 7
6
AV Vo
R3
AC C1 2
_
4

VEE

RA
RB

30
TABULATION:
Input Voltage Vi =…… (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)


1
2
3
4

MODEL GRAPH:

31
RESULT:
Thus, the frequency response of a first order band pass filter is plotted.

OBSERVATION:
Lower cut-off frequency
i. Theoretical = ii. Practical =
Upper cut-off frequency
i. Theoretical = ii. Practical =

**

32
EXPERIMENT NO. 9

DESIGN AND TESTING OF SECOND ORDER ACTIVE BAND


REJECT FILTER

OBJECTIVE: To design an active band reject filter circuit and observe its frequency
response.

EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 10 KΩ

3 Capacitor 0.1μF;0.01μF 1 each

4 IC µA 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

7. Diode 1N 4001 2

8 Bread board 1

9 Connecting wires and probes As required

THEORY:

This kind of filter passes all frequencies above and below a particular range set by the
component values. Stopband filters can be constructed using a low-pass and a high pass filter.
However, rather than the cascaded configuration used for the pass-band filter, a parallel
arrangement is required. A low-frequency fl can pass through the low-pass filter, and a
higher-frequency f2 can use the parallel path. However, a frequency such as f o in the
reject-band is higher than the low pass critical frequency and lower than the high-
pass critical frequency, and is therefore prevented from contributing to the levels of Vo above
0.707Vmax.

33
CIRCUIT DIAGRAM:

R3

C2 C1
Vcc
C
2
- 7

6
Av Vo
R2 R1
AC + 4
Vin 3

-Vcc

RB
RA

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Apply sine wave of amplitude 4Vp-p to the non-inverting input terminal.
3. Values the input signal frequency.
4. Note down the corresponding output voltage.
5. Calculate gain in db.
6. Tabulate the values.
7. Plot a graph between frequency and gain. 8. Identify stop band and pass band from the
graph.

34
OBSERVATIONS:

MODEL GRAPH:

RESULT:
The response of band pass filter and band reject filter are verified, plotted and tabulated the
values in tabular column.

**

35
EXPERIMENT NO. 10

CALCULATE THE LOCK RANGE AND CAPTURE RANGE OF PLL


USING IC-565
AIM: Calculate the lock range and capture range of PLL using IC-565.
EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 10 KΩ, 680 Ω - 2 Nos

3 Capacitor 0.1μf, 0.01μF, 1μF

4 IC 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

8 Bread board 1

9 Connecting wires and probes As required

THEORY:
The figure shows the phase-locked loop (PLL) in its basic form. The PLL consists of i) a
phase detector ii) a low pass filter and iii) a voltage controlled oscillator as shown. The phase
detector, or comparator compares the input frequency fIN with the feedback frequency fOUT.
The output of the phase detector is proportional to the phase difference between f IN and fOUT.
The output voltage of a phase detector is a dc voltage and therefore is often referred to as the
error voltage. The output of the phase detector is then applied to the low-pass filter, which
removes the high-frequency noise and produces a dc level. This dc level, in turn, is the input
to the voltage-controlled oscillator (VCO). The filter also helps in establishing the dynamic
characteristics of the PLL circuit. The output frequency of the VCO is directly proportional to
the input dc level. The VCO frequency is compared with the input frequencies and adjusted
until it is equal to the input frequencies. In short, the phase-locked loop goes through three
states: free running, capture, and phase lock. Before the input is applied, the phase-locked
loop is in the free-running state. Once the input frequency is applied, the VCO frequency
starts to change and the phase-locked loop is said to be in the capture mode. The VCO
frequency continues to change until it equals the input frequency, and the phase-locked state.
When phase locked, the loop tracks any change in the input frequency through its repetitive
action. Lock Range: The range of frequencies over which the PLL can maintain lock with
incoming signal is called the “Lock Range” or “Track Range” FL= 8f0/V where V= + V – (–
V), where f0 is free running frequency. Capture range: The range of frequencies over which
the PLL can acquire lock with an input signal is called the capture range.
36
CIRCUIT DIAGRAM:

PROCEDURE:

1. Apply +5v to pin 10 and –5v to pin 1 of LM565


2. Connect R1= 10KΩ resistor from pin 8 to10 and C1 =0.01µ F capacitor from pin 9 to 1.
3. Connect 680Ω resistor from pin 2 & pin 3 to ground.
4. Connect pin 4 (VCO output) to CRO and measure its frequency. This frequency is called
the free running frequency, fo.
5. Calculate f0 theoretically using the formula f0 = 1.2 /4R1C1 and compare it with practical
value.
6. Connect the circuit as shown in above figure.
7. Apply square wave at the input with amplitude of 2Vpp and connect it to channel 1 of CRO.
8. Connect pin 4 (VCO output) to channel 2 of CRO.
9. Vary the input signal frequency in steps and measure its corresponding o/p frequency.
10.Find the lock range and capture range from the obtained data.

TABULAR COLUMN:

INPUT
OUTPUT
SL. NO FREQUENCY IN FC IN Hz FL IN Hz
FREQUENCY IN Hz
Hz

RESULT:
Free running frequency, lock range and capture range of PLL are measured practically and
compared with theoretical values.

**
37
EXPERIMENT NO. 11

CONSTRUCT SAMPLE AND HOLD CIRCUIT USING IC-741 ON BREADBOARD.


AIM: Construct Sample And Hold Circuit Using IC-741 On Breadboard.
EQUIPMENTS/COMPONENTS REQUIRED:

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 10KΩ- 2 Nos

3 Capacitor 0.1μF

4 IC-741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

7. Transistor BS170 (NPN)

8 Bread board 1

9 Connecting wires and probes As required

THEORY:
In electronics, a sample and hold (S/H, also "follow-and-hold") circuit is an analog device
that samples (captures, grabs) the voltage of a continuously varying analog signal and holds
(locks, freezes) its value at a constant level for a specified minimal period of time. Sample
and hold circuits and related peak detectors are the elementary analog memory devices. They
are typically used in analog-to-digital converters to eliminate variations in input signal that
can corrupt the conversion process. A typical sample and hold circuit stores electric charge in
a capacitor and contains at least one fast FET switch and at least one operational amplifier.
To sample the input signal the switch connects the capacitor to the output of a buffer
amplifier. The buffer amplifier charges or discharges the capacitor so that the voltage across
the capacitor is practically equal, or proportional to, input voltage. In hold mode, the switch
disconnects the capacitor from the buffer. The capacitor is invariably discharged by its own
leakage currents and useful load currents, which makes the circuit inherently volatile, but the
loss of voltage (voltage drop) within a specified hold time remains within an acceptable error
margin.
The MOSFET is used here as the control switch for applying the voltage pulse. The Gate
terminal of MOSFET is connected with a controlled pulsed signal generator. Astable
multivibrator can be used to produce frequency. This astable frequency switch ON-OFF Very
fast the MOSFET. By the ON-OFF, ON-OFF of the MOSFET a pulsed form of the input
voltage signal is applied to the Non-Inverting terminal of Op-amp.
38
CIRCUIT DIAGRAM:

PROCEDURE:

1. Check the components.


2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 12 Vpp / 1 KHz sine wave as input.
5. Observe input and output on the two channels of the CRO simultaneously.
6. Note down and draw the input and output waveforms on the graph.

39
RESULT:
Thus the sample and hold circuit constructed and output waveform is observed.

SAMPLE GRAPH:

**

40

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