Microprocessor and Interfacing (3160712) 230183107021

Degree Engineering

A Laboratory Manual for

Microprocessor and Interfacing

(3160712)

[ B.E. (Computer Engineering) : Semester - 6 ]

Enrollment No
Name
Branch
Academic Term
Institute Name

Directorate of Technical Education, Gandhinagar,

Gujarat

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Microprocessor and Interfacing (3160712) 230183107021

GOVERNMENT ENGINEERING COLLEGE DAHOD

Affiliated to GUJARAT TECHNOLOGICAL UNIVERSITY

COMPUTER ENGINEERING DEPARTMENT

CERTIFICATE
This is to certify that bearing enrollment

number 230183107021 has satisfactorily completed the term work under the program

B.E Computer Engineering of 6th semester course(3160712) for the academic term

ODD 2024 - 25 ending in December 2023.

Date of Submission

/ /

Sign of Faculty

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Microprocessor and Interfacing (3160712) 230183107021

Preface

Main motto of any laboratory/practical/field work is for enhancing required skills as well as
creating ability amongst students to solve real time problem by developing relevant
competencies in psychomotor domain. By keeping in view, GTU has designed competency
focused outcome- based curriculum for engineering degree programs where sufficient
weightage is given to practical work. It shows importance of enhancement of skills amongst the
students and it pays attention to utilize every second of time allotted for practical amongst
students, instructors and faculty members to achieve relevant outcomes by performing the
experiments rather than having merely study type experiments. It is must for effective
implementation of competency focused outcome-based curriculum that every practical is keenly
designed to serve as a tool to develop and enhance relevant competency required by the various
industry among every student. These psychomotor skills are very difficult to develop through
traditional chalk and board content delivery method in the classroom. Accordingly, this lab
manual is designed to focus on the industry defined relevant outcomes, rather than old practice
of conducting practical to prove concept and theory.

By using this lab manual students can go through the relevant theory and procedure in advance
before the actual performance which creates an interest and students can have basic idea prior to
performance. This in turn enhances pre-determined outcomes amongst students. Each
experiment in this manual begins with competency, industry relevant skills, course outcomes as
well as practical outcomes (objectives). The students will also achieve safety and necessary
precautions to be taken while performing practical.

This manual also provides guidelines to faculty members to facilitate student centric lab
activities through each experiment by arranging and managing necessary resources in order that
the students follow the procedures with required safety and necessary precautions to achieve the
outcomes. It also gives an idea that how students will be assessed by providing rubrics.

The modern digital systems including computer systems are designed with microprocessor as
central device connected to memory and I/O devices. The subject introduces the students with
basics of microprocessor, microprocessor architecture and assembly language programming,
interfacing microprocessor with memory and various I/O (Input/Output) devices.

Utmost care has been taken while preparing this lab manual however always there is chances of
improvement. Therefore, we welcome constructive suggestions for improvement and removal
of errors if any.

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Microprocessor and Interfacing (3160712) 230183107021

DTE’s Vision

 To provide globally competitive technical education

 Remove geographical imbalances and inconsistencies
 Develop student friendly resources with a special focus on girls’ education and support
to weaker sections
 Develop programs relevant to industry and create a vibrant pool of technical professionals

Institute’s Vision

 To create an ecosystem for proliferation of socially responsible and technically

sound engineers, innovators and entrepreneurs.

Institute’s Mission

 To develop state-of-the-art laboratories and well-equipped academic infrastructure.

 To motivate faculty and staff for qualification up-gradation, and enhancement of
subject knowledge.
 To promote research, innovation and real-life problem-solving skills.
 To strengthen linkages with industries, academic and research organizations.
 To reinforce concern for sustainability, natural resource conservation and
social responsibility.

Department’s Vision

 To create an environment for providing value-based education in Computer

Engineering through innovation, team work and ethical practices.

Department’s Mission

 To produce computer engineering graduates according to the needs of

industry, government, society and scientific community.
 To develop state of the art computing facilities and academic infrastructure.
 To develop partnership with industries, government agencies and R & D organizations
for knowledge sharing and overall development of faculties and students.
 To solve industrial, governance and societal issues by applying computing techniques.
 To create environment for research and entrepreneurship.

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 Microprocessor and Interfacing (3160712) 230183107021

Program Outcomes (POs)

PO1: Engineering Knowledge: Apply knowledge of mathematics, natural science, computing,

engineering fundamentals and an engineering specialization as specified in WK1 to WK4
respectively to develop to the solution of complex engineering problems.
PO2: Problem Analysis: Identify, formulate, review research literature and analyze complex
engineering problems reaching substantiated conclusions with consideration for sustainable
development. (WK1 to WK4)
PO3: Design/Development of Solutions: Design creative solutions for complex engineering
problems and design/develop systems/components/processes to meet identified needs with
consideration for the public health and safety, whole-life cost, net zero carbon, culture, society
and environment as required. (WK5)
PO4: Conduct Investigations of Complex Problems: Conduct investigations of complex
engineering problems using research-based knowledge including design of experiments,
modelling, analysis & interpretation of data to provide valid conclusions. (WK8).
PO5: Engineering Tool Usage: Create, select and apply appropriate techniques, resources and
modern engineering & IT tools, including prediction and modelling recognizing their limitations
to solve complex engineering problems. (WK2 and WK6)
PO6: The Engineer and The World: Analyze and evaluate societal and environmental aspects while
solving complex engineering problems for its impact on sustainability with reference to economy,
health, safety, legal framework, culture and environment. (WK1, WK5, and WK7).
PO7: Ethics: Apply ethical principles and commit to professional ethics, human values, diversity and
inclusion; adhere to national & international laws. (WK9)
PO8: Individual and Collaborative Team work: Function effectively as an individual, and as a
member or leader in diverse/multi-disciplinary teams.
PO9: Communication: Communicate effectively and inclusively within the engineering community
and society at large, such as being able to comprehend and write effective reports and design
documentation, make effective presentations considering cultural, language, and learning
differences
PO10: Project Management and Finance: Apply knowledge and understanding of engineering
management principles and economic decision-making and apply these to one’s own work, as a
member and leader in a team, and to manage projects and in multidisciplinary environments.
PO11: Life-Long Learning: Recognize the need for and have the preparation and ability for I)
independent and life-long learning II) adaptability to new and emerging technologies and III)
critical thinking in the broadest context of technological change. (WK8)

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Program Specific Outcomes (PSOs)

 Sound knowledge of fundamentals of computer science and engineering including

software and hardware.
 Develop the software using sound software engineering principles having web
based/mobile based interface.
 Use various tools and technology supporting modern software frameworks for solving
problems having large volume of data in the domain of data science and machine
learning.

Program Educational Objectives (PEOs)

 Possess technical competence in solving real life problems related to Computing.

 Acquire good analysis, design, development, implementation and testing skills to
formulate simple computing solutions to the business and societal needs.
 Provide requisite skills to pursue entrepreneurship, higher studies, research, and
development and imbibe high degree of professionalism in the fields of computing.
 Embrace life-long learning and remain continuously employable.
 Work and excel in a highly competence supportive, multicultural and professional
environment which abiding to the legal and ethical responsibilities.

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Practical – Course Outcome matrix

Course Outcomes (COs)

Demonstrate the various features of microprocessor, memory and I/O devices
CO_3160712.1 including concepts of system bus.
Identify the hardware elements of 8085 microprocessor including
CO_3160712.2 architecture and pin functions and programming model including
registers, instruction set and addressing modes.
Select appropriate 8085 instructions based on size and functions to
CO_3160712.3
write a given assembly language program.
Design a given interfacing system using concepts of memory and
CO_3160712.4
I/O interfacing.
CO_3160712.5 Demonstrate the features of advance microprocessors

Sr. CO CO CO CO CO
Practical Outcome/Title of experiment
No. 1 2 3 4 5
Study about 8085 microprocessor architecture, Pin
1. √
diagram and bus organization.
Study about following 8085 microprocessor instruction
sets.
(a) Data transfer instructions
2. (b) Arithmetic instructions √
(c) Logical instructions
(d) Branching instructions
(e) Stack, I/O and machine control instructions
(a) Write an assembly language program to add two
16-bit numbers stored in memory with carry in
8085 simulator. Store result in the memory

3. (b) Write an assembly language program to subtract √

two 8-bit numbers stored in memory location
2050 H and 2051 H with borrow using 8085
simulator. Store your result on memory location
2052
(a)Write an assembly language program to
multiply two 8-bit numbers stored in memory by
bit rotation method using 8085 simulator. Store
result in the memory
4. √
(b)Write an assembly language program to find the
minimum of two 8-bit numbers stored in the
memory location 2050H and 2051H using 8085
simulator. Store the result in 2052H
(a) Write an assembly language program using
8085 simulator to find square-root of a given
number.
5. Display result on output port number 01H √

(b) Write an assembly language program to find a

factorial of a given number using 8085
simulator. Display result on output port number
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Microprocessor and Interfacing (3160712) 230183107021
0AH

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(a) Write an assembly language program to move a

block of the memory starts at the location 2051H
to 4051H using 8085 simulator. The length of
the block is given on the memory location
6. 2050H √
(b) Write an assembly language program to arrange
numbers in ascending order using 8085
simulator. The length of the block is given on
memory location 2050H and block starts from
2051H.
(a) Write an assembly language program to covert a
given hexadecimal number to its equivalent
ASCII number using 8085 simulator

(b) Write a subroutine to find minimum of two

7. √
numbers and use it to find minimum from block
of data. The length of the block is given on
memory location 2050H and block starts from
2051H
(a) Write an assembly language program to reverse
the block of 8-bit data using stack in 8085
simulator.
8. √
(b) Write an assembly language program for decade
counter with 1 ms delay between two successive
counts using 8085 simulator
Study about 8255A Programmable Peripheral Interface
9. √
Architecture, ports and their modes.
Study about 8086 microprocessor architecture and its
10. √
register organization.

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Industry Relevant Skills

The following industry relevant competencies are expected to be developed in the student by
undertaking the practical work of this laboratory.
1. Will be able to demonstrate various features of microprocessor, memory and I/O
devices through microprocessor kit.
2. Will be able to design assembly language programs using appropriate 8085
instructions based on size and functions for conditional statements, branching,
looping, stack, subroutine and time delay.
3. Will be able to design a given interfacing system using concepts of memory and I/O
interfacing

Guidelines for Faculty members

1. Teacher should provide the guideline with demonstration of practical to the

students with all features.
2. Teacher shall explain basic concepts/theory related to the experiment to the students
before starting of each practical
3. Involve all the students in performance of each experiment.
4. Teacher is expected to share the skills and competencies to be developed in the
students and ensure that the respective skills and competencies are developed in the
students after the completion of the experimentation.
5. Teachers should give opportunity to students for hands-on experience after the
demonstration.
6. Teacher may provide additional knowledge and skills to the students even though not
covered in the manual but are expected from the students by concerned industry.
7. Give practical assignment and assess the performance of students based on task
assigned to check whether it is as per the instructions or not.
8. Teacher is expected to refer complete curriculum of the course and follow the
guidelines for implementation.

Instructions for Students

1. Students are expected to carefully listen to all the theory classes delivered by the faculty
members and understand the COs, content of the course, teaching and examination
scheme, skill set to be developed etc.
2. Students will have to perform experiments on 8085 microprocessor kit as well as on 8085
simulator.
3. Students should develop assembly language programs and execute all the programs on
8085 simulator. Students have to show output of each program in their practical file.
4. Students are instructed to submit practical list as per given sample list shown on next page.
5. Student should develop a habit of submitting the experimentation work as per the schedule
and s/he should be well prepared for the same.

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Common Safety Instructions

Students are expected to

1) switch on the PC carefully (not to use wet hands)

2) shutdown the PC properly at the end of your Lab
3) carefully handle 8085 microprocessor kit
4) carefully handle the peripherals (Mouse, Keyboard, Network cable etc)
5) use Laptop in lab after getting permission from Teacher

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Index
(Progressive Assessment
Sheet)

Sr. Objective(s) of Experiment Date of

Page No. Date of Sign. of Remar ks
No. performan submission
Teacher with
ce date
1Study about 8085 microprocessor architecture,
Pin diagram and bus organization.
2Study about following 8085 microprocessor
instruction sets.
(a) Data transfer instructions
(b) Arithmetic instructions
(c) Logical instructions
(d) Branching instructions
(e) Stack, I/O and machine control instructions
3 (a) Write an assembly language program to
add two 16-bit numbers stored in memory
with carry in 8085 simulator. Store result
in the memory

(b) Write an assembly language program to

subtract two 8-bit numbers stored in
memory location 2050 H and 2051 H with
borrow using 8085 simulator. Store your
result on memory location 2052
4 (a) Write an assembly language program to
multiply two 8-bit numbers stored in
memory by bit rotation method using
8085 simulator. Store result in the
memory

(b) Write an assembly language program to

find the minimum of two 8-bit numbers
stored in the memory location 2050H and
2051H using 8085 simulator. Store the
result in 2052H
5 (a) Write an assembly language program
using 8085 simulator to find square-root
of a given number. Display result on
output port number 01H

(b) Write an assembly language program to

find a factorial of a given number using
8085 simulator. Display result on output
port number 0AH
6 (a) Write an assembly language program to
move a block of the memory starts at the
location 2051H to 4051H using 8085
simulator. The length of the block is given
on the memory location 2050H
(b) Write an assembly language program to
arrange numbers in ascending order using
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8085 simulator. The length of the block is

given on memory location 2050H and
block starts from 2051H.
7 (a) Write an assembly language program to
covert a given hexadecimal number to its
equivalent ASCII number using 8085
simulator

(b) Write a subroutine to find minimum of

two numbers and use it to find minimum
from block of data. The length of the
block is
given on memory location 2050H and
block starts from 2051H
8 (a) Write an assembly language program to
reverse the block of 8-bit data using stack
in 8085 simulator

(b) Write an assembly language program for

decade counter with 1 ms delay between
two successive counts using 8085
simulator
9 Study about 8255A Programmable Peripheral
Interface Architecture, ports and their modes.
10 Study about 8086 microprocessor architecture
and its register organization.
Total

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Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2) (2)
Good Avg. Good Avg. Good Avg. Good Avg. Good Avg.
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

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Microprocessor and Interfacing (3160712) 230183107021

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2) (2)
Good Avg. Good Avg. Good Avg. Good Avg. Good Avg.
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

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Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 3
Aim: (A) Write an assembly language program to add two 16-bit numbers stored in memory
with carry in 8085 simulator. Store result in the memory

(B) Write an assembly language program to subtract two 8-bit numbers stored in memory
location 2050 H and 2051 H with borrow using 8085 simulator. Store your result on
memory location 2052

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall data transfer and arithmetic instructions of 8085 microprocessor
(b) To use data transfer and arithmetic instructions in programs.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to add two 16-bit numbers stored in memory with carry in 8085
simulator. Store result in the memory

Input : (2000H) : 11H

(2001H) : 12H
(2002H) : 13H
(2003H) : 14H

Output : (2020H) : 24H

(2021H) : 26H

Address Label Mnemonics Hex Comments

Code
0000 LHLD 2000 2A ;Load H and L registers
0001 00
0002 20
0003 XCHG EB ; Exchange contents of HL and DE register
pairs
0004 LHLD 2002 2A ; Load H and L registers
0005 02
0006 20
0007 MVI C,00 0E ; Clear register C
0008 00
0009 DAD D 19 ; Add contents of DE pair with contents of HL
pair
000A JNC result D2 ; Go to result if CY = 0
000B 12
000C 00
000D INR C 0C ; Increment of register C
000E MOV A, C 79 ;Transfer data from register C to accumulator

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Microprocessor and Interfacing (3160712) 230183107021

000F STA 2025 32 ;Store data from accumulator to memory

address
0010 25
0011 20
0012 result : SHLD 2020 22 ; Store contents of registers H and L to
memory address
0013 20
0014 20
0015 HLT 76 ; End of the program

(B) Program to subtract two 8-bit numbers stored in memory location 2050 H and 2051
H with borrow using 8085 simulator. Store your result on memory location 2052

Input : (2050H) : 18H

(2051H) : 12H

Output : (2055H) : 06H

Address Label Mnemonics Hexcode Comments

0000 LXI H,2050 21 ; Load HL pair with memory address
0001 50
0002 20
0003 MOV A,M 7E ; Transfer data from memory to
accumulator
0004 INX H 23 ; Increment of HL pair
0005 SBB M 9E ;Subtract data of memory from
accumulator
0006 STA 2055 32 ; Store data from accumulator to memory
address
0007 55
0008 20
0009 HLT 76 ; End of the program

Observations:
It is observed that the structure of assembly language programs and format of mnemonics
understood properly. Data transfer and arithmetic instructions are effectively implemented to
perform addition and subtraction operations.

Conclusion:
Using data transfer and arithmetic instructions, assembly language programs for 16-bit addition
and 8-bit subtraction are successfully performed.

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Microprocessor and Interfacing (3160712) 230183107021

Quiz:

(1) What is data transfer instructions?

Data transfer instructions are used to move data between: Registers, Memory and
registers ,I/O ports and the accumulator

Types of Data Transfer Instructions:

 MOV (Move data between registers/memory)
 MVI (Move immediate data to register/memory)
 LDA/STA (Load/Store accumulator directly from/to memory)
 LHLD/SHLD (Load/Store H & L registers directly from/to memory)
 LXI (Load 16-bit immediate data into a register pair, e.g., LXI H, 2050H)

(2) What is the function of LHLD instruction?

 LHLD (Load H and L Direct) is a 16-bit data transfer instruction that loads the H
(High byte) and L (Low byte) registers from two consecutive memory locations.
 Syntax: LHLD 2050H

(3) What operation is performed by XCHG instruction?

 XCHG (Exchange H-L with D-E) swaps the contents of the HL and DE register pairs.
 Operation:
o H ↔ D (High bytes exchanged)
o L ↔ E (Low bytes exchanged)

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th

edition, prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2) (2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

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Experiment No - 4

Aim: (A) Write an assembly language program to multiply two 8-bit numbers stored in
memory by bit rotation method using 8085 simulator. Store result in the memory

(B) Write an assembly language program to find the minimum of two 8-bit numbers
stored in the memory location 2050H and 2051H using 8085 simulator. Store the result in
2052H

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall data transfer and arithmetic instructions of 8085 microprocessor
(b) To use data transfer and arithmetic instructions in programs.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to multiply two 8-bit numbers stored in memory by bit rotation method
using 8085 simulator. Store result in the memory

Input : (2000H) : 10
(2001H) : 08

Output : (2050H) : 80

Address Label Mnemonics Hex Code Comments

0000 LXI H,2000 21, 00, 80 Load first operand address

0003 MOV B, M 46 Store first operand to B

0004 INX H 23 Increase HL pair

0005 XRA A AF Clear accumulator

0006 MOV C, A 4F Store 00H at register C

0007 LOOP ADD M 86 Add memory element with Acc

0008 JNC SKIP D2, 0C, F0 When Carry flag is 0, skip next task

000B INR C 0C Increase C when carry is 1

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Microprocessor and Interfacing (3160712) 230183107021

000C SKIP DCR B 05 Decrease B register

000D JNZ LOOP C2, 07, F0 Jump to loop when Z flag is not 1

0010 LXI H,0050 21, 50, 80 Load Destination address

0013 MOV M, C 71 Store C register content into memory

0014 INX H 23 Increase HL Pair

0015 MOV M, A 77 Store Acc content to memory

0016 HLT 76 Terminate the program

(B) Program to find the minimum of two 8-bit numbers stored in the memory location
2050H and 2051H using 8085 simulator. Store the result in 2052H

Input : (2050H) : 25
(2051H) : 45

Output : (2052H) : 25

Address Label Mnemonics Hex Code Comments

0000 LXI H,2050H 21, 00, 80 Point to the first number

0003 MOV B,M 46 Load the first number to B

0004 INX H 23 Point to next location

0005 MOV A,M 7E Get the second number to A

0006 CMP B B8 Compare B with A

0007 JC STORE DA, 0B, F0 Is CY = 1,jump to Store

000A MOV A,B 78 Load A with second number

000B STORE STA 2052H 32, 50, 80 Store the number into memory

000E HLT 76 Terminate the program

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Observations:
Both programs utilize basic 8085 instructions like MOV, CMP, RRC, ADD, JNC, and JMP to
achieve their goals.Both programs operate on 8-bit data stored in memory and store the final result
in a specified memory location.The multiplication program uses bitwise rotation and addition
instead of direct multiplication.

Conclusion:
Multiplication is achieved using bitwise rotation and addition.Comparison and decision-making
are implemented using CMP and jump instructions.The multiplication program relies on bitwise
shifting and addition, a fundamental concept in low-level programming.The minimum-finding
program effectively demonstrates the use of arithmetic comparison.

Quiz:

(1) What is the meaning of bit manipulation?

Bit manipulation refers to the process of modifying, testing, or toggling individual
bits within a byte of data.

(2) What is the use of rotate instruction?

Rotate instructions shift bits in the accumulator (A) either left or right, with or without the Carry
Flag (CY).
Types in 8085:
Instruction Operation
RLC Rotate Left (through Carry)
RRC Rotate Right (through Carry)
RAL Rotate Left via Carry
RAR Rotate Right via Carry

(3) What is the use of compare instruction?

The compare instruction (CMP) subtracts a value from the accumulator (A) without
storing the result, but updates flags to indicate the relationship between the two values.

Applications:
 Loops and conditional jumps
 Sorting algorithms
 Decision-making in programs

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Suggested Reference:
8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

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Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 5

Aim: (A) Write an assembly language program using 8085 simulator to find square-root of a
given number. Display result on output port number 01H

(B) Write an assembly language program to find a factorial of a given number using 8085
simulator. Display result on output port number 0AH

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall arithmetic and I/O instructions of 8085 microprocessor

(b) To use arithmetic and I/O instructions in program.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to find square root of given 8-bit number using 8085 simulator. Display
result on output port number 01H

Input : (2000H) : 25

Output : (01H) : 5

Address Label Mnemonics Hex Code Comments

2100 LDA 2000 3A 00 20 Load the number into accumulator
2103 MVI B, 00H 06 00 Initialize B to 0
2105 MVI C, 01H 0E 01 Initialize C to 1
2107 LOOP: CMP C B9 Compare accumulator with C
2108 JC DISPLAY DA 0F 21 If A < C, jump to display result
210B SUB C 91 Subtract odd number from A
210C INR B 04 Increment square root counter
210D INR C 0C Increment C to next odd number
210E INR C 0C adding 2 to get next odd number
210F JMP LOOP C3 07 21 Repeat the process
2112 DISPLAY: MOV A, B 78 Move the result to accumulator
2113 OUT 01H D3 01 Display result on port 01H
2115 HLT 76 Halt the program

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Microprocessor and Interfacing (3160712) 230183107021

(B) Program to find a factorial of a given number using 8085 simulator. Display result
on output port number 0AH

Input : (2000H) : 4

Output : (0AH) : 24

Address HEX Codes Labels Mnemonics Comments

2000 21, 00, 80 LXI H, 2000H Load the number
2003 46 MOV B,M Take number from memory to B
2004 16, 01 MVI D, 01H Set D to 01H
2006 CD, 10, F0 FACT CALL MUL Call multiplication
2009 05 DCR B Decrease B by 1
200A C2, 06, F0 JNZ FACT If Z = 0, jump to Fact
200D 23 INX H Point to next location
200F 72 MOV M,D Store result in memory
2010 76 HLT Terminate the program
2011 58 MUL MOV E,B Load B to E
2012 AF XRA A Clear accumulator to store result
2013 82 ML ADD D Add D to A
2014 1D DCR E Decrement E
2015 C2, 12, F0 JNZ ML If Z = 0, jump to ML
2016 57 MOV D,A Transfer contents of A to D
2019 C9 RET Return result

Observations:
The programs use basic loops and conditional checks for computation.The result is sent to a
specific output port, ensuring proper display.The 8085 processor has an 8-bit architecture, making
it challenging to compute results for larger numbers without additional memory handling
techniques.Understanding these programs helps in designing real-world embedded applications
where low-level computations are needed.

Conclusion:
Square Root Program uses the method of successive subtraction of odd numbers to compute the
square root. The result is displayed on output port 01H.If the number is not a perfect square, the
program gives the truncated integer square root. Factorial Program calculates the factorial using
iterative multiplication. The result is displayed on output port 0AH.

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Microprocessor and Interfacing (3160712) 230183107021

Quiz:

(1) What is the meaning of port address?

In microprocessor systems, a port address refers to a unique identifier assigned to
an input/output (I/O) device that enables the microprocessor to communicate with external
hardware components. The 8085 microprocessor uses an 8-bit addressing scheme for I/O
operations, allowing it to address up to 256 ports (00H to FFH).

(2) What is difference between memory mapped IO and I/O mapped I/O?

Feature Memory-Mapped I/O I/O-Mapped I/O

Address Space Shares the 16-bit memory address space Uses a separate 8-bit I/O address
space
Control Signal Uses MEMR̅ (Memory Read) and MEMW̅ Uses IOR̅ (I/O Read) and IOW̅ (I/O
(Memory Write) Write)
Instructions Memory instructions (LDA, STA, MOV) Dedicated I/O instructions (IN, OUT)
Hardware No extra decoding needed (treated as Requires additional I/O address
Design memory) decoding logic
Speed Slower (memory bus cycles are used) Faster (direct I/O bus cycles)
Flexibility Can use full memory instructions for I/O Limited to IN and OUT operations

(3) How can you create loop statement in assembly language program?

In 8085 assembly language, a loop is implemented using:

 A counter (stored in a register or memory).
 Conditional jump instructions (based on
flags). Steps to Create a Loop:
1. Initialize a counter (e.g., using MVI or LXI).
2. Define the loop body (code to be repeated).
3. Decrement/Increment the counter (using DCR, INR).
4. Check the condition (using JNZ, JC, JZ, etc.).
5. Jump back to the loop start if the condition is
met. Types of Loops:
1. Counter-Controlled Loop (Fixed iterations)
2. Condition-Based Loop (Variable iterations)

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 Microprocessor and Interfacing (3160712) 230183107021

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

44
Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 6

Aim: (A) Write an assembly language program to move a block of the memory starts at the
location 2051H to 4051H using 8085 simulator. The length of the block is given on the
memory location 2050H

(B) Write an assembly language program to arrange numbers in ascending order using
8085 simulator. The length of the block is given on memory location 2050H and block
starts from 2051H.

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall block data transfer (DMA) of 8085 microprocessor

(b) To implement block data transfer program.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to move a block of the memory starts at the location 2051H to 4051H
using 8085 simulator. The length of the block is given on the memory location
2050H

Input : (2051H): 11

Output : (4051H): 11

Address Label Mnemonics Hex Code Comments

2000 LDA 2050H 3A 50 20 Load block length
2003 MOV C, A 4F Store length in C
2004 LXI H, 2051H 21 51 20 Load source address in HL
2007 LXI D, 4051H 11 51 40 Load destination address in DE
200A MOVE_LOOP MOV A, M 7E Load data from source
200B STAX D 12 Store data at destination
200C INX H 23 Increment source pointer
200D INX D 13 Increment destination pointer
200E DCR C 0D Decrement counter
200F JNZ MOVE_LOOP C2 0A 20 Repeat if counter is not zero
2012 HLT 76 Halt program

45
Microprocessor and Interfacing (3160712) 230183107021

(B) Program to arrange numbers in ascending order using 8085 simulator. The length
of the block is given on memory location 2050H and block starts from 2051H

Input :
2050H = 04
2051H = 23
2052H = 12
2053H = 45
2054H = 01

Output :
2051H = 01
2052H = 12
2053H = 23
2054H = 45

Address Mnemonics Hex Code Comments

2000 LDA 2050H 3A 50 20 Load block length
2003 MOV C, A 4F Store length in C
2004 DCR C 0D Decrement for passes
2005 LXI H, 2051H 21 51 20 Load block start address
2008 OUTER_LOOP: Outer loop start
2008 MOV B, C 48 Load counter for inner loop
2009 LXI H, 2051H 21 51 20 Reset pointer to start
200C INNER_LOOP: Inner loop start
200C MOV A, M 7E Load first number
200D INX H 23 Move to next number
200E CMP M BE Compare with next number
200F JC NO_SWAP DA 13 20 If in order, jump to NO_SWAP
2012 MOV D, M 56 Store next number in D
2013 MOV M, A 77 Swap: Move first to next location
2014 DCX H 2B Move back to previous location
2015 MOV M, D 72 Swap: Move second to previous location
2016 INX H 23 Move forward
2017 NO_SWAP: Skip swap label
2017 DCR B 05 Decrement inner loop counter
2018 JNZ INNER_LOOP C2 0C 20 Repeat inner loop if B ≠ 0
201B DCR C 0D Decrement outer loop counter
201C JNZ OUTER_LOOP C2 08 20 Repeat outer loop if C ≠ 0
201F HLT 76 Halt program

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Microprocessor and Interfacing (3160712) 230183107021

Observations:
Both programs use indirect addressing and loops.The memory transfer is efficient, while the
sorting algorithm is less optimal for large data.Such programs are useful in embedded systems
where data needs to be moved, stored, or rearranged efficiently. 8085 Limitations are built-in
stack operations for large data sets and slow sorting operations highlight the constraints of the
8085 microprocessor.

Conclusion:
Memory Block Transfer Program successfully transfers a block of memory from the source
starting at 2051H to the destination starting at 4051H.The number of bytes to be transferred is
read from memory location 2050H.The process is done using a loop, where each byte is moved
sequentially until the entire block is copied. Sorting in Ascending Order program correctly sorts a
list of numbers stored in memory, starting from 2051H. The sorting is performed using the Bubble
Sort algorithm, which repeatedly compares adjacent elements and swaps them if necessary.

Quiz:

(1) What is DMA transfer?

DMA (Direct Memory Access) transfer is a method that allows peripheral devices to
directly access the system's main memory without continuous intervention from the CPU.
This significantly improves system performance by offloading data transfer tasks from the
processor.

characteristics of DMA transfer:

 Enables high-speed data transfers between I/O devices and memory
 Bypasses the CPU for bulk data movements
 Managed by a dedicated DMA controller
 Particularly useful for devices requiring frequent, large data transfers

(2) Which control signal involve in DMA transfer?

1. HOLD
o Request from DMA controller to gain bus control
o Indicates a peripheral needs DMA service
2. HLDA
o CPU's acknowledgment of HOLD request
o Indicates CPU has relinquished bus control
o All buses are tri-stated

47
 Microprocessor and Interfacing (3160712) 230183107021

(3) What is difference between interrupt cycle and DMA cycle?

Characteristic Interrupt Cycle DMA Cycle

Triggered by external/internal Initiated by peripheral needing
Initiation
events bulk transfer
CPU
CPU executes ISR CPU completely bypassed during transfer
Involvement
Overhead Context switching required Minimal overhead after initial setup
Data Transfer Handled by CPU Handled by hardware
via software
Speed Slower (software-mediated) Faster (hardware-mediated)
Purpose Event notification Bulk data movement
and handling
Control Signals INTR, RST, TRAP HOLD, HLDA

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

48
 Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 7

Aim: (A) Write an assembly language program to covert a given hexadecimal number to its
equivalent ASCII number using 8085 simulator

(B) Write a subroutine to find minimum of two numbers and use it to find minimum from
block of data. The length of the block is given on memory location 2050H and block starts
from 2051H.

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall concept of Subroutine call & Return of 8085 microprocessor
(b) To use CALL and RET instructions of 8085 microprocessor.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to covert a given hexadecimal number to its equivalent ASCII number
using 8085 simulator

Input : (2050H) = 0A

OUTPUT: (2051H) = 41

Address Label Mnemonics Hex Code Comments

2000 LDA 2000H 3A 00 20 Load the hexadecimal number from memory
2000H
2003 CPI 0AH FE 0A Compare the number with 0AH
2005 JC NUM DA 0B 20 Jump to NUM if number is less than 0AH
2008 ADI 37H C6 37 If A-F, add 37H to convert to ASCII
200A JMP STORE C3 0E 20 Jump to STORE
200D NUM ADI 30H C6 30 If 0-9, add 30H to convert to ASCII
200F STORE STA 3000H 32 00 30 Store the ASCII value at 3000H
2012 HLT 76 Halt the program

49
Microprocessor and Interfacing (3160712) 230183107021

(B) Write a subroutine to find minimum of two numbers and use it to find minimum
from block of data. The length of the block is given on memory location 2050H and
block starts from 2051H

Input :
2050H = 04
2051H = 30
2052H = 01
2053H = 20
2054H = 21
Output :
2055H = 01

Address Mnemonics Hex Code Comments

2000 LDA 2050H 3A 50 20 Load block length
2003 MOV C, A 4F Store length in C
2004 LXI H, 2051H 21 51 20 Load first element address
2007 MOV A, M 7E Load first number as minimum
2008 INX H 23 Move to next element
2009 DCR C 0D Decrease counter
200A CHECK_LOOP: Loop label
200A MOV B, M 46 Load next number
200B CALL MINIMUM CD 13 20 Call subroutine
200E INX H 23 Move to next element
200F DCR C 0D Decrease counter
2010 JNZ CHECK_LOOP C2 0A 20 Repeat until count is zero
2013 STA 2060H 32 60 20 Store minimum value
2016 HLT 76 Halt program
2017 MINIMUM: Subroutine label
2017 CMP B B8 Compare A and B
2018 JC RETURN DA 1B 20 Jump if A < B
201B MOV A, B 78 A = B (update minimum)
201C RETURN: Return label
201C RET C9 Return from subroutine

Observations:
Both programs handle data using registers and memory locations efficiently The use of
subroutines makes the second program structured and reusable in other applications.
Hexadecimal-to-ASCII conversion is commonly used in displaying numbers on LCDs, seven-
segment displays, and serial communications.The minimum-finding subroutine is useful in sorting
algorithms, optimization problems, and data analysis.

50
Microprocessor and Interfacing (3160712) 230183107021

Conclusion:
The subroutine compares two numbers and returns the smaller one. Using this subroutine, the
main program successfully finds the minimum value in a block of data stored from memory
location 2051H, with the block length specified at 2050H. The assembly language program
successfully converts a given hexadecimal digit into its corresponding ASCII code using the 8085
simulator. The program checks whether the input is a number or a letter and adjusts the ASCII
value accordingly.

Quiz:

(1) How program counter is modified when Call instructions is executed?

1. Current PC Preservation:
 The processor first increments the PC to point to the next instruction
 This updated PC value is pushed onto the stack
 The stack pointer is decremented twice
2. New Address Loading:
 The 16-bit target address specified in the CALL instruction is loaded into the PC
 This redirects program flow to the subroutine
3. Memory Operations:
 High-order byte of return address stored at
 Low-order byte stored at
 SP is decremented by 2
(2) What is the use of PSW (program status word) in subroutine call ?

1. Composition:
 PSW = Accumulator (A) + Flag register (F)
 Contains critical execution state information
2. Preservation Uses:
 Context Saving: When calling nested subroutines, PSW preserves:
 Current computational results (Accumulator)
 Conditional flags (Carry, Zero, Sign, Parity, Auxiliary Carry)
 State Restoration: Enables proper return to calling routine with original conditions
3. Operation During Calls:
 Can be explicitly pushed/popped using PUSH PSW/POP PSW
 Preserves complete processor state across subroutine boundaries
 Essential for maintaining program correctness when subroutines modify A/F

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 Microprocessor and Interfacing (3160712) 230183107021

(3) What is difference between CALL and RET instruction?

Characteristic CALL Instruction RET Instruction

Returns from subroutine to main
Purpose Transfers control to subroutine
program
Stack Operation Pushes return address onto stack Pops return address from stack
PC
Loads new subroutine address into PC Restores original PC from stack
Modification
SP Change Decrements SP by 2 Increments SP by 2
Conditional CALL (CC, CNC, CZ, CNZ Conditional RET (RC, RNC, RZ, RNZ
Variations
etc.) etc.)

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

52
Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 8

Aim: (A) Write an assembly language program to reverse the block of 8-bit data using stack
in 8085 simulator.

(B) Write an assembly language program for decade counter with 1 ms delay between two
successive counts using 8085 simulator.

Date:

Competency and Practical Skills: Logic building, Programming and Analyzing

Relevant CO: CO3

Objectives: (a) To recall concepts of stack in 8085 microprocessor

(b) To use PUSH and POP instructions in 8085 microprocessor.
.
Equipment/Instruments: 8085 microprocessor kit / 8085 Simulator

Program:

(A) Program to reverse the block of 8-bit data using stack in 8085 simulator.

Input :
2050H = 04
2051H = 11
2052H = 22
2053H = 33
2054H = 44
Output :
2051H = 44
2052H = 33
2053H = 22
2054H = 11

Address Label Mnemonics HexCode Comments

2000 LXI SP,2700H 31 00 27 Initialize stack pointer at 2700H
2003 LXI H,3000H 21 00 30 Load starting address of data
block
2006 MVI C,08H 0E 08 Load counter with 8 (number of
bytes)
2008 PUSH_LOOP MOV A,M 7E Load memory content into
accumulator
2009 PUSH PSW F5 Push data onto stack
200A INX H 23 Increment memory pointer

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Microprocessor and Interfacing (3160712) 230183107021

200B DCR C 0D Decrement counter

200C JNZ C2 08 20 Repeat until all 8 bytes are
PUSH_LOOP pushed
200F LXI H,3100H 21 00 31 Load starting address for reversed
data
2012 MVI C,08H 0E 08 Reload counter with 8
2014 POP_LOOP POP PSW F1 Pop data from stack
2015 MOV M,A 77 Store it in memory
2016 INX H 23 Increment memory pointer
2017 DCR C 0D Decrement counter
2018 JNZ C2 14 20 Repeat until all bytes are popped
POP_LOOP
201B HLT 76 Halt execution

(B) Program for decade counter with 1 ms delay between two successive counts using
8085 simulator
Output :
Time (ms) Port 01H Output

0 00

1 01

... ...

9 09

10 00

Address Label Mnemonics Hex Comments

Code
2000H MVI C, 00 0E 00 Initialize counter to 0
2002H LOOP MOV A, C 79 Load counter value into A
2003H CALL DISPLAY CD 12 20 Call subroutine to output value
2006H CALL DELAY CD 18 20 Call subroutine for delay
2009H INR C 0C Increment counter
200AH CPI 0A FE 0A Compare C with 10 (decimal)
200CH JNZ LOOP C2 02 20 Jump back if not 10
200FH MVI C, 00 0E 00 Reset counter to 0
2011H JMP LOOP C3 02 20 Repeat counting
2014H DISPLAY OUT 01H D3 01 Output value in A to Port 01H
2016H RET C9 Return from subroutine
2018H DELAY LXI D, 002AH 11 2A 00 Load DE with 42 (for ~1 ms
delay)
201BH DELAY_LOOP DCX D 1B Decrement DE

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Microprocessor and Interfacing (3160712) 230183107021

201CH MOV A, D 7A Load D into A

201DH ORA E B3 OR operation (check if DE = 0)
201EH JNZDELAY_LOOP C2 1B 20 Loop if not zero
2021H RET C9 Return from subroutine

Observations:
The block reversing program efficiently uses the stack to reverse a sequence of 8-bit numbers. By
pushing each byte onto the stack and then popping them back, it achieves a last-in, first-out
(LIFO) order, effectively reversing the block.The decade counter successfully counts from 0 to 9
in binary- coded decimal format, introducing a 1 ms delay between successive counts. The delay
is implemented using loop-based time delay calculations, ensuring accurate timing for hardware
interfacing.

Conclusion:
The stack-based block reversal demonstrates the LIFO principle, emphasizing the importance of
stack operations in data manipulation. The decade counter program introduces timing control,
which is crucial for real-time embedded applications. stack handling, looping, conditional
branching, and time delay implementation.

Quiz:

(1) What is the use of NOP instruction in 8085 microprocessors?

The NOP instruction is a 1-byte instruction that performs no actual operation but consumes:
 4 clock cycles
 1 machine cycle
 Does not affect any registers, flags, or memory locations

applications:
 Timing delays: Used to create precise timing loops
 Placeholder: For future code insertion without affecting program flow
 Synchronization: Helps align timing in critical sections
 Debugging: Can replace instructions temporarily during testing
 Padding: Maintains memory alignment in some cases

(2) What is the application of delay counter program in 8085 microprocessor?

Delay counter programs are used to generate precise time delays by creating empty loops
that consume known clock cycles.
applications:
 I/O synchronization: Timing for peripheral devices
 Debouncing: Switch/button input stabilization
 Display timing: For LED/LCD interfaces
 Communication protocols: Baud rate generation
 Hardware interfacing: Motor control, sensor reading

55
 Microprocessor and Interfacing (3160712) 230183107021

(3) What is the use of PUSH and POP instructions?

Instruction Function
PUSH Saves register pair to stack
POP Restores register pair from stack
uses:
 Subroutine calls: Preserve register states
 Context switching: Save/restore processor state
 Temporary storage: When registers are needed for other operations
 Parameter passing: Between routines
 Interrupt handling: Save critical registers

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

56
Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 9

Aim: Study about 8255A Programmable Peripheral Interface Architecture, ports and their modes.

Date:

Competency and Practical Skills: Understanding and analyzing

Relevant CO: CO4

Objectives: (a) To understand concepts of 8255A Programmable Peripheral Interface

(b) To analyze interface of 8255A with 8085 microprocessor
.
Equipment/Instruments: 8255A hardware kit/Simulator

Theory :
8255A Programmable Peripheral Interface

The 8255A is a Programmable Peripheral Interface (PPI) designed for microprocessor-based

systems to interface with external devices such as keyboards, displays, and other peripherals. It
consists of three 8-bit ports: Port A, Port B, and Port C, which can be programmed to function in
different modes. The control word register determines the configuration of these ports.

Architecture of 8255A:
1. Data Bus Buffer: Used to interface the system bus with internal registers of 8255A.
2. Read/Write Control Logic: Controls data transfer between the CPU and 8255A.
3. Control Register: Stores the control word to configure the modes of operation.
4. Three 8-bit I/O Ports:
o Port A (PA0-PA7): Can be used as input or output in different modes.
o Port B (PB0-PB7): Also programmable as input or output.
o Port C (PC0-PC7): Can be split into two 4-bit ports (PC upper and PC lower).

Modes of Operation:
8255A operates in three modes:
1. Mode 0 (Basic Input/Output Mode): Each port can function as a simple input or output
port.
2. Mode 1 (Strobed Input/Output Mode): Allows handshaking with external devices for
synchronized data transfer.
3. Mode 2 (Bidirectional Bus Mode): Used for bidirectional data transfer with handshaking.
4.
Interface with 8085 Microprocessor:
The 8255A is interfaced with the 8085 microprocessor through the data bus, control signals, and
address lines. The address lines A0 and A1 are used to select different ports, while RD and WR
signals control data flow. The chip select (CS) enables communication with 8255A.
Architecture of 8255A:

57
Microprocessor and Interfacing (3160712) 230183107021

Intel 8255A –

Observations:
The configuration of 8255A depends on the control word loaded into the control register .
Different modes of operation can be verified using a simulator or hardware kit.Data transfer
between 8085 and 8255A can be observed based on control signals and port configurations. Mode
0 allows direct input/output operations, while Mode 1 and Mode 2 require additional handshake
signals.

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 Microprocessor and Interfacing (3160712) 230183107021

Conclusion:
The 8255A Programmable Peripheral Interface is a versatile interface that enables communication
between a microprocessor and peripheral devices. By configuring its ports in different modes, it
can handle a variety of data transfer methods, including simple I/O operations and handshaking
techniques.

Quiz:

1) What are the control signals of 8255A IC?

Signal Direction Function

CS Input Active-LOW signal to enable the 8255A for communication
RD (Read) Input Active-LOW signal to read data from ports
WR (Write) Input Active-LOW signal to write data to ports/control register
A0, A1 Input Selects ports/control register:

2) Which are operating modes in 8255A?

1. Mode 0 (Basic Input/Output Mode)

 Ports A, B, and C operate as simple I/O ports
 No handshaking required
 Port C can be split into two 4-bit ports
2. Mode 1 (Strobed Input/Output Mode)
 Handshaking signals are used for synchronized data transfer
 Port A & B can be configured as input or output
 Port C provides control signals (STB, IBF, ACK, OBF, INTR)
3. Mode 2 (Bidirectional Bus Mode)
 Only Port A can be used in bidirectional mode
 Uses Port C for handshaking signals (OBF, ACK, STB, IBF, INTR)

3) What is the use of signals from Port - C?

1. Simple I/O (Mode 0)

 Can be used as 8-bit I/O port
 Can be split into two 4-bit ports
2. Handshaking
Signals Input Mode
(Mode 1):
 STB → Indicates data is ready
 IBF → Acknowledges data received
 INTR → Requests CPU attention

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 Microprocessor and Interfacing (3160712) 230183107021

Output Mode (Mode 1):

 OBF → Indicates data is ready
 ACK → Peripheral acknowledges data
 INTR → Requests CPU attention
Bidirectional Mode (Mode 2, Port A only):
 Uses PC3-PC7 for handshaking (OBF, ACK, STB, IBF, INTR)
3. Bit Set/Reset (BSR Mode)
 Individual bits of Port C can be set (1) or reset (0)
 Used for control applications

Suggested Reference:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

References used by the students:

8085 – Microprocessor architecture, programming and interfacing by Ramesh S. Goankar, 5th edition,
prentice hall publication.

Rubric wise marks obtained:

Problem Completeness
Knowledge Logic
Recognition (2) and accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

60
Microprocessor and Interfacing (3160712) 230183107021

Experiment No - 10

Aim: Study about 8086 microprocessor architecture and its register organization.

Date:

Competency and Practical Skills: Understanding and analyzing

Relevant CO: CO5

Objectives: (a) To understand architecture of 8086 microprocessor

(b) To analyze register organization of 8086 microprocessor

Equipment/Instruments: 8086 microprocessor board

Theory :

8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in

1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines that provides up to
1MB storage. It consists of powerful instruction set, which provides operations like multiplication
and division easily.
It supports two modes of operation, i.e. Maximum mode and Minimum mode. Maximum mode is
suitable for system having multiple processors and Minimum mode is suitable for system having
a single processor.

Features of 8086
The most prominent features of a 8086 microprocessor are as follows
 It has an instruction queue, which is capable of storing six instruction bytes from
the memory resulting in faster processing.
 It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus,
and 16-bit external data bus resulting in faster processing.
 It is available in 3 versions based on the frequency of operation
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
 Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
 Execute stage executes these instructions.
 It has 256 vectored interrupts.
 It consists of 29,000 transistors.

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Comparison between 8085 & 8086 Microprocessor

 Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor.
 Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address bus.
 Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1 Mb of memory.
 Instruction − 8085 doesnt have an instruction queue, whereas 8086 has an
instruction queue.
 Pipelining − 8085 doesnt support a pipelined architecture while 8086 supports a
pipelined architecture.
 I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can access 2^16 = 65,536 I/O's.
 Cost − The cost of 8085 is low whereas that of 8086 is high.
Architecture of 8086

8086 Microprocessor Register Organization

1. General-Purpose Registers
These registers are used for arithmetic, logical operations, and data movement. They include
 Accumulator Register (AX), which is primarily used for arithmetic and I/O operations.
 Base Register (BX) helps in addressing memory locations.
 Counter Register (CX) functions as a loop counter and is used in shift/rotate operations.
 Data Register (DX) assists in multiplication, division, and I/O port operations.
2. Segment Registers
The 8086 uses a segmented memory model, and segment registers store the base addresses of
different memory segments.
 Code Segment (CS) register holds the base address of the program code.
 Data Segment (DS) register holds the base address of data storage.
 Stack Segment (SS) register manages stack operations.

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3. Pointer and Index Registers

 These registers are used for stack operations and indexed addressing.
 Stack Pointer (SP) keeps track of the top of the stack.
 Base Pointer (BP) is used for stack-based addressing in function calls.
 Source Index (SI) and Destination Index (DI) registers are used in string operations
and memory indexing.
4. Flag Register
 The Flag Register in the 8086 microprocessor is 16-bit wide and consists of status and
control flags.
 Carry Flag (CF) which is set when there is a carry or borrow in arithmetic operations.
 Zero Flag (ZF) which is set if the result of an operation is zero.
 Sign Flag (SF), which indicates whether the result is negative.
 Overflow Flag (OF) , Parity Flag (PF), Auxiliary Carry Flag (AF) for BCD operations.
 control flags are Interrupt Flag (IF), Trap Flag (TF), and Direction Flag (DF).

4 REGISTER ORGANIZATION OF 8086

Observations:
The 8086 microprocessor follows a 16-bit architecture with a segmented memory model. It consists of
General Purpose Registers, Segment Registers, Pointer and Index Registers, and Flag
Register.The microprocessor operates in minimum mode and maximum mode.The instruction
queue in pipelined architecture allows fetching and execution to overlap, increasing efficiency .
Addressing modes allow flexibility in accessing data from registers, memory, or immediate values

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Conclusion:
The 8086 microprocessor is a powerful 16-bit CPU that introduced segmented memory addressing
to manage up to 1MB of memory efficiently.The use of general-purpose and special-purpose
registers improves performance and flexibility in executing instructions.The pipelined architecture
enhances execution speed by allowing instruction prefetching.

Quiz:

1) What is difference between 8085A and 8086 microprocessor?

Feature 8085A (8-bit) 8086 (16-bit)

Architecture 8-bit data bus 16-bit data bus
Address Bus 16-bit (64KB memory) 20-bit (1MB memory)
Registers 8-bit (A, B, C, D, E, H, L) 16-bit (AX, BX, CX, DX, SI, DI, BP, SP)
Pipelining No Yes
Operating
Single mode Real & Protected modes
Modes
Clock Speed 3-6 MHz 5-10 MHz
Flags 5 flags 9 flags

I/O Addressing 8-bit (256 ports) 16-bit (64K ports)

2) What is memory size in 8086 microprocessor?

220=1 MB (1,048,576 bytes) of memory

 Memory is segmented into 64KB segments

 Physical Address Calculation:
Physical Address=(Segment Register×16)+OffsetPhysical Address=(Segment Register×16)
+Offset

3) Which are the operating modes in 8086 microprocessor?

1. Minimum Mode (MN/MX̅ = HIGH)

 Single-Processor Configuration
o All control signals are generated by the 8086 itself.
o Used in simple systems without coprocessors.
 Key Features:
o Direct control over:
 INTA (Interrupt Acknowledge)
 RD (Read)
 WR (Write)
 ALE (Address Latch Enable)
o No bus arbitration required.

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2. Maximum Mode (MN/MX̅ = LOW)

 Multi-Processor Configuration
o Requires an external 8288 Bus Controller to generate control signals.
o Supports coprocessors like the 8087 (FPU) and 8089 (IOP).
 Key Features:
o Enhanced control signals:
 S0, S1, S2 (Status pins) decoded by the 8288.
 RQ/GT (Request/Grant) for bus arbitration.
o Supports shared system buses in multiprocessor setups.

Suggested Reference:

(1) 8085 – Microprocessor architecture, programming and interfacing by Ramesh S.

Goankar, 5th edition, prentice hall publication.
(2) 8086 Programming and Advance Processor Architecture, Savaliya M. T., Wiley India

References used by the students:

(1) 8085 – Microprocessor architecture, programming and interfacing by Ramesh S.

Goankar, 5th edition, prentice hall publication.
(2) 8086 Programming and Advance Processor Architecture, Savaliya M. T., Wiley India

Rubric wise marks obtained:

Problem Completeness and

Knowledge Logic
Recognition accuracy Ethics (2)
Rubrics (2) Building (2) Total
(2) (2)
Good Average Good Average Good Average Good Average Good Average
(2) (1) (2) (1) (2) (1) (2) (1) (2) (1)

Marks

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