Si9175

Vishay Siliconix

High Performance Step-Down DC-DC Converter

With Adjustable Output Voltage
FEATURES D Synchronizable to13-MHz Clock
D 2-MHz PWM Operation D User Selectable PWM, PSM, or AUTO Mode
D Integrated MOSFET Switches D PSM Frequency w20 kHz for Inaudible
D 2.6-V to 6.0-V Input Voltage Range Harmonics
D Minimal Number of External Components
D Up to 96% conversion efficiency APPLICATIONS
D 600-mA Load Capability
D W-CDMA Cell Phone
D 100% Duty Cycle Allows Low Dropout
D PDAs/Palmtop PCs
D Integrated Compensation Circuit
D LCD Modules
D Over-Current Protection
D Portable Image Scanners
D Shutdown Current < 2 mA
D GPS Receivers
D Thermal Shutdown
D Smart Phones
D Integrated UVLO
D MP3 Players
D 10-Pin MSOP and Space Saving MLP33 Packaging
D 3G Cell Phone
D Digital Cameras

DESCRIPTION
The Si9175 is a high efficiency 600-mA step down converter minimize system noise, the switching frequency can be
with internal low on resistance power MOSFET switch and synchronized to an external 13-MHz clock.
synchronous rectifier transistors. It is designed to convert one
cell LiIon battery or three cell alkaline battery voltages to a
dynamically adjustable dc output. The integrated high PSM mode provides increased efficiency at light loads. In PSM
frequency error amplifier with internal compensation mode the oscillator frequency is kept above 20 kHz to avoid
minimizes external components. audio band interference. When operating in Auto mode, the
converter automatically selects operating in either PWM or
PSM mode according to load current demand.

In order to insure efficient conversion throughout the entire The Si9175 is available in the10-pin MSOP and the even
load range, PWM (pulse width modulation), PSM (pulse smaller MLP33 package and is specified to operate over the
skipping mode) or Auto mode can be selected. In PWM mode, industrial temperature range of –40_C to 85_C. The Si9175
2-MHz switching permits use of small external inductor and packaged in the MLP33 package is available in both standard
capacitor sizes allowing one of the smallest solutions. To and lead (Pb)-free.

TYPICAL APPLICATIONS CIRCUIT

BATTERY VIN 2.2 mH VOUT

LX
CIN VDD
10 mF COUT
Si9175 4.7 mF R1

PGND

SYNC
13 MHz
FB

SD
ENABLE REF REF R2
PWM/PSM/AUTO MODE AGND

Document Number: 71728 www.vishay.com

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 Si9175
Vishay Siliconix

ABSOLUTE MAXIMUM RATINGS

Voltages Referenced to AGND = 0 V Thermal Impedance (QJA)
VIN, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 V 10-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135_C/W
Lx, SD, MODE, FB, CREF, SYNC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 6.2 V 10-Pin MLP33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71_C/W
(or to VDD )0.3 V whichever is less) Peak Inductor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 A
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +0.3 V Notes
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV a. Device mounted with all leads soldered or welded to PC board.
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 125_C b. Derate 7.4 mW/_C above 85_C.
c. Derate 14 mW/_C above 85_C.
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
10-pin MSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481 mW
10-pin MLP33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 915 mW

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING RANGE

VIN Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 V to 5.5 V Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 mH
CIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mF Ceramic Operating Load Current PWM Mode . . . . . . . . . . . . . . . . . . . . . . 0 to 600 mA
COUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.7 mF Ceramic Operating Load Current PSM Mode . . . . . . . . . . . . . . . . . . . . . . . 0 to 150 mA

SPECIFICATIONS
Parameter Test Conditions Unless Specified Limits
−40_C to 85_C, VIN = VDD,, CIN = 10 mF, COUT = 4.7 mF
Modef Symbol L = 2.2 mH, 2.6 V v VIN v 5.5 V, R1 = 11.3 kW, R2 = 20 kW Mina Typb Maxa Unit
Under Voltage Lockout (UVLO)
Under Voltage Lockout (turn-on) VIN rising 2.3 2.5
V
Hysteresis 0.1

Shutdown (SD)
Logic HIGH VSDH 1.6
V
Logic LOW VSDL 0.4

Settle Within $2% accuracy SD rising RL = 3.3 W 100

Delay to Outputc ten ms
tr < 1 ms RL = 51 W 100
Pull Down ISD Input at VIN mA

Mode Selection Tri-Level Logic (MODE)

MODE Pin HIGH PWM VIN −0.4 VIN
V
MODE Pin LOW Auto 0.4
MODE = GND −5
Mode Pin Input Current mA
MODE = VIN 5

Oscillator
Frequency fOSC 1.6 2 2.4 MHz

External Clock Synchronization (SYNC)

Frequency SYNC Input = 500 mVp-p 13 MHz
Ac Coupled Sinewave Frequency = 13 MHz 0.2 0.8 Vp-p

Error Amplifier (FB Pin)

TA = 25_C 1.190 1.215 1.240
FB Voltage Accuracy VFB V
TA = −40 to 85_C 1.173 1.257
Power Supply Rejection PSRR VIN = 2.6 V to 5.5 VDC 60 db
Input Bias Current IFB VFB = 1.25 V −1 0.01 1 mA

www.vishay.com Document Number: 71728

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 Si9175
Vishay Siliconix

SPECIFICATIONS
Parameter Test Conditions Unless Specified Limits
−40_C to 85_C, VIN = VDD,, CIN = 10 mF, COUT = 4.7 mF
Modef Symbol L = 2.2 mH, 2.6 V v VIN v 5.5 V, R1 = 11.3 kW, R2 = 20 kW Mina Typb Maxa Unit
Converter Operation
Maximum Output
PWM ILOAD VIN = 3.6 V 600 mA
Current
Maximum Output
PSM ILOAD VIN = 3.6 V 150 mA
Current
Dropout Voltagee VDD VIN = 2.6 V, IOUT = 600 mA 190 300 mV
Closed Loop Bandwidth BW 300 kHz
PWM VIN = 3.6 V IOUT = 30 mA to 600 mA 0.5
Load Regulationc %
PSM VOUT = 1.9 V @ 25_C IOUT = 30 mA to 75 mA 0.25
PWM "0.1
Line Regulation VOUT = 3.0
3 0 V,
V VIN = 3.5
3 5 V to 5
5.5
5V %/V
PSM "0.1
PWM/PSM Switch Threshold Current IAUpk 200
mA
Maximum Inductor Peak Current Limit ILpk 1500
P-Channel 250
On Resistance rDS(on)
DS( ) VIN = 3.6
36V mW
N-Channel 250
PWM IOUT = 600 mA 60
Output Ripple Voltage 0 05 W COUT(ESR)
0.05 mVp-p
PSM IOUT = 30 mA 80
PWM IOUT = 600 mA 90
Efficiency VIN = 3.6
3 6 V,
V VOUT = 3.3
33V %
PSM IOUT = 30 mA 80
Frequency PSM IOUT w 30 mA 20 kHz

Supply Current
PWM ISUPPLY 450 750
Input Supply Current (VDD & IOUT = 0 mA,
mA VIN = 3.6
3 6 V (not switching
switching, FB = GND)
PSM VIN) 400 mA
Shutdown Supply Current ISD SD = Low 2

Thermal Shutdown
Thermal Shutdown Temperaturec TJ(S/D) 165
_C
Thermal Hysteresisc 20
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
b. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
c. Guaranteed by design.
d. Settling times, ts, apply after ten.
e. Bypass is a device mode of operation, in which, the device is in 100% duty cycle. Bypass operation is possible in either PWM or PSM.
f. Operating modes are controlled with the MODE pin where Auto mode = MODE = LOW, PWM Mode = MODE = HIGH, and PSM mode = MODE = OPEN.

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S-41148—Rev. C, 14-Jun-04 3
Si9175
Vishay Siliconix

PIN CONFIGURATION

MSOP-10 MLP33

LX 1 10 PGND
LX 10 PGND
AGND 2 9 VIN AGND 2 9 VIN
FB 3 8 SYNC FB 3 8 SYNC
VDD 4 7 SD VDD 4 7 SD
REF 5 6 MODE
REF 5 6 MODE

Top View Top View

PIN DESCRIPTION
Pin Number Name Function
1 LX Inductor connection
2 AGND Low power analog ground
3 FB Output voltage feedback
4 VDD Input supply voltage for the analog circuit.
5 REF Internal reference, no connection should be made to this pin.
Used to select switching mode of the buck converter
PWM/PSM Pin Logic:
6 MODE MODE Pin Operating Mode
VIN PWM
Open PSM
GND AUTO
7 SD Logic low disables IC and reduces quiescent current to below 2 mA
8 SYNC Converter switching frequency can be synchronized to 1/6 of the clock frequency at this pin.
9 VIN Input supply voltage
10 PGND Low impedance power ground

ORDERING INFORMATION
MSOP-10 MLP33
Standard Standard Lead (Pb)-Free
Part Number Marking Temperature Part Number Part Number Marking Temperature
Si9175DH-T1 9175 −40 to 85_C Si9175DM-T1 Si9175DM-T1—E3 9175 −40 to 85_C
Additional voltage options are available.

Eval Kit Temperature Range Board

Si9175DB −40 to 85_C Surface Mount

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 Si9175
Vishay Siliconix

FUNCTIONAL BLOCK DIAGRAM

VDD VIN
Si9175

PMOS
Current Sense

Error
Amplifier PWM
FB − Comparator PWM and
Clamp − Pulse
REF + LX
+ Skipping
Logic
To IC Bias

Voltage
Reference 2 MHz
UVLO B6
Oscillator

AGND SYNC MODE SD PGND

DETAIL DESCRIPTION
General accomplished in PWM mode to ensure start-up under all load
conditions. Switching to other modes of operation occurs
according to the state of the MODE pin and the load current.
The Si9175 is a high efficiency synchronous dc-dc converter The start-up sequence occurs after SD switches from LOW to
that is ideally suited for lithium ion battery or three cell alkaline HIGH with VIN applied, or after VIN rises above the UVLO
applications, as well as step-down of 3.3-V or 5.0-V supplies. threshold and SD is a logic HIGH.
The major blocks of the Si9175 are shown in the Functional
Block Diagram. The 0.25-W internal MOSFETs switching at a
frequency of 2-MHz minimize PC board space while providing Mode Control (MODE)
high conversion efficiency and performance. The high
frequency error-amplifier with built-in loop compensation
The MODE pin allows the user to control the mode of operation
minimizes external components and provides rapid output
or to enable the Si9175 to automatically optimize the mode of
settling times of <30 ms. Sensing of the inductor current for
operation according to load current. There are three different
control is accomplished internally without power wasting
modes of operation as controlled by the MODE pin. Switching
resistors. The switching frequency can be synchronized to an
waveforms are shown in the Typical Switching Waveform
external 13-MHz clock signal.
sections, page 9.

Start-Up PWM Mode (MODE pin = HIGH)

When voltage is applied to VIN and VDD, the under-voltage With the MODE pin in the logic HIGH condition, the Si9175
lockout (UVLO) circuit prevents the oscillator and control operates as a 2-MHz fixed frequency voltage mode converter.
circuitry from turning on until the voltage on the exceeds 2.4 V. A NMOS synchronous rectification MOSFET transistor
With a typical UVLO hysteresis of 0.1 V, the converter provides very high conversion efficiency for large load currents
operates continuously until the voltage on VIN drops below by minimizing the conduction losses. PWM mode provides low
2.3 V, whereupon the converter shuts down. This hysteresis output ripple, fast transient response, and switching frequency
prevents false start-stop cycling as the input voltage synchronization. Output load currents can range from 0 to
approaches the UVLO switching threshold. Start-up is always 600 mA.

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Si9175
Vishay Siliconix
The error amplifier and comparator control the duty cycle of the nominal. There is hysteresis in the switchover threshold to
PMOS MOSFET to continuously force the REF pin and FB pin provide smooth operation. Thus, the mode PSM-to-PWM
voltages to be equal. As the input-to-output voltage difference mode switchover current for increasing load currents is higher
drops, the duty cycle of the PMOS MOSFET can reach 100% than that of PWM-to-PSM mode switchover for decreasing
to allow system designers to extract the maximum stored load currents.
energy from the battery. The dropout voltage is 190 mV at
600 mA.
Oscillator Synchronization (SYNC)

During each cycle, the PMOS switch current is limited to a

The internal oscillator provides for a fixed 2-MHz switching
maximum of 1.5 A (typical) thereby protecting the IC while
frequency. In order to minimize system noise, the oscillator of
continuing to force maximum current into the load.
the Si9175 can be synchronized to an external clock, typically
an ac-coupled 13-MHz sine wave. An on-chip divide-by-six
Pulse Skipping Mode (MODE pin = OPEN) circuit sets the converter switching frequency to 2.167 MHz in
this mode. The frequency lock range of the synchronization
circuitry is typically 20%. If synchronization is not required, the
By leaving the MODE pin open-circuit, the converter runs in SYNC pin must be tied to GND permitting the internal oscillator
pulse skipping mode (PSM). In PSM mode the oscillator to oscillate at 2 MHz.
continues to operate, but switching only occurs if the FB pin
voltage is below the REF voltage at the start of each clock
cycle. Clock cycles are skipped thereby reducing the Dynamic Output Voltage Control (REF)
switching frequency to well below 100 kHz and minimizing
switching losses for improved efficiency at loads under The Si9175 is designed with an adjustable output voltage
150 mA. Although PSM mode switching frequency varies with
which has a change of VFB to VIN − VDROP. VOUT is defined
line and load conditions, the minimum PSM frequency will be according to the following relationship:
kept above 20 kHz for load currents of 30 mA or more to
prevent switching noise from reaching the audio frequency
range.

Each time the PMOS switch is turned on, the inductor current
ǒ
VOUT + 1 )
R1
R2
Ǔ VFB

is allowed to reach 300 mA. Once achieved, the PMOS switch

is turned off and the NMOS switch is turned on in the normal
manner. However, unlike PWM mode, the NMOS switch, turns
off as the switch current approaches zero current to maximize Converter Shutdown (SD pin)
efficiency. The PMOS switch remains on continuously (100%
duty cycle) when the input-voltage-to-output-voltage
difference is low enabling maximum possible energy With logic LOW level on the SD pin, the Si9175 is shutdown.
extraction from the battery. Shutdown reduces current consumption to less than 2-mA by
shutting off all of the internal circuits. Both the PMOS and
NMOS transistors are turned off. A logic HIGH enables the IC
PSM mode is recommend for load currents of 150 mA or less. to start up as described in “Start-up” section.

Auto Mode Thermal Shutdown

When the MODE pin grounded, the converter is set to Auto The Si9175 includes thermal shutdown circuitry, which turns
mode. Switching between PWM mode and PSM modes takes off the regulator when the junction temperature exceeds
place automatically without an external control signal. For 165_C. Once the junction temperature drops below 145_C,
heavy load operation, the converter will operate in PWM mode the regulator is enabled. If the condition causing the over
to achieve maximum efficiency. When delivering light load temperature, the Si9175 begins thermal cycling, turning the
currents, the converter operates in PSM mode to conserve regulator on and off in response to junction temperature.
power. The switchover threshold between the two modes is Restart from a thermal shutdown condition is the same as
determined by the peak inductor current, which is 300 mA described in the “Start-up” section.

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 Si9175
Vishay Siliconix

APPLICATIONS CIRCUIT

BATT
VIN 2.2 mH VOUT
LX
CIN C1 VDD
10 mF COUT
C2 Si9175 4.7 mF
R1
PGND

13 MHz SYNC

FB

ENABLE SD REF REF

R2
PWM/PSM/AUTO MODE AGND
CIN = 10 mF, Ceramic, Murata GRM42-2X5R106K16
C1, C2 = 0.01 mF, Vishay VJ0603Y 104KXXAT
COUT = 4.7 mF, Ceramic, Murata GRM42-6X5R475K16
R1 = 8.2 kW, Vishay CRCW06031132F
R2 = 20 kW, Vishay CRCW06032002F
L1 = 2.2 mH, Toko A914BYW-2R2M

TYPICAL CHARACTERISTICS

VSDH

SD VSDL
tr tf

ten Undefined
(Load Dependent)

VOUT

Time
d Indicates VOUT settles to $2% of the final value.

Figure 1. PWM Mode VOUT Settling

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 Si9175
Vishay Siliconix

TYPICAL CHARACTERISTICS

Auto Mode Efficiency vs. Load Dropout Voltage vs. ILOAD

100 200
VIN = 3.6 V

95
160
VOUT = 3.0 V VIN = 2.6 V

Dropout Voltage (mV)

90
Efficiency (%)

120 VIN = 3.6 V

85 VOUT = 1.9 V
80

80 VIN = 5.5 V

40
75

0
70 0 100 200 300 400 500 600
0 100 200 300 400 500 600

Load Current (mA) Load Current (mA)

PSM vs. PWM Efficiency

100
PWM
Efficiency (%)

95
PSM VOUT Ripple
90 100
85 VIN = 3.6 V
VOUT = 1.9 V
80 PSM COUT = 4.7 mF
80
VOUT Ripple (mVp-p)

75
0 100 200 300 400 500 600

Load Current (mA) 60

Auto Mode Efficiency vs. Load Direction 40

100
Load Decreasing
95 20
Efficiency (%)

90 Load Increasing PWM

85
0
80 0 30 60 90 120 150
75 Load Current (mA)
0 100 200 300 400 500 600

Load Current (mA)

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Vishay Siliconix

TYPICAL SWITCHING WAVEFORMS (VIN = 3.6 V, VOUT = 3.0 V)

PWM mode Heavy-Load Switching Waveforms, PWM Mode Medium-Load Switching Waveforms,
IOUT = 600 mA, MODE = HIGH IOUT = 300 mA, MODE = HIGH

VLX, 5 V/div VLX, 2 V/div

Inductor Current Inductor Current

500 mA/div 500 mA/div

VOUT
(AC-Coupled) VOUT
10 mV/div (AC-Coupled)
10 mV/div

200 nS/div 200 nS/div

PWM Mode Light-Load Switching Waveforms, PSM Mode Light-Load Switching Waveforms,
IOUT = 0 mA, MODE = HIGH IOUT = 150 mA, MODE = OPEN

VLX, 5 V/div
VLX, 5 V/div

Inductor Current Inductor Current

200 mA/div 200 mA/div

VOUT VOUT
(AC-Coupled) (AC-Coupled)
10 mV/div 10 mV/div

200 nS/div 1.0 mS/div

PSM Mode Light-Load Switching Waveforms,

IOUT = 30 mA, MODE = OPEN

VLX, 5 V/div

Inductor Current
200 mA/div

VOUT
(AC-Coupled)
100 mV/div

2.0 mS/div

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Si9175
Vishay Siliconix

TYPICAL WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V)

PWM Mode Heavy-Load Switching Waveforms, PWM Mode Medium-Load Switching Waveforms,
IOUT = 600 mA, MODE = HIGH IOUT = 300 mA, MODE = HIGH

VLX, 5 V/div VLX, 5 V/div

Inductor Current
500 mA/div Inductor Current
500 mA/div

VOUT VOUT
(AC-Coupled) (AC-Coupled)
10 mV/div 10 mV/div

200 nS/div 200 nS/div

PWM Mode Light-Load Switching Waveforms, PSM Mode Light-Load Switching Waveforms,
IOUT = 0 mA, MODE = HIGH IOUT = 150 mA, MODE = OPEN

VLX, 5 V/div
VLX, 5 V/div

Inductor Current
Inductor Current 200 mA/div
200 mA/div

VOUT
(AC-Coupled) VOUT
10 mV/div (AC-Coupled)
100 mV/div

200 nS/div 1.0 mS/div

PSM Mode Light-Load Switching Waveforms,

IOUT = 30 mA, MODE = OPEN

VLX, 5 V/div

Inductor Current
200 mA/div

VOUT
(AC-Coupled)
100 mV/div

2.0 mS/div

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Vishay Siliconix

TYPICAL START-UP AND SHUTDOWN TRANSIENT WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V)

Start-Up, RLOAD = 4 W Start-Up, VIN = VSD = 3.6 V, RLOAD = 4 W

VIN, VSD, 1 V/div

VSD, 1 V/div

VOUT, 500 mV/div

VOUT, 500 mV/div

20 mS/div 20 mS/div

Shutdown, RLOAD = 4 W Enable Switching, RLOAD = 4 W

VSD, 1 V/div VSD 1 V/div

VOUT, 500 mV/div

VOUT, 500 mV/div

200 mS/div 20 mS/div

TYPICAL MODE SWITCH TRANSIENT WAVEFORM

Output Transient At Mode Switch, ILOAD = 30 mA

VOUT
(AC-Coupled)
200 mV/div

Mode Pin
1 V/div

100 mS/div

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Vishay Siliconix

TYPICAL LOAD TRANSIENT WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V)

Load Transient, Auto Mode, ILOAD = 30 to Load Transient, PWM Mode,
500 mA, MODE = LOW ILOAD = 30 to 500 mA, L = 2.2 mH, MODE= HIGH

ILOAD, 200 mA /div ILOAD, 200 mA /div

VOUT VOUT
(AC-Coupled) (AC-Coupled)
50 V/div 50 mV/div

10 mS/div 10 mS/div

Load Transient (PSM Mode),

ILOAD = 30 to 150 mA, L = 2.2 mH

ILOAD, 200 mA /div

VOUT
(AC-Coupled)
50 mV/div

100 mS/div

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12 S-41148—Rev. C, 14-Jun-04
 Legal Disclaimer Notice
Vishay

Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.

Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.

Document Number: 91000 www.vishay.com

Revision: 08-Apr-05 1
 Package Information
Vishay Siliconix

MSOP: 10-LEADS (POWER IC ONLY)

JEDEC Part Number: MO-187, (Variation AA and BA)

(N/2) Tips)
5 2X
N N-1 A B C 0.20

0.48 Max
0.60

Detail “B”
(Scale: 30/1)
E Dambar Protrusion

0.50 1 2 N/2
0.60 0.08 M C B S A S
b 7
Top View
b1
e1
With Plating
e
A
See Detail “B”
c1 c

0.10 C
6
Section “C-C”
-H- A1 Seating Plane Base Metal Scale: 100/1
D (See Note 8)
-A-
3

Side View See Detail “A”

0.25 C
BSC
Parting Line
0.07 R. Min C
2 Places ς
Seating Plane A2 0.05 S E1
L 4 -B-
T -C- 3
0.95
End View
Detail “A”
(Scale: 30/1)
NOTES:
1. Die thickness allowable is 0.203"0.0127. N = 10L
2. Dimensioning and tolerances per ANSI.Y14.5M-1994. MILLIMETERS
3. Dimensions “D” and “E1” do not include mold flash or protrusions, and are Dim Min Nom Max Note
measured at Datum plane -H- , mold flash or protrusions shall not exceed
0.15 mm per side.
A − − 1.10
A1 0.05 0.10 0.15
4. Dimension is the length of terminal for soldering to a substrate.
A2 0.75 0.85 0.95
5. Terminal positions are shown for reference only. b 0.17 − 0.27 8
6. Formed leads shall be planar with respect to one another within 0.10 mm at b1 0.17 0.20 0.23 8
seating plane. c 0.13 − 0.23
7. The lead width dimension does not include Dambar protrusion. Allowable c1 0.13 0.15 0.18
Dambar protrusion shall be 0.08 mm total in excess of the lead width
D 3.00 BSC 3
dimension at maximum material condition. Dambar cannot be located on the
lower radius or the lead foot. Minimum space between protrusions and an E 4.90 BSC
adjacent lead to be 0.14 mm. See detail “B” and Section “C-C”. E1 2.90 3.00 3.10 3
8. Section “C-C” to be determined at 0.10 mm to 0.25 mm from the lead tip. e 0.50 BSC

9. Controlling dimension: millimeters. e1 2.00 BSC

L 0.40 0.55 0.70 4
10. This part is compliant with JEDEC registration MO-187, variation AA and BA.
N 10 5
11. Datums -A- and -B- to be determined Datum plane -H- . T 0_ 4_ 6_
12. Exposed pad area in bottom side is the same as teh leadframe pad size. ECN: S-40082—Rev. A, 02-Feb-04
DWG: 5922

Document Number: 72817 www.vishay.com

28-Jan-04 1
 Package Information
Vishay Siliconix

MLP33Ć10 (POWER IC ONLY)

JEDEC Part Number: Outline is consistent with JEDEC MO229-VEED-2
Detail D
4xQ
// ccc C

A2
A
A1
NX
0.08 C A3

Side View
Seating
Detail C C
Plane
e NX b 5
L2
bbb M C A B
1 2
ddd M C
D A

ÉÉÉ
Detail C L + L2 L2 B

ÇÇ
ÉÉÉ
ÇÇ
ÉÉÉ
A1

ÎÎÎÎ
R2

ÎÎÎÎ
Detail D Detail A E

N
N-1
6
0.20 Ref
7
4 Pin 1
Mark
ÎÎÎÎ
ÎÎÎÎ
Detail B aaa C 2 X 1
(ND-1) x e L2
TopView
Bottom View 7 2X aaa C

Datum A or B Datum A or B

NX R1 NX R1

e2/2 L2

e Terminal Tip e Terminal Tip

5 5

Even Terminal/Side Detail B Odd Terminal/Side

L1

L2 0.17
B
0.30

This Feature Applies To

Both Ends of The Package
Exposed Metalized Feature

Detail A Edge of Plastic Body

Document Number: 72819 www.vishay.com

28-Nov-05 1
Package Information
Vishay Siliconix

MLP33Ć10 (POWER IC ONLY)

N = 10 PITCH: 0.50 mm, BODY SIZE: 3.00 x 3.00

MILLIMETERS* INCHES
Dim Min Nom Max Min Nom Max Notes
A 0.80 0.90 1.00 0.031 0.035 0.039 1, 2
A1 0 0.025 0.05 0 0.001 0.002 1, 2
A2 0.65 0.70 0.75 0.026 0.028 0.030 1, 2
A3 0.15 0.20 0.25 0.006 0.008 0.010 1, 2
aaa – 0.10 – – 0.004 – 1, 2
b 0.20 0.25 0.30 0.008 0.010 0.012 5, 11
bbb – 0.10 – – 0.004 – 1, 2
ccc – 0.10 – – 0.004 – 1, 2
D 3.00 BSC 0.118 BSC 1, 2
ddd – 0.05 – 0.002 1, 2
E 3.00 BSC 0.118 BSC 1, 2
e – 0.5 – – 0.002 –
e2 1.10 1.20 1.30 0.043 0.047 0.051 1, 2, 9
L 0.45 0,58 0.65 0.018 0.023 0.026 1, 2
L1 0.20 0.29 0.45 0.008 0.012 0.018 1, 2
L2 – – 0.125 – – 0.005 5, 11
N 10 10 3
ND 5 5 6
R1 Ref – 0.100 – – – 5, 11
R2 Ref – 0.075 – – 0.003 – 1, 2
Q 0_ 10_ 12_ 0_ 10_ 12_ 1, 2
* Use millimeters as the primary measurement.

ECN: S-52448—Rev. B, 28-Nov-05

DWG: 5924

NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.

2. All dimensions are in millimeters. All angels are in degrees.

3. N is the total number of terminals.

4. The terminal #1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must
be located within the zone indicated. The terminal #1 identifier may be a molded, marked, or metallized feature.

5. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.20 mm from the terminal tip.

6. ND refers to the maximum number of terminals on the D side.

7. Profile tolerance (aaa) will be applicable only to the plastic body and not to the metallized features (such as the terminal tips and tie bars.) Metallized
features may protrude a maximum of L2 from the plastic body profile.

8. The corner will be sharp unless otherwise specified with radius dimensions.

9. Package outline is consistent with JEDEC M0229-VEED-2.

www.vishay.com Document Number: 72819

2 28-Nov-05
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www.vishay.com
Vishay
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Revision: 02-Oct-12 1 Document Number: 91000