SIEMENS EDA

HyperLynx® Advanced
Solvers User Guide
Release VX.2.10
Document Revision 7
Unpublished work. © 2021 Siemens

This material contains trade secrets or otherwise confidential information owned by Siemens Industry Software, Inc.,
its subsidiaries or its affiliates (collectively, "Siemens"), or its licensors. Access to and use of this information is
strictly limited as set forth in Customer's applicable agreement with Siemens. This material may not be copied,
distributed, or otherwise disclosed outside of Customer's facilities without the express written permission of
Siemens, and may not be used in any way not expressly authorized by Siemens.

This document is for information and instruction purposes. Siemens reserves the right to make changes in
specifications and other information contained in this publication without prior notice, and the reader should, in all
cases, consult Siemens to determine whether any changes have been made. Siemens disclaims all warranties with
respect to this document including, without limitation, the implied warranties of merchantability, fitness for a
particular purpose, and non-infringement of intellectual property.

The terms and conditions governing the sale and licensing of Siemens products are set forth in written agreements
between Siemens and its customers. Siemens' End User License Agreement may be viewed at:
www.plm.automation.siemens.com/global/en/legal/online-terms/index.html.

No representation or other affirmation of fact contained in this publication shall be deemed to be a warranty or give
rise to any liability of Siemens whatsoever.

TRADEMARKS: The trademarks, logos, and service marks ("Marks") used herein are the property of Siemens or
other parties. No one is permitted to use these Marks without the prior written consent of Siemens or the owner of
the Marks, as applicable. The use herein of third party Marks is not an attempt to indicate Siemens as a source of a
product, but is intended to indicate a product from, or associated with, a particular third party. A list of Siemens'
trademarks may be viewed at: www.plm.automation.siemens.com/global/en/legal/trademarks.html. The registered
trademark Linux® is used pursuant to a sublicense from LMI, the exclusive licensee of Linus Torvalds, owner of the
mark on a world-wide basis.

Support Center: support.sw.siemens.com

Send Feedback on Documentation: support.sw.siemens.com/doc_feedback_form
 Revision History ISO-26262

Revision Changes Status/Date

7 Modifications to improve the readability and comprehension of the Released
content. Approved by Kevin Chupp. September
All technical enhancements, changes, and fixes listed in the 2021
VX.2.10 Release Notes and VX.2.10 Release Highlights for this
product are reflected in this document. Approved by Mike Bare.
6 Modifications to improve the readability and comprehension of the Released
content. Approved by Regis Krug. November
All technical enhancements, changes, and fixes listed in the VX.2.8 2020
Release Notes and VX.2.8 Release Highlights for this product are
reflected in this document. Approved by Mike Bare.
5 Modifications to title page to reflect the latest product version Released
supported. Approved by Regis Krug. March 2020
All technical enhancements, changes, and fixes listed in the VX.2.7
Release Notes and VX.2.7 Release Highlights for this product are
reflected in this document. Approved by Mike Bare.
4 Modifications to title page to reflect the latest product version Released
supported. Approved by Regis Krug. September
All technical enhancements, changes, and fixes listed in the VX.2.6 2019
Release Notes and VX.2.6 Release Highlights for this product are
reflected in this document. Approved by Mike Bare.

Author: In-house procedures and working practices require multiple authors for documents. All
associated authors for each topic within this document are tracked within the Siemens
documentation source. For specific topic authors, contact the Siemens Digital Industries
Software documentation department.

Revision History: Released documents include a revision history of up to four revisions. For
earlier revision history, refer to earlier releases of documentation on Support Center.

HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
4 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Table of Contents

Revision History ISO-26262

Chapter 1
Solving Work Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Characterizing Interconnect and Signal Vias With Full-Wave Solver . . . . . . . . . . . . . . . . . 13
Characterizing Interconnect and Signal Vias With Full-Wave Solver HPC in Partition Mode 14
Characterizing Interconnect and Signal Vias With Hybrid Solver . . . . . . . . . . . . . . . . . . . . 15
Extracting Package and PCB Interconnect Models With Fast 3D Solver . . . . . . . . . . . . . . . 17
Extracting Package and PCB Interconnect Models From Layout Software . . . . . . . . . . . . . 18
Extracting Impedance Profiles for a Power-Distribution Network . . . . . . . . . . . . . . . . . . . . 18
Extracting Package Loop Inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Extracting PCB Loop Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Evaluating Design Variations With 3D Explorer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Measuring DC Power Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Visualizing Signal Return Paths and PDN Current Paths . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Measuring Near and Far Fields (EMI/EMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Chapter 2
Opening and Verifying a Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Creating a New Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Creating a New Project From an Existing Simulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Opening an Existing Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Combining Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Merging Models. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Verifying That the Software Correctly Recognizes Your Design . . . . . . . . . . . . . . . . . . . . . 35
Adding a Note to a Project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Finding an Object. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Saving a Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Viewing Design History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Chapter 3
Importing a Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Importing an Apache XFL Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Importing a Cadence Allegro Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Importing a CIF Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Importing a DXF Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Importing a GDS Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Importing an IPC-2581 or JEITA LPB Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Importing a Siemens EDA CCE Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Importing an Open Database (ODB++) Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Importing a Zuken PCF Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Importing Zuken RIF Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

HyperLynx® Advanced Solvers User Guide, VX.2.10 5

 Table of Contents

Preparing to Import an Allegro Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Configuring the Software to Import a DXF Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Selecting Nets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Remapping a Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Adding a Lead Frame Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Finding and Adjusting Overlapping Bond Wires . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Remapping Bond Wires. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Bond Wire Remapping Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Chapter 4
Preparing to Solve a Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Adding a Simulation to a Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Cropping a Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Cropping By Nets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Cropping Graphically . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Matched Boundary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Adding an External Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Adding Ports to a Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Adding a Port Between Nets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Adding a Port Between Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Adding a Port Across a Net . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Editing a Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Creating a Port for Multiple Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Creating Port Extensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Enabling/Disabling Port Extension for Individual Ports . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Port Extension Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Ports Before Extension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Ports After Extension Using Only Shift Reference Pin . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Ports After Extension Using Shift Both Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Ports After Extension Using Create Edge Pins, Shift Both Pins . . . . . . . . . . . . . . . . . . . 110
Adding a Circuit Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Adding a Circuit Model to a Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Creating a Circuit Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Creating a Circuit Model From an Existing Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Using a File to Assign a Circuit Model to a Component . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Assigning a Circuit Model to a Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Importing Pin Information to Automatically Create Circuit Ports . . . . . . . . . . . . . . . . . . . 118
Mapping Pins to Terminals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Mapping Pins Based on Circuit Merge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Adding an Excitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Meshing a Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Preparing to Mesh a Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Creating a Mesh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Importing Mesh Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

6 HyperLynx® Advanced Solvers User Guide, VX.2.10

Table of Contents

Chapter 5
Solving a Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Cable Cross-Section Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers. . . . . . . . . . . . . . 142
Solving for Accelerated Parasitic Extraction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver . . . . . . . . . 153
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver . . . . . . . . . . . . 158
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias . . . . . . . . . . . . . 164
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver . . . . . . . . 172
Solving to Extract Package Loop Inductance Using Fast 3D Solver . . . . . . . . . . . . . . . . . . 180
Running Layout Software to Extract Packaging and PCB Interconnect Models . . . . . . . . . 186
Preparing for RLGC Extraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models
189
Solving to Extract PCB Loop Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Solving to Measure DC Power Resistance and IR Drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
Solving to Measure Near and Far Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Solving to Visualize Signal Return Paths and PDN Current Paths . . . . . . . . . . . . . . . . . . . . 207
Setting Hybrid Solver Options in Full-Wave Solver HPC . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Slider Settings for Fast Frequency Sweep (AFS) Options . . . . . . . . . . . . . . . . . . . . . . . . . . 213

Chapter 6
Exploring Design Variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
3D Explorer Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Using a Wide Design Variation Range Followed by a Narrower Range . . . . . . . . . . . . . . . 222
Evaluating Design Variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

Chapter 7
Viewing and Processing Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
Viewing a Plot or Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Zooming and Other Plot Viewing Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Showing and Hiding a Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
Measuring a Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Measuring a Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Adding Results From Another Simulation or a Touchstone File . . . . . . . . . . . . . . . . . . . . 243
Viewing a Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
Processing Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Creating a Project Report for Design Signoff and Results Archive . . . . . . . . . . . . . . . . . . 245
Creating Current Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Creating Voltage Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
Processing Results and Generating Reports for a Solved Project . . . . . . . . . . . . . . . . . . . 249
Generating Mixed-Mode S-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
Exporting Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Exporting Extracted Parasitics to a SPICE Wrapper File. . . . . . . . . . . . . . . . . . . . . . . . . . 254
Exporting an IBIS Model From RLGC Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Exporting an IBIS Model From S-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
Exporting Net Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
Exporting Results in SPEF Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257

HyperLynx® Advanced Solvers User Guide, VX.2.10 7

 Table of Contents

Exporting a SPICE Netlist From S-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259

Exporting a SPICE Netlist From RLGC Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Exporting a Huygens Box. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Generating an EMI Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
Generating Port Termination Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Generating Touchstone 2.0 Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
Preparing S-Parameter Results for SPICE Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
Enforce Reciprocity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Running a Passivity Check/Enforcement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Enforcing Passivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274

Chapter 8
GUI Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
Project Browser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
Project Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
Technology Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Layout Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
Simulation Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286
Model Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Circuits Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Ports Actions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Excitation Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Mesher Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
Solver Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Results Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
Model Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Edit Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Tools Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Draw Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Select Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
Object Browser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Results Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304

Chapter 9
Support Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307
3D Graphics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309
Setting Up 3D Graphics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309
Verifying Current 3D Graphic Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Creating or Editing a Model Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
Manually Creating a Model Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
Adding Shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Adding Shapes From a Script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
Adding a Complex Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Adding Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Grouping Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Adding Internal Pads for Vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Editing Shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321

8 HyperLynx® Advanced Solvers User Guide, VX.2.10

Table of Contents

Moving, Resizing, Rotating, or Mirroring Objects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 322

Duplicating Objects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Maximum Deviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
CAPLIB File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Adding a Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Verifying Added Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Console Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Creating a Default Port Configuration File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Editing a Padstack Database . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
Example Engine Options Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
Exporting a Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Guidance for Solving RL and GC Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Launching the Scripting Environment From the GUI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Opening HyperLynx Advanced Solvers Tools on Linux . . . . . . . . . . . . . . . . . . . . . . . . . . . 341
Padstack Via Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341
PDN Decoupling Optimizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Product Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Sample of Exported IBIS Model File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Solder Mask Layer Modeling - Conformal Coat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Importing a Technology From a File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Editing a Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Editing Stackup Layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Editing Stackup Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 358
Defining Package Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359
Use Pin Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
Using the Solve Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
Vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363

Chapter 10
Reference - Dialog Boxes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365
Configuration Options Dialog Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366
Configuration Options Dialog Box, General Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367
Configuration Options Dialog Box, EDA Link Tab. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368
Configuration Options Dialog Box, Save Data Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 369
Configuration Options Dialog Box, Display Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 370
Configuration Options Dialog Box, Advanced Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 372
Create New Results Dialog Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373

Appendix 11
Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
Solving With LSF Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 376
Solving With AWS Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379
Solving With HPC Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 380
Solving With HyperLynx Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 382
Solving With Local Mode — Linux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 384

HyperLynx® Advanced Solvers User Guide, VX.2.10 9

 Table of Contents

Solving With Local Mode — Windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387

Script Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391
Prerequisites for Running Scripts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391
Script Examples and Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393
Example Scripts - LSF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393
Example Scripts - SGE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394
Example Script - Windows HPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
Example Scripts That Use an Options File. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396
Descriptions for Script Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398
Job Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400
Supporting Information for Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Creating a Cluster - HyperLynx or LSF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Creating a Cluster - AWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
Configuring a Machine for a HyperLynx or LSF Cluster . . . . . . . . . . . . . . . . . . . . . . . . . 406
Configuring Your Computer to Access an AWS VPC. . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
Creating a Secure Shell (SSH) Private Key . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411
Creating a Directory Mapping File for LSF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
Machine Configuration Requirements for LSF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413
Machine Configuration Requirements for HyperLynx Job Distribution . . . . . . . . . . . . . . 414
Opening the HyperLynx Job Distribution Dialog Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414
Terminology for Job Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415

Appendix 12
Technology (TECH) File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
Stackup Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
Layers Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
Materials Section Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 419
Bond Wires Section Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 419
Solder Balls Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
Solder Bumps Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Background Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
External Reference Section Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Third-Party Information

10 HyperLynx® Advanced Solvers User Guide, VX.2.10

 Chapter 1
Solving Work Flows

The HyperLynx Advanced Solvers tools provide a variety of solving capabilities to help you
evaluate your post-layout design or define your pre-layout design.
For your post-layout design, you can validate that it meets performance requirements. You can
also make “what if” design and stackup variations to help you determine changes that improve
design performance.

For your pre-layout design, you can define interconnect and stackup properties that meet
performance requirements. You can also make “what if” design variations to help you define a
range of design properties that meet performance requirements.
Topic Description
Characterizing Interconnect and Signal Vias Measure insertion loss, return loss, and other
With Full-Wave Solver frequency domain behaviors for signal nets.
Full-Wave Solver HPC and Full-Wave Solver
provide accurate measurements, even for vias
and other forms of interconnect with complex
or poor return paths.
Characterizing Interconnect and Signal Vias Measure insertion loss, return loss, and other
With Full-Wave Solver HPC in Partition Mode frequency domain behaviors for signal nets.
Full-Wave Solver HPC can accurately measure
the performance of regions of signal nets with
complex or poor return paths (such as a via),
and Hybrid Solver can accurately (and
quickly) measure the performance of regions
of signal nets with uniform return paths.
Characterizing Interconnect and Signal Vias Measure insertion loss, return loss, and other
With Hybrid Solver frequency domain behaviors for signal nets.
The Hybrid Solver runs quickly and can help
you evaluate full nets on your design.
Extracting Package and PCB Interconnect Use Fast 3D Solver to extract parasitic RLGC
Models With Fast 3D Solver values for signal nets in package or board
designs. The software can report nets whose
parasitic RLGC values exceed constraints, and
create IBIS model RLC pin parasitics for each
net.

HyperLynx® Advanced Solvers User Guide, VX.2.10 11

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows

Topic Description
Extracting Package and PCB Interconnect Use Analysis Control from a Siemens EDA
Models From Layout Software layout tool to extract parasitic RLGC values
for signal nets in package or board designs.
The software can report nets whose parasitic
RLGC values exceed constraints, and create
IBIS model RLC pin parasitics for each net.
Extracting Impedance Profiles for a Power- Measure power-distribution network (PDN)
Distribution Network impedance over a frequency range.
Extracting Package Loop Inductance Measure loop inductance for nets in a package
design.
Extracting PCB Loop Inductance Measure loop inductance for nets in a board
design.
Evaluating Design Variations With 3D Determine a range of design variations that
Explorer produce acceptable insertion loss, return loss,
and other performance requirements.
Measuring DC Power Loss Find metal areas, stitching vias, and other
structures in a power-distribution network
(PDN) with high DC power loss.
Visualizing Signal Return Paths and PDN Find return paths with high current density for
Current Paths signal nets or a power-distribution network
(PDN).
Measuring Near and Far Fields (EMI/EMC) Find structures that emit excessive radiation or
fail to shield excessive radiation, which can
cause your design to exceed electromagnetic
interference (EMI) or electromagnetic
compatibility (EMC) limits. You can observe
how external radiation sources affect your
design. You can also plot electric, magnetic, or
power density fields emitted by your design or
received by your design (from external
radiation sources).
To see video webcasts that summarize tool capabilities and solving work flows:
Webcast Title Support Center KB Article
Choosing the Right Simulator for Your Application MG609527
Setting up and Running Simulations in Advanced Solvers MG610786

12 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Characterizing Interconnect and Signal Vias With Full-Wave Solver

Characterizing Interconnect and Signal Vias

With Full-Wave Solver
Measure insertion loss, return loss, and other frequency domain behaviors for signal nets. Full-
Wave Solver HPC and Full-Wave Solver provide accurate measurements, even for vias and
other forms of interconnect with complex or poor return paths.

Related Topics
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

HyperLynx® Advanced Solvers User Guide, VX.2.10 13

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Characterizing Interconnect and Signal Vias With Full-Wave Solver HPC in Partition Mode

Characterizing Interconnect and Signal Vias

With Full-Wave Solver HPC in Partition Mode
Measure insertion loss, return loss, and other frequency domain behaviors for signal nets. Full-
Wave Solver HPC can accurately measure the performance of regions of signal nets with
complex or poor return paths (such as a via), and Hybrid Solver can accurately (and quickly)
measure the performance of regions of signal nets with uniform return paths.
For example, you can efficiently characterize a full SERDES channel on a PCB, by partitioning
a channel into regions to solve with Full-Wave Solver HPC and regions to solve with Hybrid
Solver.

Restriction
Hybrid Solver does not support a design containing multiple stackups, such as a design with
rigid and flexible areas.

14 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Characterizing Interconnect and Signal Vias With Hybrid Solver

Related Topics
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

Characterizing Interconnect and Signal Vias

With Hybrid Solver
Measure insertion loss, return loss, and other frequency domain behaviors for signal nets. The
Hybrid Solver runs quickly and can help you evaluate full nets on your design.

HyperLynx® Advanced Solvers User Guide, VX.2.10 15

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Characterizing Interconnect and Signal Vias With Hybrid Solver

You can use this information to identify nets that you want to further evaluate with Full-Wave
Solver (by itself or in partition mode).

Restriction
Hybrid Solver does not support a design containing multiple stackups, such as a design with
rigid and flexible areas.

Related Topics
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

16 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Extracting Package and PCB Interconnect Models With Fast 3D Solver

Extracting Package and PCB Interconnect

Models With Fast 3D Solver
Use Fast 3D Solver to extract parasitic RLGC values for signal nets in package or board
designs. The software can report nets whose parasitic RLGC values exceed constraints, and
create IBIS model RLC pin parasitics for each net.
Restriction
Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.

Related Topics
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

HyperLynx® Advanced Solvers User Guide, VX.2.10 17

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Extracting Package and PCB Interconnect Models From Layout Software

Extracting Package and PCB Interconnect

Models From Layout Software
Use Analysis Control from a Siemens EDA layout tool to extract parasitic RLGC values for
signal nets in package or board designs. The software can report nets whose parasitic RLGC
values exceed constraints, and create IBIS model RLC pin parasitics for each net.
Restriction
Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.

Related Topics
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models

Extracting Impedance Profiles for a Power-

Distribution Network
Measure power-distribution network (PDN) impedance over a frequency range.

18 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Extracting Impedance Profiles for a Power-Distribution Network

Find the minimum number of capacitors needed to meet the target PDN impedance. Evaluate
decoupling capacitor mounting technologies, such as via-in-pad, microvias, and X2Y
capacitors. Evaluate dielectric properties for embedded capacitors, such as C-ply material or
ultra-thin thickness.

HyperLynx® Advanced Solvers User Guide, VX.2.10 19

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Extracting Package Loop Inductance

Extracting Package Loop Inductance

Measure loop inductance for nets in a package design.

Related Topics
Solving to Extract Package Loop Inductance Using Fast 3D Solver

20 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Extracting PCB Loop Inductance

Extracting PCB Loop Inductance

Measure loop inductance for nets in a board design.
Restriction
Hybrid Solver does not support a design containing multiple stackups, such as a design with
rigid and flexible areas.

Related Topics
Solving to Extract PCB Loop Inductance

HyperLynx® Advanced Solvers User Guide, VX.2.10 21

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Evaluating Design Variations With 3D Explorer

Evaluating Design Variations With 3D Explorer

Determine a range of design variations that produce acceptable insertion loss, return loss, and
other performance requirements.
3D Explorer can help you quickly set up many “what-if” design variations, run a solver on each
variation, and consolidate results into a report. For a pre-layout design, this capability can help
you design key interconnect elements, such as a differential signal via pair and nearby stitching
vias. For a post-layout design, this capability can help you verify that your design performs
acceptably when accounting for PCB manufacturing tolerances and material property
variations. For a post-layout design and nets with via transitions, you can also evaluate the
effects of making pre-layout design changes (such as adding or moving stitching vias).

Restriction
3D Explorer does not support a design containing multiple stackups, such as a design with
rigid and flexible areas.

22 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Evaluating Design Variations With 3D Explorer

Related Topics
Evaluating Design Variations

HyperLynx® Advanced Solvers User Guide, VX.2.10 23

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Measuring DC Power Loss

Measuring DC Power Loss

Find metal areas, stitching vias, and other structures in a power-distribution network (PDN)
with high DC power loss.
Restriction
Hybrid Solver does not support a design containing multiple stackups, such as a design with
rigid and flexible areas.

Related Topics
Solving to Measure DC Power Resistance and IR Drop

24 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Visualizing Signal Return Paths and PDN Current Paths

Visualizing Signal Return Paths and PDN

Current Paths
Find return paths with high current density for signal nets or a power-distribution network
(PDN).

Related Topics
Solving to Visualize Signal Return Paths and PDN Current Paths

HyperLynx® Advanced Solvers User Guide, VX.2.10 25

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Measuring Near and Far Fields (EMI/EMC)

Measuring Near and Far Fields (EMI/EMC)

Find structures that emit excessive radiation or fail to shield excessive radiation, which can
cause your design to exceed electromagnetic interference (EMI) or electromagnetic
compatibility (EMC) limits. You can observe how external radiation sources affect your design.
You can also plot electric, magnetic, or power density fields emitted by your design or received
by your design (from external radiation sources).

26 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving Work Flows
Measuring Near and Far Fields (EMI/EMC)

Related Topics
Solving to Measure Near and Far Fields

HyperLynx® Advanced Solvers User Guide, VX.2.10 27

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving Work Flows
Measuring Near and Far Fields (EMI/EMC)

28 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 2
Opening and Verifying a Design

Begin your solve by creating or importing a design, defining package connections and verifying
the model is properly set up. You can also manage your project by combining models, adding a
note to a project and viewing design history.

Topic Description
Creating a New Project Create a new project to set up a Simulation.
Creating a New Project From an Existing Create a Project by copying a Simulation from
Simulation an existing Project.
Opening an Existing Project Open an existing project to set up and run a
simulation.
Combining Models Combine model layers to create a new model
with a single stackup. The models are placed
side-by-side, defined by a single stackup.
Merging Models Simulate a package and a board together by
merging two models. This allows you to
simulate, for example, Chip-Package-Board,
Package on Package (PoP), System in Package
(SiP), or Multi-Chip Module (MCM)
configurations.
Verifying That the Software Correctly After importing your design, check the
Recognizes Your Design Technology to make sure all of the information
is correct.
Adding a Note to a Project Add details about your project or simulation to
the project to keep track of project differences.
Finding an Object Search for and access objects in your design.
Saving a Project Save your project, rename your project, save a
project in an older version of the software, save
a project report and save a project as a
compressed zip file.
Viewing Design History Open recent projects and designs for easy
access.

HyperLynx® Advanced Solvers User Guide, VX.2.10 29

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Creating a New Project

Creating a New Project

Create a new project to set up a Simulation.
Note
If you already have a post-layout design, you can import it and automatically create a new
project. See “Importing a Design” on page 41.

Procedure
1. From the Main Window, choose the File > New Project menu item.
The New Project dialog box opens.
2. Type the project name in the Name field.
3. Click Browse to specify the directory for the project files.
4. Click OK.
Results
The new project displays in Project Browser with the associated Technology and Layout.
You can now add a new simulation from the Project context menu. Right-click a project name
and choose Add Simulation.

Creating a New Project From an Existing

Simulation
Create a Project by copying a Simulation from an existing Project.
Prerequisites
• You have a saved Project open containing at least one Simulation.
Procedure
1. In Project Browser, right-click a Simulation and choose the Copy Simulation to a New
Project menu item.
The software copies the Simulation and all related data to a new Project and opens the
Save Project As dialog box.
2. Specify a unique name for the new Project.
3. Click Save.

30 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Opening and Verifying a Design
Opening an Existing Project

Results
The new project appears in Project Browser, the model displays in the Model window and the
model details appear in Object Browser.

Opening an Existing Project

Open an existing project to set up and run a simulation.
Procedure
1. From the Main Window, choose the File > Open Project menu item.
The Open Project dialog box opens.
2. Select the Project File (.phys file extension) to open.
3. Click Open.
Results
As the project opens, the Status Messages Window populates with messages about the Project.
When the message “Project: ‘<ProjectName>’ Loaded Successfully” displays you can begin
work on the project. The Project Browser and Object Browser populate with Project data.

HyperLynx® Advanced Solvers User Guide, VX.2.10 31

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Combining Models

Combining Models
Combine model layers to create a new model with a single stackup. The models are placed side-
by-side, defined by a single stackup.

32 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Opening and Verifying a Design
Combining Models

Prerequisites
• More than one model is open in the tool.
• The stackup layers are defined for each model.
Procedure
1. In the main toolbar, click Design and choose the Combine Models menu item.
The Combine Models dialog box opens displaying the available models.
2. Use the dropdown to set the order of the combination. The software combines the
models by placing them side-by-side, left (model 1) to right (model 2).
3. Click each cell to set the parameter coordinates for each model:

Parameter Description
Translation Starting point coordinates for model.
Rotation Degrees of rotation.
Rotation Origin Rotation axis.

4. Type a unique name in New Project Name.

5. Click Apply and Close.
Results
The software combines the models and creates a new project with the given name. You are now
ready to add a simulation to the project.

HyperLynx® Advanced Solvers User Guide, VX.2.10 33

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Merging Models

To view the new model, in Project Browser, right-click Layout and choose the View > View
Layout Model menu item.
To save the new project, in Project Browser, right-click the new project name and choose the
Save > Save Project menu item.
Related Topics
Project Actions

Merging Models
Simulate a package and a board together by merging two models. This allows you to simulate,
for example, Chip-Package-Board, Package on Package (PoP), System in Package (SiP), or
Multi-Chip Module (MCM) configurations.
Procedure
1. Open the two project models you want to merge.

2. Choose the Design > Merge Models menu item or click on the Main Window.

The Merge Projects dialog box opens.

When you add a pin map, the pins are highlighted in the Model window.
3. Select the models to merge.
4. Specify the pin alignment.
a. Under Align By Pins, search for the pins in each project using the pin filters.
b. Select pins from each project.
c. Click Add Pin Map to add the mapping to the Pin Map Table.
d. Continue to map all pins in the model.
5. Select the net naming scheme to use and type in any suffixes you want to use.
6. For Other Options, select options as needed.

Option Description
Keep Pins at Merge Interface Checked, keeps all the pins that exist on both models
after merging.
Unchecked, removes all component pins that exist
on both models after merging. This option prevents
the creation of ports “inside” the new structure.

34 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Opening and Verifying a Design
Verifying That the Software Correctly Recognizes Your Design

Option Description
Auto Connect All Matching Pins Checked, the merge automatically connects all
matching pins between models.
Unchecked, only the selected pin pairs are
connected during the model merge.
7. Click Apply.
Results
The software creates a new project named “<Project1Name>+<Project2Name>”). The layers
and nets are renamed to identify the new layers and nets.

Verifying That the Software Correctly

Recognizes Your Design
After importing your design, check the Technology to make sure all of the information is
correct.
Restrictions and Limitations
• Hybrid Solver and Fast 3D Solver do not support designs with multiple stackups, such
as a design with rigid and flexible areas.
Prerequisites
• You have imported a design into a project. See “Importing a Design” on page 41.
Procedure
1. In Project Browser, right-click Technology and choose the Edit Technology menu
item.
The Technology dialog box opens.
2. Step through each tab and verify the parameters are correctly set for your design.
Especially check the correctness of metal or dielectric shape and bond wire parameters.
See “Technology” on page 350.
If you need to edit more than one layer at a time, check Bulk Edit Layers, select the
edits, then click Apply.
3. Click Apply, then click Close.
4. For a design that includes multiple stackups (such as a combination of rigid and flexible
areas), in Project Browser, right-click Technology and choose the Edit Stackup Areas
menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 35

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Adding a Note to a Project

Use this version of the Technology dialog box to specify the location, rigid or flexible
layer type, and set of layers for each region (that is,“stackup area”). See “Editing
Stackup Areas” on page 358.
5. Click Apply, then click Close.
Results
Now that your have verified your project model, you can add a Simulation. See “Adding a
Simulation to a Project” on page 72.

Adding a Note to a Project

Add details about your project or simulation to the project to keep track of project differences.
Procedure
1. In Project Browser, right-click a Project or Simulation name and choose the File > Edit
Notes menu item.
2. Type your notes into the text editor.
Results
A “Notes” object appears in Object Browser. The software saves the note to a Notes.txt file
when you save your project. You can also click the Save icon to immediately save your notes.

Finding an Object
Search for and access objects in your design.
Note
You can also use Object Browser filters to find an object. See “Object Browser” on
page 301.

Procedure
1. Do any of the following:
• In Project Browser, right-click Layout then choose the View > Find/Select Objects
menu item.
• In the Model window, choose the Select > Find/Select Objects menu item.
• Use the keyboard shortcut Ctrl-Shift-F.
The Find Objects dialog box opens.
2. Select at least one object, any number of nets (including no nets), and any number of
layers (including no layers).

36 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Opening and Verifying a Design
Saving a Project

Use the filters in each column to limit the available object types, nets and layers.
You can filter shapes, pins, bond wires, solder balls, leads, and so on by the name, net,
and layer. You can also filter out objects by enabling the box located below the filter
fields. Enabling this option excludes the string you type into the filter box.
If you do not specify any nets or layers, the software searches all nets and layers.
3. Set finding options:

If you want to... Do the following...

Limit the search to objects you can Check “Find Items Visible in the Current
see in the Model window Window Only (XY Plane View)”
Limit the search to objects you Check “Find Among Selected Objects
selected in Object Browser Only”

4. Do any of the following:

If you want to... Do the following...

Clear the Found Objects list and search for all Objects in Click Select
the given Nets and the given Layers
Add items to the list without clearing the list Click Add
Clear all objects from the Found Objects list Click Clear

Results
The Found Objects list displays found objects.
You can filter found objects by vias, padstack, and filter components by part number using the
“Other Filter” field.

Saving a Project
Save your project, rename your project, save a project in an older version of the software, save a
project report and save a project as a compressed zip file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 37

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Saving a Project

Procedure
In Project Browser, right-click a Project name, select the Save menu item, then do one of the
following:

If you want to... Do the following...

Save a project 1. Choose the Save Project menu item.
The software saves the project files in the project
directory.
Save a project under another 1. Choose the Save Project As menu item.
name 2. In the Save Project As dialog box, navigate to
the new location.
3. Type a new project name.
4. Click Save.
The software saves the new project files in the
directory you specify.
Save a report or 1. Choose the Save Project Report or Save
Save a report under a Project Report As menu item.
different name 2. In the Save Project Report/Save Project
Report As dialog box, navigate to the new
location.
3. Type a new report name.
4. Click Save.
The software saves the new project files in the
directory you specify.
Save a project in an older 1. Choose the Save Project As Older Version
version of the software menu item.
2. Select a version, then click OK.
3. In the Save Project As dialog box, navigate to
the new location.
4. (Optional) Type a new project name.
5. Click Save.
The software saves the new project files in the
directory you specify.

38 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Opening and Verifying a Design
Viewing Design History

If you want to... Do the following...

Save a project as a single 1. Choose the Save Compressed Project or
compressed zip file Save Compressed Project as Older Version
menu item.
2. If needed, select a version, then click OK.
3. In the Save Project As dialog box, navigate to
the new location.
4. (Optional) Type a new project name.
5. Click Save.
The software saves the new project files in the
directory you specify.

Results
The Status Messages Window displays “Project: ‘<ProjectName>’ Saved Successfully” when
the project is saved and ready.

Viewing Design History

Open recent projects and designs for easy access.
Procedure
From the tool bar on the Main Window, choose either of the following menu items:

• History > Recent Projects > project_name

• History > Recent Designs > design_name
Results
The project or design opens.

HyperLynx® Advanced Solvers User Guide, VX.2.10 39

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Opening and Verifying a Design
Viewing Design History

40 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 3
Importing a Design

Import a design to create a project. The most common design files to import are Cadence®
Allegro® multi-chip module (MCM), board (BRD), and system-in-package (SIP) files. For
more detailed designs, you can modify and save an HLAS Physical ASCII Model (.pam) design
file and open the file in Advanced Solvers.

Topic Description
Importing an Apache XFL Design Use this procedure to import an Apache® XFL design into
the tool.
Importing a Cadence Allegro Use this procedure to import a Cadence® Allegro® design
Design into the tool.
Importing a CIF Design Use this procedure to import a CIF design into the tool.
Importing a DXF Design Use this procedure to import a DXF design into the tool.
Importing a GDS Design Use this procedure to import a GDS design into the tool.
Importing an IPC-2581 or JEITA Use this procedure to import an IPC-2581 or JEITA LPB
LPB Design design into the software.
Importing a Siemens EDA CCE You can import a Siemens EDA CCE design into the tool.
Design
Importing an Open Database You can import an ODB++ design into the tool.
(ODB++) Design
Importing a Zuken PCF Design Use this procedure to import a Zuken design into the tool.
You must first export the Zuken design to an ASCII
format, which you can then import into the tool.
Importing Zuken RIF Design Use this procedure to import a Zuken RIF design into the
tool. You must first export the Zuken design to an RIF
format, which you can then import.
Preparing to Import an Allegro To import a Cadence® Allegro® board design, perform the
Design steps in this procedure.
Configuring the Software to Import Use this procedure to configure the software to import a
a DXF Design DXF design.
Selecting Nets When importing a design file, you can select a subset of all
available nets in the design file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 41

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing an Apache XFL Design

Topic Description
Remapping a Layer When importing a design from a file, you must sometimes
remap certain layers of a geometry to an appropriate
stackup layer or type. Once you import or create a design,
and before finalizing the design, you can merge layers
together, convert layers to holes (or shapes), pins, or bond
wires using the Layer Remap dialog box.
Adding a Lead Frame Layer You can add a Lead Frame layer using the Technology
dialog box.
Finding and Adjusting Overlapping After importing a design, the software can find
Bond Wires overlapping bond wires and adjust them for you.
Remapping Bond Wires You can convert layer wire shapes to bond wires when
bond wires cannot be directly specified. You can remap a
layer to any existing stackup layer or Bond Wire layer.
Bond Wire Remapping Example The following example shows how to convert a regular
layer into a Bond Wire layer.

Importing an Apache XFL Design

Use this procedure to import an Apache® XFL design into the tool.
Procedure
1. From the Main Window tool bar, choose the Design > Import Design File menu item.
The Open Design File dialog box opens.
2. Select the XFL file and click Open.
The software scans the selected design file for the available nets to import.
3. Use the Net Selection options to select the nets to import and set the net type.
4. Specify the minimum number of segments you want the software to use when drawing a
circle or Arc. Also set the Maximum Deviation.
5. For Padstack Options, choose Buried or Through for the via drill type.
6. If the pad shapes and antipad shapes in the design are similar on the same layer, check
the option and type in scaling factors to help the software render the design so you can
properly distinguish the pads from the antipads.
7. Click OK.

42 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing a Cadence Allegro Design

Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a Cadence Allegro Design

Use this procedure to import a Cadence® Allegro® design into the tool.
Prerequisites
• You have performed the steps in “Preparing to Import an Allegro Design” on page 55.
Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
The Import Design dialog box opens.
2. Click Browse and select the Cadence Allegro design file.
The software extracts the Technology, Padstack, and Net information and populates the
corresponding boxes in the Import Design dialog box.
3. Edit the Technology file before importing by clicking Change to view and/or modify
the Technology.
The Technology dialog box opens. See “Editing Stackup Layers” on page 352.
4. Remap the layers of your design before importing by clicking Remap Layers.
The Layer Remap dialog box opens. See “Remapping a Layer” on page 59.
5. Edit the Padstack before importing by clicking Change to view and/or modify the
Padstack.
The Edit Padstack dialog box opens.

HyperLynx® Advanced Solvers User Guide, VX.2.10 43

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing a CIF Design

6. To edit the nets to import, see “Selecting Nets” on page 58.

7. Set the Allegro reader options:

If you want to... Do the following...

Import components that do Check “Keep Unconnected Nets”
not have a net assigned
Correct some issues Check “Cadence Allegro 16 Bond Wires”
interpreting designs generated
with versions 16.X and up of
Allegro
Avoid importing ground Check Extract Meshed Ground Planes
surfaces defined as lattices
which contain too many
polygons that slow the display
of the design

8. Click OK.
Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The project has the same name as the Allegro design file. To change the Project name, click the
name in Project Browser and type a unique name. The technology is extracted from the Allegro
file along with the layout to the Project level. However, the simulations are not initialized.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Preparing to Import an Allegro Design
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a CIF Design

Use this procedure to import a CIF design into the tool.

44 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing a DXF Design

Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
The Open Design File dialog box opens.
2. Select the CIF file and click Open.
The Import Design dialog box opens.
The path to the selected file appears in the Design File entry.
3. (Optional) To override the technology imported from the file with a custom Technology
file, type the file path in the Technology File field.
4. To manually change the technology before importing the design, click Change to open
the Technology dialog box. See “Technology” on page 350.
5. To remap layers before importing the design, click Remap Layers. See “Remapping a
Layer” on page 59.
6. Click OK.
Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a DXF Design

Use this procedure to import a DXF design into the tool.
Prerequisites
• You have a valid copy of Artwork ASM 3500 (DXF to GDS).

HyperLynx® Advanced Solvers User Guide, VX.2.10 45

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing a DXF Design

• If this is the first time you are importing a DXF design, you have configured the
Artwork ASM software. See “Configuring the Software to Import a DXF Design” on
page 57.
Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
The Import Design dialog box opens.
2. Click Browse and select the DXF design file to import.
3. Edit the Technology before importing the file.
a. Click Change to view and/or modify the Technology.
b. In the Layer Selection section, include or exclude layers by selecting the layer and
using the Add, Remove, Add All, and Remove All buttons.
c. Modify parameters for the DXF design file using the DXF Reader Options section:

Option Description
Units The length units to use when importing a DXF design.
Possible values (UM = Micrometers, MM = Millimeters,
CM = Centimeters, INCH = Inches, MIL = 1/1000th Inch).
Resolution Tells the DXF to GDS Executable how much resolution to
use when scanning a DXF design file and how much
resolution to use when writing the GDS data. For example,
if the units are in MM (Millimeters), a resolution of 1000
means all edges larger than 1 Micrometer (1/1000th of a
Millimeter) are used. Typically, the default resolution of
1000 works well.
Link Lines and Arcs This option (checked by default) links lines with arcs. When
going from DXF to GDSII, any lines and arcs are connected
to form closed areas.
Line Link Radius This is the radius (in the specified units) to use when linking
lines to arcs (currently not used).
Arc Resolution Number of segments to use (per 360 degrees) when
(Segments) resolving arcs and circles. When importing a DXF design,
arcs and circles must be fractured. This value defines the
number of segments used to create an arc or circle. Valid
range: 4 to 20; typical values: 6 to 12 segments.
Arc Sag When importing a DXF design, arcs and circles must be
fractured. This value defines the maximum “difference”
between the true arc and the approximated arc. A “dynamic”
fracturing occurs so that large radius arcs get more segments
than small radius arcs. Set to 0 to disable this parameter.

46 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing a GDS Design

Option Description
De-embed Data Checked, activates de-embedding and the GDSII output is
organized using data types to indicate the boundary's level
of embedding. This allows for holes inside polygons.
4. Click OK to create a new project using the included layers and options of the specified
DXF design file.
Results
Project Browser and Object Browser populate with DXF design project data.
The project is given the name of the DXF design file. To change the Project name, click the
name in Project Browser and type a unique name.
After the DXF design file is read into the tool, verify that your layer assignments are correct.
See “Remapping a Layer” on page 59 for details.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Configuring the Software to Import a DXF Design
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a GDS Design

Use this procedure to import a GDS design into the tool.
The main difference between a GDS import and an Allegro import is that net information and
detailed Technology information are not available with GDS design files.

Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
2. Click Browse and select the GDS design file.
The software scans the GDS design file for layers and structures. Supported GDS
extensions include .gds, .gdsii, .gds2, .sf, and .strm.
3. Edit the Technology before importing a design.
a. Click Change to view and/or modify the Technology.

HyperLynx® Advanced Solvers User Guide, VX.2.10 47

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing a GDS Design

b. In the Layer Selection section, you can include or exclude layers using the Add,
Remove, Add All, and Remove All buttons.
The GDS importer takes the GDS layer number as the layer name of the stackup and
assumes that all layers are CONDUCTOR layers with PEC as the conductor material
and AIR as the dielectric material. The importer also assumes the layer thickness is
50 um.
See “Technology” on page 350 for information.
4. Use the GDS Reader Options section to modify different parameters for the GDS design
File:

Option Description
Top-Level Structure The name of the structure to use as the overall design.
Select from a list of possible structure names, with the
unreferenced structure names listed at the top.
Units The length units to use when importing a GDS design.
Possible values (UM = Micrometers, MM = Millimeters,
CM = Centimeters, INCH = Inches, MIL = 1/1000th
Inch).
Unite Shapes Checked, takes all of the shapes on the same layer and
same net and combines them together into one shape
(using regional decomposition).
Cluster Vias Choose No, Auto, or Radius. This allows for clustering
of via arrays into larger, simpler structures. Select No to
disable clustering. Select Auto to combine small vias into
larger polygons using a radius based on the design
dimensions. Select Radius to specify the clustering
radius.
Use Data Type For Checked, uses the Pin Data Type value from the GDS
Pin Information File to determine the Pin Shapes
Use Text For Net Checked, uses text from the GDS File to determine the
Label net information.
Use Text For Pin Checked, uses text from the GDS File to determine the
Label pin information.

5. Click OK to create a new project using the included layers and options of the specified
GDS design file.
Results
Project Browser and Object Browser populate with GDS design Project data. The project is
given the name of the GDS design file.

48 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing an IPC-2581 or JEITA LPB Design

After the GDS design file is read into the tool, verify that your layer assignments are correct.
See “Remapping a Layer” on page 59 for details.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing an IPC-2581 or JEITA LPB Design

Use this procedure to import an IPC-2581 or JEITA LPB design into the software.
Procedure
1. Import a design file:
a. From the main toolbar, choose the Design > Import Design File menu item.
The Open Design File dialog box opens.
b. To help you locate your file, set the file type to “IPC2581 or JEITA LPB (*.xml)”.
c. Select the design file and click Open.
The Import Design dialog box opens
The file you selected to import displays in the Design File field and all of the nets
found in the design file display in the Unselected Nets column.
2. Add nets to the import:
a. Select specific nets and click Add, or click Add All.
The selected nets display in the Selected Nets column.
b. (Optional) Identify specific nets as signal, power, or ground nets by selecting a net
and clicking either Make Signal Net, Make Ground Net, or Make Power Net.

Note
This step is recommended to avoid net definition issues during simulation setup.

3. Define the resolution for circle and arc creation. Hover over each field to see a tooltip
for guidance.
4. Click OK.

HyperLynx® Advanced Solvers User Guide, VX.2.10 49

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing a Siemens EDA CCE Design

Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a Siemens EDA CCE Design

You can import a Siemens EDA CCE design into the tool.
Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
The Import Design dialog box opens.
2. Click Browse and select the CCE design file.
The software scans the CCE design file for the available nets to import.
3. (Optional) Edit the Technology field before importing by clicking Change to view and/
or modify the Technology. See “Technology” on page 350.
4. Use the Net Selection options to change which nets are imported, and the net type.
5. Enable “Unite features of Hatched Planes on import” to merge trace segments or other
objects used to implement a hatched plane layer.
Enabling this option simplifies the meshed model and reduces simulation run time.
6. Enable “Ignore Plane Data Traces on import” to import hatched shapes as shapes-plus-
parameters, and ignore discrete traces.
Disable (uncheck) this option to import discrete traces instead.
7. Set the Circle/Arc resolution for the import by specifying the number of segments to use
(per 360 degrees) when resolving arcs and circles.

50 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing an Open Database (ODB++) Design

When importing a design, arcs and circles are fractured. This value defines the number
of segments the software uses to create an arc or circle. Valid range is 4 to 20; typical
values are 6 to 12 segments.
8. Click OK to create a new project using the selected Nets and options of the specified
CCE design file.
Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing an Open Database (ODB++) Design

You can import an ODB++ design into the tool.
Procedure
1. From the Main Window, choose the Design > Import Design File menu item.
2. Click Browse and select the ODB++ design file.
The software scans the ODB++ design file for the available nets to import and displays
them in the Import Design dialog box.
3. Use the Net Selection options to change which nets are imported, and the net type:

Option Description
Include Test Points as Test Pins Reads the netlist file contained in the ODB++
design and creates two pins for each middle test
point defined and associates them to two new
components: TESTING_TOP and
TESTING_BOTTOM. These pins may be useful
for simulations.

HyperLynx® Advanced Solvers User Guide, VX.2.10 51

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing a Zuken PCF Design

Option Description
Remove features smaller than Simplifies some conflictive shapes (such as self
minimum size intersecting polygons), that can generate glitches
during simulation.
Include features with no net Imports pads and drill holes that are included in
assigned layers but are not associated with a net. They
may be required for complete net connectivity.
Apply Rout Layers if present Automatically performs the cuttings you specify
in the ROUT layers in the design, after import.
Note: This can be time consuming.
Mils per ounce of Copper Constant that the software uses to calculate the
thickness of the conductive layers. This value
differs slightly depending on the tool you use to
export to ODB++.
4. Click OK.
Results
The software imports the design and creates a project in Project Browser using the selected Nets
and options of the specified ODB++ design file. The resulting model displays in the Model
window and elements display in Object Browser.
The project is given the name of the ODB++ design file. To change the Project name, click the
name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing a Zuken PCF Design

Use this procedure to import a Zuken design into the tool. You must first export the Zuken
design to an ASCII format, which you can then import into the tool.
Prerequisites
• You have exported a Zuken design to an ASCII format.
• All required files (.pcf and .ftf files) are in the same directory.

52 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Importing a Zuken PCF Design

Procedure
1. Configure the software to import a Zuken PCF design.
a. From the Main Window, choose the Options > EDA Link menu item or click the
EDA Link icon.
The EDA Link tab of the Configuration Options dialog box opens.
b. Click Browse in the Zuken Options section and choose the Zuken installation
directory.
The Zuken executable file field automatically updates with the full path to the
executable if one is found in the Zuken installation subdirectory.
c. Click OK.
You are now ready to import a Zuken PCF design.
2. From the Main Window, choose the Design > Import Design File menu item.
The Import Design dialog box opens.
3. Click Browse and select the .pcf design file.
The software scans the Zuken design file for the available nets to import.
4. Use the Zuken Reader Options to modify how to import the nets and elements:

Option Description
Guess Net Types from Some Zuken designs do not specify whether nets are
Names power, ground or signal. Use this option to allow the
software to infer the net type is property based on the
name of the net. Checked, this option scans the list of nets
again, and the type of each net is inferred by its name.
Import Elements without Some Zuken designs specify elements (such as pins),
Net without assigning them to a net. Checked, any element
with no net specified is assigned to a ZUKEN_DUMMY
net.

5. Specify the minimum number of segments to use when approximating circles in the
layout (typical values are 8-12). The higher the number, the better the approximation,
and the longer the simulation time.
Also specify the Maximum Deviation.
6. For Padstack Options, choose Buried or Through for the via drill type.
7. If the pad shapes and antipad shapes in the design are similar on the same layer, check
the option and type in scaling factors to help the software render the design so you can
properly distinguish the pads from the antipads.

HyperLynx® Advanced Solvers User Guide, VX.2.10 53

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Importing Zuken RIF Design

8. Click OK.
Results
A new project using the included nets and options of the specified PCF design file appears in
Project Explorer.
The software imports the design and creates a project in Project Browser with the Technology
and Layout using the included nets and options of the specified PCF design file. The resulting
model displays in the Model window and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Importing Zuken RIF Design

Use this procedure to import a Zuken RIF design into the tool. You must first export the Zuken
design to an RIF format, which you can then import.
Prerequisites
• You have exported a Zuken design to an ASCII format.
Procedure
1. Configure the software to import a Zuken RIF design.
a. From the Main Window, choose the Options > EDA Link menu item or click the
EDA Link icon.
The EDA Link tab of the Configuration Options dialog box opens.
b. Click Browse in the Zuken Options section and choose the Zuken installation
directory.
The Zuken executable file field automatically updates with the full path to the
executable if one is found in the Zuken installation subdirectory.
c. Click OK.
You are now ready to import a Zuken RIF design.

54 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Preparing to Import an Allegro Design

2. From the Main Window, choose the Design > Import Design File menu item.
The Import Design dialog box opens.
3. Click Browse and select the .pcf design file.
The software scans the design file for the available nets to import.
4. Enable Pre-Scan Technology/Components to read the technology inside the file,
allowing you to modify it before importing the design.
5. Specify the minimum number of segments you want the software to use when drawing a
circle or arc.
Also set the Maximum Deviation.
6. For Padstack Options, choose Buried or Through for the via drill type.
7. If the pad shapes and antipad shapes in the design are similar on the same layer, check
the option and type in scaling factors to help the software render the design so you can
properly distinguish the pads from the antipads.
8. Click OK.
Results
The software imports the design and creates a project in Project Browser with the Technology
and Layout as defined by the imported file. The resulting model displays in the Model window
and elements display in Object Browser.
The name of the project defaults to the imported design filename. To change the Project name,
click the name in Project Browser and type a unique name.
The next step is to look for any interpretation errors that can occur during the importing process.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
Related Topics
Cropping a Model
Merging Models
Selecting Nets
Technology

Preparing to Import an Allegro Design

To import a Cadence® Allegro® board design, perform the steps in this procedure.
Prerequisites
• You have installed and licensed Extracta on the same computer as Allegro. Licensing is
required for Extracta 17.4 and newer.

HyperLynx® Advanced Solvers User Guide, VX.2.10 55

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Preparing to Import an Allegro Design

Note
It is not sufficient to copy the Extracta executable file to a computer.

Procedure
1. Specify the location of the Extracta executable file (extracta):
a. From the Main Window, choose the Options > EDA Link menu item.
The Configuration Options dialog box opens to the EDA Link tab.
b. In the Allegro Install Directory field, specify the Cadence Allegro installation folder.
The Allegro Extract File field automatically displays the location of the executable
file.
c. Click OK.
2. If you have installed HyperLynx Advanced Solvers and Allegro on the same computer,
you are ready to open your board design. See “Importing a Cadence Allegro Design” on
page 43.
3. If you have installed HyperLynx Advanced Solvers and Allegro on different computers:
a. On the computer with HyperLynx Advanced Solvers:
i. With a file manager, browse to this folder:
Windows®: \MentorGraphics\<release>\SDD_HOME\Nimbic\bin

Linux1: /MentorGraphics/<release>/SDD_HOME/Nimbic/lib
ii. Decide whether to copy batch and control files to:
• The folder containing your design.
You must copy the files for every design you translate.
• Another folder.
You copy the files once for any number of designs, but you must specify the
full path to a design when you translate board design files in step 3.b.
iii. Copy the following files to the computer with your Allegro board design:
control_extracta1.txt
control_extracta2.txt
Windows: extract_allegro.cmd
Linux: extract_allegro.sh

1. Linux is a registered trademark of Linus Torvalds in the U.S. and other countries.

56 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Configuring the Software to Import a DXF Design

iv. If you have Extracta 16.5 or older, copy these additional files:
control_extracta1_NO_TIELEGS.txt
control_extracta2_NO_ZONES.txt
b. On the computer with your Allegro board design:
i. Open a command window and change to the folder that contains your board
design.
ii. Translate your design to ASCII files:
If you copied batch and Run this command...
control files to a folder
that...
Contains the design extract_allegro.cmd <design_name>.brd
Does not contain the design <full_path>\extract_allegro.cmd <design_name>.brd

Note
On a computer running Linux, run extract_allegro.sh.

Extracta creates 12 ASCII files that represent your board design, including
<design_name>.exb and several files starting with <design_name>_ and ending
with .ext.
iii. Copy the .exb and .ext files to a folder on the computer with HyperLynx
Advanced Solvers.
c. On the computer with HyperLynx Advanced Solvers, open the <design_name>.exb
file to load your board design. See “Importing a Cadence Allegro Design” on
page 43.
Related Topics
Importing a Cadence Allegro Design

Configuring the Software to Import a DXF

Design
Use this procedure to configure the software to import a DXF design.
Prerequisites
• You have a valid copy of Artwork ASM 3500 (DXF to GDS).
Procedure
1. From the Main Window, choose the Options > EDA Link menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 57

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Selecting Nets

The EDA Link tab of the Configuration Options dialog box opens.
2. Click Browse in the DXF to GDS Executable section and select the DXF to GDS
executable file (d2g.exe).
3. Click OK.
Results
You are now ready to import a DXF design. See “Importing a DXF Design” on page 45.
Related Topics
Importing a DXF Design

Selecting Nets
When importing a design file, you can select a subset of all available nets in the design file.
Nets are listed in different colors according to type:

• Red for SIGNAL nets

• Green for GROUND nets
• Blue for POWER nets
The type is obtained from the information in the design itself during import.

Restrictions and Limitations

• You cannot select nets for GDS and DXF formats.
Procedure
1. Locate the nets you want to select by filtering by Net Name or Net Type.
a. Double-click in the Type Filter box to get suggestions for Net Types. You can also
perform a Reverse Filter that displays the nets that do not match the filter. Include or
exclude nets.
b. Select the nets of interest.
c. Click Add, Remove, Add All, or Remove All.
2. (Optional) Change net types:
a. Select a net.
b. Click the appropriate Make Signal/Ground/Power Net button, located in the center
of the dialog box.

58 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Remapping a Layer

Related Topics
Verifying That the Software Correctly Recognizes Your Design
Preparing to Solve a Design

Remapping a Layer
When importing a design from a file, you must sometimes remap certain layers of a geometry to
an appropriate stackup layer or type. Once you import or create a design, and before finalizing
the design, you can merge layers together, convert layers to holes (or shapes), pins, or bond
wires using the Layer Remap dialog box.
Restrictions and Limitations
• You can remap a layer for a project layout, but not for a simulation layout.
• You can remap a layer only to an existing stackup layer.
Prerequisites
• You have imported a design into the tool. See “Importing a Design” on page 41.
Procedure
1. In Project Browser, expand Project, right-click Layout, then choose the Edit > Remap
Layers menu item.
The Layer Remap dialog box opens.
The layers are listed in current order with the possible options for remapping layers in
the row of the layer.
2. Edit the layer mapping as needed:
a. Specify the type of mapping you want to apply to each layer.
Based on the mapping type, the software takes all shapes from the given layer and
puts them on all layers from the Start Layer to the (optional) End Layer.
Mapping options include:
Mapping Option Description
Copy Copies all shapes.
Shape Moves all shapes.
Hole Moves all shapes and converts them to holes.
And Moves all shapes, performing the Boolean AND
operation with existing shapes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 59

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Remapping a Layer

Mapping Option Description

Subtract Moves all shapes, performing the Boolean
SUBTRACT operation with existing shapes.
Pin Moves all shapes and converts them to pins.
PIN_TOP Moves all shapes and converts them to pins on the top
surface of the metal.
PIN_BOTTOM Moves all shapes and converts them to pins on the
bottom surface of the metal.
Bondwire Moves all shapes and converts them to Bond Wires.
See “Remapping Bond Wires” on page 66.
Dielectric Moves all shapes and converts them to dielectric.
Conformalcoat Moves all shapes and converts them to conformal
coat. This splits the layer into two layers during the
mesh to represent a solder mask.
See “Adding a Lead Frame Layer” on page 61
b. Specify the start layer, which is the first layer for the remapping.
c. (Optional) Specify the end layer, which is the last layer for the remapping.
3. (Optional) Perform multiple remaps on the same layer. Use the Add and Delete buttons
to add layer remaps or perform multiple remaps on the same layer.
4. (Optional) Use the Order column to specify the order to perform each remap. You can
remap multiple layers at a time.
5. Click Apply.
Results
After remapping the layers in your design, you can export the remapping setup to use again. Use
the Import button to bring the remapping settings back into the tool to streamline the
remapping process.
If you are remapping the layers after importing your design, the next step is to look for any
interpretation errors that can occur during the importing process. See “Verifying That the
Software Correctly Recognizes Your Design” on page 35.
Related Topics
Solder Mask Layer Modeling - Conformal Coat
Adding a Lead Frame Layer
Remapping Bond Wires

60 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Adding a Lead Frame Layer

Adding a Lead Frame Layer

You can add a Lead Frame layer using the Technology dialog box.
Procedure
1. In Project Browser, right-click Technology and choose the Edit Technology menu
item.
2. On the Lead Frames tab, click “+” to add a lead frame layer.
3. Type in the lead frame parameters:

Note
See the Examples section (below) for illustrations of the parameters % Top, %
Bottom and Grow Tolerance.

Parameter Description
Length Specifies the length of the lead frame.
Height Specifies the height of the lead frame.
Thickness Specifies the thickness of the lead frame.
% Top Specifies the length of the top portion of the lead as a
percentage of the total length (0-100).
% Bottom Specifies the length of the bottom portion of the lead as a
percentage of the total length (0-100).
Support Layer Specifies the layer where the top of each lead attaches, with
the lead frame hanging down from the support layer.
Termination Specifies the layer where the pin (bottom) of the lead attaches
Layer (typically this is the lead frame itself).
Material Specifies the layer material.
Grow Tolerance Specifies the distance from the convex hull polygon that
determines if the edge is a proper edge for attaching a lead. A
convex hull polygon is the shape that forms if you put a really
tight rubber band around the layer metal.
Color Specifies the color of the lead frames when it displays in the
3D Model window.

4. Verify that the background material is correct.

5. Click Apply, then Close.

HyperLynx® Advanced Solvers User Guide, VX.2.10 61

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Adding a Lead Frame Layer

Results
You can finalize the model. Leads are added automatically on the edges of the specified support
layer. An example of leads added to a package layer follows.

Examples
Use the illustrations below to help you visualize and define the lead frame parameters % Top, %
Bottom and Grow Tolerance.

%Top and %Bottom

This parameter refers to how the total length of the lead is distributed between the top and
bottom of the frame.

62 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Adding a Lead Frame Layer

Grow Tolerance
The software automatically add leads to the edges of metal. To determine where to place the
lead, the software locates the edges that are on the very outer edge of the design (black line).

Figure 3-1. Convex Hull for Determining Lead Placement

In some designs, a numerical error exists, or the design contains areas where leads purposely re-
moved, and the edges of the metal do not fall on the convex hull of the layer (as shown in
Figure 3-1 by the edges in the blue ellipses).

When a numerical error occurs, the software uses Grow Tolerance to allow the addition of leads
to these locations, with edges that are not required to lie on the convex hull. This is why

HyperLynx® Advanced Solvers User Guide, VX.2.10 63

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Adding a Lead Frame Layer

Figure 3-2 is missing four leads (the same edges in the blue ellipses in Figure 3-1) and why
XREF3 has leads on all outer edges (even the ones that are slightly off from the convex hull).

Figure 3-2. Layout With Missing Leads

64 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Finding and Adjusting Overlapping Bond Wires

Figure 3-3. Layout With Leads Extending Past Convex Hull

Finding and Adjusting Overlapping Bond

Wires
After importing a design, the software can find overlapping bond wires and adjust them for you.
Note
This topic does not describe using the Traces or Pins tabs on the Model Adjustments dialog
box. Please rely on tooltips for information about options on those tabs.

Prerequisites
• Your model contains bond wires.
Procedure
1. In Object Browser, expand the BondWireGroups branch, then do either of the
following:
• Right-click a bond wire group, then choose the Bond Wire Groups > Fix Bond
Wire Overlaps menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 65

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Remapping Bond Wires

• Right-click an individual bond wire, then choose the Bond Wires > Fix Bond Wire
Overlaps menu item.
The software identifies overlapping bond wires that exist in your model, but does not
display a list of them.
The Model Adjustments dialog box opens.
2. Adjust overlapping bond wires:
a. On the Bond Wires tab, check “Adjust Bond Wires” to adjust the bond wire start
points to avoid collisions and enable access to additional options.
b. Enable other adjustment options as needed. See tooltips for a description of each
option.

Note
The software calculates a bond wire shift by multiplying the Adjustment Factor
by the Maximum Bond Wire diameter (defined in the Diameter column on the
Bond Wires tab of the Technology dialog box).

c. Click OK.

Remapping Bond Wires

You can convert layer wire shapes to bond wires when bond wires cannot be directly specified.
You can remap a layer to any existing stackup layer or Bond Wire layer.
For example, when reading a DXF File, bond wires cannot be specified. Instead, the file defines
bond wire using wires or polygons. Rather than deleting these wires and adding the bond wires
manually, you can remap the wires to bond wires using the Layer Remap dialog box.

Procedure
1. Add a Bond Wire layer in the Technology dialog box.
a. In Project Browser, right-click Technology and choose the Edit Technology menu
item.
The Technology dialog box opens.
b. On the Bond Wires tab, click “+” to add a bond wire.
c. Set the support and termination layers to something other than the layer you are
remapping. Otherwise the software will not know where to attach the bond wire.
d. Click Apply.
2. In Project Browser, right-click Layout and choose the Edit > Remap Layers menu
item.

66 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Bond Wire Remapping Example

3. Change the Map Type of the “WIRE” Layer to “BONDWIRE” and change the Start
Layer of the “WIRE” Layer to the name of the bond wire you created in Step 1.
4. Click Apply.
Results
The Bond Wires are now 3-dimensional and are connected to the bottom layer.
Related Topics
Bond Wire Remapping Example

Bond Wire Remapping Example

The following example shows how to convert a regular layer into a Bond Wire layer.
Start with the DXF layout shown in Figure 3-4, where there are paths or polygons instead of
Bond Wires (since bond wires cannot be represented in a DXF file). These paths are shown in
green. These paths are 2-Dimensional input shapes, not 3-Dimensional Bond Wires.

Figure 3-4. Original Wire Layer in Green (Shown From the Top)

Notice that the wires are not connected to the bottom layer, since they are 2-Dimensional
shapes, not Bond Wires.

HyperLynx® Advanced Solvers User Guide, VX.2.10 67

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Bond Wire Remapping Example

Figure 3-5. Original Wire Layer in Green (Shown in 3D)

Add a Bond Wire layer using the Technology dialog box. You must set the Support Layer and
Termination Layer to something other than the layer you are remapping. Otherwise the software
will not know where to attach the Bond Wire.

Figure 3-6. Adding a Bond Wire Layer in the Technology Dialog Box

After you add a Bond Wire layer and set the proper Support and Termination Layers, use the
Remap Layers dialog box to remap the Layer. Access the Remap Layers dialog box as shown in
Figure 3-7. Change the Map Type of the “WIRE” Layer to “BONDWIRE” and change the Start
Layer of the “WIRE” Layer to the name of the newly added Bond Wire (in this case
“BONDWIRE0”).

68 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Importing a Design
Bond Wire Remapping Example

Figure 3-7. Layer Remap Dialog Box - Remapping WIRE to BONDWIRE0

Click Apply to convert the WIRE layer to Bond Wires, as shown in Figure 3-8 and Figure 3-9.
Notice that the Bond Wires are now connected to the bottom layer, since they are 3-
Dimensional Bond Wires.

Figure 3-8. Bond Wires Created from Wire Layer (Shown From the Top)

HyperLynx® Advanced Solvers User Guide, VX.2.10 69

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Importing a Design
Bond Wire Remapping Example

Figure 3-9. Bond Wires Created from Wire Layer (Shown in 3D)

Related Topics
Remapping Bond Wires

70 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 4
Preparing to Solve a Design

Create a simulation, set up your design model, assign pins and ports, define excitation and mesh
your design before you run a solve.

Topic Description
Adding a Simulation to a Project Use a simulation to focus solving on a specific region
of your design and a specific set of nets, or to
perform “what if” analysis by changing technology
and layout properties.
Cropping a Model Crop a model to reduce the runtime and resources
needed to mesh and solve.
Matched Boundary When cropping a model, a matched boundary defines
the boundary on every cropped layer between the
first and last isolation layers. The purpose of a
matched boundary is to suppress cavity resonances.
Adding an External Reference An external reference is a plane that provides a
reference for pins at the end of solder balls or solder
bumps. On a package, an external reference
represents the die ground at the solder bumps and the
board ground at the solder balls.
Adding Ports to a Model Add ports to a model to define where you want to
observe design behavior, terminate pins, or excite
pins. After defining a Layout for a project simulation,
you can assign ports to pins.
Adding a Circuit Model Use a circuit model to include the electrical behavior
of a component in simulation. Although an imported
layout includes component layout footprints, a circuit
model must be attached to the component to include
electrical properties in a simulation.
Adding an Excitation You can specify a port excitation or an external
excitation. A port excitation represents voltages or
currents applied to a specific port. An external
excitation represents a wave excitation that is located
outside your model layout. For example, you can use
an external excitation to see how well shielding
structures in your model layout prevent
electromagnetic energy from reaching structures
being shielded.

HyperLynx® Advanced Solvers User Guide, VX.2.10 71

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Simulation to a Project

Topic Description
Meshing a Model After the physical model is finished (model is
finalized and ports are defined), you can set mesh
options and create a mesh to simulate.

Adding a Simulation to a Project

Use a simulation to focus solving on a specific region of your design and a specific set of nets,
or to perform “what if” analysis by changing technology and layout properties.
Prerequisites
• You have imported or created a design and verified your design. See “Opening and
Verifying a Design” on page 29.
Procedure
1. Do one of the following:

If you want a simulation Do this...

to contain information
for...
All nets in a project In Project Browser, right-click Project ‘<name>’,
then choose the Add Simulation using Project
Model menu item.
Specific nets in a project 1. In Project Browser, in the Project ‘<name>’
branch, double-click Layout.
2. In Object Browser, expand the Nets branch, then
select the nets you want to include in a new
simulation.
3. In Project Browser, right-click Project
‘<name>’, then choose the Add Simulation
menu item.
4. Right-click the new Simulation ‘<name>
branch, then choose the Extract Selected Nets
From Project menu item.

The Choose Analysis Theme dialog box opens. Choosing an analysis theme can
simplify the solve set up process and avoid mesh and solver issues during your solve.

72 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Simulation to a Project

2. In the Choose Analysis Theme dialog box:

a. Do one of the following:

If you want to... Do this...

Define an analysis theme for a new 1. Choose a structure type that best
simulation describes your design.
2. Choose an analysis type to define a
solving frequency range.
Note: Fast 3D Solver does not
provide a frequency range
option.
3. (Optional) Click Export to save
your analysis theme option settings.
Specify a filename, then click
Save.
Use a previously-saved analysis theme Click Import, browse to a theme
options file, then click Open.

b. Click OK.
The software applies expert settings that affect port, pin, mesh, and solver options.
3. (Optional) Edit technology properties to perform “what if” experiments on your design.
In Project Browser, for the new Simulation ‘<name> branch, right-click Technology,
then choose the Edit Technology or (if available) Edit Stackup Areas menu item.
Results
You are now ready to reduce your model size for solving. See “Cropping a Model” on page 74.
To copy a simulation, to further refine or isolate your “what if” experiments, right-click
Simulation and choose the Copy Simulation menu item.
To rename a simulation, right-click Simulation and choose the Rename Simulation menu
item. Type a name and click OK.

HyperLynx® Advanced Solvers User Guide, VX.2.10 73

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Cropping a Model

Cropping a Model
Crop a model to reduce the runtime and resources needed to mesh and solve.

Topic Description
Cropping By Nets Reduce a model size by cropping a geometry around
nets you specify.
Cropping Graphically Graphically crop a model geometry in the Model
window using a rectangular or polygon shape.

Cropping By Nets
Reduce a model size by cropping a geometry around nets you specify.
Procedure
1. Select the nets to include in the model:
a. Do one of the following:
o In Project Browser, right-click Layout and choose the Edit > Crop by Nets
menu item.
o In Object Browser, click to select nets, right-click, and choose the Nets > Crop
Selected Nets menu item.
The Crop Model dialog box opens.
b. Set the cropping type:

If you want to... Do the following...

crop using a single shape for Select Net Window Crop.
all layers
crop using a unique shape for Select Net Tunnel Crop.
each layer depending on Note: This option reduces solve time by
shielding, reference planes, including only relevant layer
and reference vias information.

c. Specify a crop distance.

Units are listed at the bottom of the dialog box.

74 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Cropping By Nets

Note
You can change the units on the Layout tab of the Layout Options dialog box.
In Project Browser, right-click Layout and choose the Edit > Edit Layout Options
menu item.

d. Identify the signal and reference nets to include in the crop by clicking on the nets in
the available nets list and using the arrows to move the nets to the corresponding
area on the right.
2. Click Next to advance to the next page.
3. Specify the shape parameters for the crop:
a. Select a cropping shape and specify the shape parameters.
The software calculates the shape coordinates and displays them, along with the
dynamic shape in the Model window.

Note
If you chose to perform a net tunnel crop, the shape is set to Custom and the
custom shape parameters are set by the software.

b. (Optional) Edit the coordinates.

Tip
To reset the shape dimensions, click Previous, then Next. The software
recalculates the shape coordinates and draws the shape in the Model window.

c. (Optional) Set the Expand/Contract distance to grow (type in a positive number) or

shrink (type in a negative number) the size of the crop area and click Expand.
You can also use Expand to preview the crop area.
d. (Optional) To remove holes from the crop area, click Remove Holes.
e. Click Next to advance to the next page.
The Options page of the Crop Motel dialog box opens.
4. Set the crop options:
a. Under Crop Selection, specify whether to keep or remove the selected area.

HyperLynx® Advanced Solvers User Guide, VX.2.10 75

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Cropping By Nets

b. Under Specifications, modify the options to obtain different cropping results. For
example, you can create pins and/or ports at crop edges:

Option Description
Crop Metal Material Checked, the crop includes the metal material in the
specified area.
Crop Dielectric Checked, the crop includes dielectric material in the
Material specified area.
Unchecked, the effects of the dielectric material is
not considered during simulation.
Remove Holes in Checked, removes any holes in ground planes that
Ground Plane are smaller than the specified hole size.
Remove Small Edges Checked, removes any edges smaller than the
specified edge length to simplify the geometry, and
therefore reduce the number of Mesh Elements.
Perform Net Checked, identifies nets that were truncated in the
Truncation Check crop, typically Reference Nets. Use this option to
make sure that signal nets are not cropped.

c. Under Crop Boundary, specify the type of boundary to use for the model crop:

If you want to... Do the following...

Use the boundary as Choose Open.
specified on the Shape page
Create a boundary around 1. Choose Matched.
the crop that you specify 2. Specify the boundary distance, which is
and fill in a dielectric width of the boundary.
material to reduce noise in 3. Specify the guard ring net, which is the net
the simulation. to use for creating a guard ring.
See “Matched Boundary” on page 84 for
details.

d. Under Pins and Ports, specify whether to create pins and/or ports at crop edges:

Option Description
Create Pins at Crop Checked, the software creates pins where any wire
Edges object touches the crop boundary. Set the pin size or
let the software determine it.
This is primarily useful when analyzing a small
section of a net or group of nets. See Figure 4-4 for a
cropping example.

76 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Cropping By Nets

Option Description
Create Ports at Crop Checked, creates ports at the crop boundary on one
Edges or more selected reference nets. The software
searches for available references in vertical
proximity to the signal pin and create ports between
them. See Figure 4-5 for a cropping example.
Note: If an error message appears indicating that
no acceptable reference nets were found, ensure
that:
• power/ground net type assignments are correct
(POWER/GROUND)
• the crop outline includes these nets as port
references.
e. Under Crop Layers, specify which layers to crop:

Layers Description
All Crop all layers in the stackup.
Selected Crop all selected layers.
Visible Crop all layers visible in the Model window. Set
visibility in Object Browser.

5. Click Crop.
A new cropped model displays in the Model window.
6. Clean up the cropped model:
a. Create valid nets:
i. In Project Browser, right-click Layout and choose the Tools > Create Valid
Nets menu item.
The software locates any disconnected nets and displays them as subnets in
Object Browser.
ii. Click each subnet to highlight it on the Model window.
iii. Delete any unnecessary floating pieces of copper.
iv. In Object Browser, double-click the remaining copper and rename the reference
net.
b. Group all reference nets:
i. In Object Browser, select all remaining reference nets.
ii. Right-click one of the selected nets and choose Group Selected Nets.

HyperLynx® Advanced Solvers User Guide, VX.2.10 77

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Cropping Graphically

iii. Choose <Create New Net> and click OK.

iv. Name the new net “REF” and click OK.
Related Topics
Matched Boundary
Adding an External Reference
Adding a Circuit Model to a Component
Adding Ports to a Model

Cropping Graphically
Graphically crop a model geometry in the Model window using a rectangular or polygon shape.
Procedure
1. In the Model window, choose one of the following menu items:
• Tools > Crop (Supports circle and oblong shapes, in addition to rectangle, polygon,
and custom shapes.)
• Tools > Crop Rectangle
• Tools > Crop Polygon
2. Draw a shape to enclose the geometry in the XY Plane in the Model window:

For this shape... Do the following...

Rectangle Hold the left mouse button down while dragging to create a
rectangle, then release the mouse button.
Polygon 1. Click with the left mouse button while dragging to draw
a line in the XY Plane.
2. Click the left mouse button again to add additional points
to the polygon.
3. Continue clicking until the polygon is created.
4. Double-click the left mouse button to complete the
polygon.

The Crop Model dialog box opens.

78 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Cropping Graphically

3. Refine the cropping shape:

For this shape... Do the following...

Rectangle Set the Shape Parameters (width, height, center, and angle)
as floating point numerical values.
Polygon Edit/add polygon points as needed. You can enter the
Polygon Parameters (a list of Points of the form <x1> <y1>
<x2> <y2> … <xn> <yn>) as floating point numerical
values.

4. (Optional) Set a distance to expand or shrink the current shape. Use a positive number to
expand and a negative number to contract. Click Expand.

Note
To reset shape after expand/contract, change the positive/negative designation on the
distance and click Expand again.

5. Click Next.
The Options page of the Crop Model dialog box opens.
6. Set the crop options.
a. Under Crop Selection, specify whether to keep or remove the selected area.
b. Under Specifications, modify the options to obtain different cropping results. For
example, you can create pins and/or ports at crop edges:

Option Description
Crop Metal Material Checked, the crop includes the metal material in
the selected area.
Crop Dielectric Material Checked, the crop includes dielectric material in
the specified area.
Unchecked, the effects of the dielectric material
is not considered during simulation.
Remove Holes in Ground Checked, removes any holes in ground planes
Plane that are smaller than the given hole size.
Remove Small Edges Checked, removes any edges smaller than the
given Edge Length to simplify the geometry, and
therefore, reduce the number of mesh elements.
Perform Net Truncation Checked, checks for nets that were truncated in
Check the crop, typically Reference Nets. Use this
option to make sure that signal nets are not
cropped.

HyperLynx® Advanced Solvers User Guide, VX.2.10 79

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Cropping Graphically

c. Under Crop Boundary, specify the type of boundary to use for the model crop:

If you want to... Do the following...

Use the boundary as Choose Open.
specified on the Shape page
Create a boundary around the 1. Choose Matched.
crop that you specify and fill 2. Specify the boundary distance, which is
in a dielectric material to width of the boundary.
reduce noise in the 3. Specify the guard ring net, which is the
simulation. net to use for creating a guard ring.
See “Matched Boundary” on page 84 for
details.

d. Under Pins and Ports, specify whether to create pins and/or ports at crop edges:

Option Description
Create Pins at Crop Edges Checked, the software creates pins where any
wire object touches the crop boundary. Set the
pin size or let the software determine it.
This is primarily useful when analyzing a small
section of a net or group of nets. See Figure 4-4
for a cropping example.
Create Ports at Crop Checked, creates ports at the crop boundary on
Edges one or more selected reference nets. The
software searches for available references in
vertical proximity to the signal pin and create
ports between them. See Figure 4-5 for a
cropping example.
Note: If an error message appears indicating
that no acceptable reference nets were
found, ensure that:
• power/ground net type assignments are
correct (POWER/GROUND)
• the crop outline includes these nets as port
references.

e. Under Crop Layers, specify which layers to crop.

Layers Description
All Crop all layers in the stackup.
Selected Crop all selected layers.

80 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Cropping Graphically

Layers Description
Visible Crop all layers visible in the Model window. Set visibility in
Object Browser.
7. Click Crop.
8. Clean up the cropped model:
a. Create valid nets:
i. In Project Browser, right-click Layout and choose the Tools > Create Valid
Nets menu item.
The software locates any disconnected nets and displays them as subnets in
Object Browser.
ii. Click each subnet to highlight it on the Model window.
iii. Delete any unnecessary floating pieces of copper.
iv. In Object Browser, double-click the remaining copper and rename the reference
net.
b. Group all reference nets:
i. In Object Browser, select all remaining reference nets.
ii. Right-click one of the selected nets and choose Group Selected Nets.
iii. Choose <Create New Net> and click OK.
iv. Name the new net “REF” and click OK.
Results
A new cropped model displays in the Model window. Figure 4-1 and Figure 4-2 show an
example of a partial geometry after a crop.
Figure 4-1. Geometry Cropped Using Rectangle in the Model Window

HyperLynx® Advanced Solvers User Guide, VX.2.10 81

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Cropping Graphically

Figure 4-2. Geometry Cropped Using Polygon in the Model Window

Figure 4-3 shows the model geometry before cropping.

Figure 4-3. Model Geometry Before Cropping

Figure 4-4 shows the model geometry after cropping with the Create Pins option checked.

82 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Cropping Graphically

Figure 4-4. Model Geometry After Cropping with the “Create Pins” Option
Checked

Figure 4-5 shows the model geometry after cropping with the Create Pins option checked.
Figure 4-5. Model Geometry After Cropping with the “Create Ports” Option
Checked

Related Topics
Matched Boundary
Adding an External Reference
Adding a Circuit Model to a Component
Adding Ports to a Model

HyperLynx® Advanced Solvers User Guide, VX.2.10 83

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Matched Boundary

Matched Boundary
When cropping a model, a matched boundary defines the boundary on every cropped layer
between the first and last isolation layers. The purpose of a matched boundary is to suppress
cavity resonances.
The isolation layer logic is intended to leave the top and bottom open. The results is two crop
polygons, the original boundary and an expanded boundary. Most layer metal is cropped using
the basic crop boundary.

The dielectric and any isolation layers are cropped with the expanded boundary. This keeps the
dielectric flush with the plane metals to ensure a viable boundary.

Related Topics
Cropping By Nets
Cropping Graphically
Preparing to Mesh a Design
Setting Hybrid Solver Options in Full-Wave Solver HPC

Adding an External Reference

An external reference is a plane that provides a reference for pins at the end of solder balls or
solder bumps. On a package, an external reference represents the die ground at the solder bumps
and the board ground at the solder balls.
You can create an external reference in two ways: you can create a flooded reference layer that
is connected to the model (for more accurate simulation results) by flooding bond wire, solder
ball, and solder bump layers with metal of a reference net, or you can create a floating reference
layer. Floating layers are not physically connected to the model. The floating reference plane is
added either below the bottom layer, or above the top layer.

Prerequisites
• You have opened a Layout. See “Manually Creating a Model Layout” on page 312 for
detailed instructions on how to define a Layout.
• If you want to add an external reference to a pin group, you have created a pin group.
See “Grouping Pins” on page 319.
Procedure
1. In Project Browser, right-click Layout and choose the Edit > Edit External
References menu item.
The External References dialog box opens.

84 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an External Reference

2. To create a flooded reference layer, do the following:

Note
To create a floating reference layer, skip to Step 3.

a. Check the box in the “Used” column for each Bond Wire, Solder Ball / Bump that
you want to flood with a reference.
b. Set the column values for each layer:

Column Description
Used Click in this column to indicate whether to connect an
external reference plane to this layer.
Net Double-click in the cell to choose a power or ground net
that floods to create the reference plane.
If the reference net is not available in the net list, type in
the new name.
Expansion Specify a multiplier to use to “grow” the reference plane
outward.
Holes Specify a distance that defines the gap between the
solder ball/bump and the reference plane (pin to metal).
Use care when setting these values as small changes in
the gap distance can have a significant impact on the
model. Figure 4-8 illustrates an example of a solder ball
hole distance of 0.01 and of 0.05.
Layer To Double-click the cell to choose the layer to use when
Use creating the external reference plane.
If the bond wire, solder ball or solder bump layers are
self-terminated, the software creates a new layer for the
reference plane.
If a termination layer exists, the software selects it as the
layer to use. You can also select another conductive
layer from the list of available layers.
Fill Plane To create a solid plane for the specified reference, click
this column. An “X” in the column indicates a fill.
Use To use the component outline associated with the
Component specified net as the boundary for the external reference,
Outline click this column. An “X” appears, indicating the option
is enabled.
When disabled, the software computes the external
reference shape based on the specified pins or pin group.

HyperLynx® Advanced Solvers User Guide, VX.2.10 85

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding an External Reference

c. Check options to include when flooding the specified reference layers:

Option Description
Keep Pins Checked, does not remove pins that are connected
to the reference plane (because they belong to the
flooded net).
Unchecked, removes pins connected to the
reference plane.
Move Signal Pins Checked, moves the signal pins from the flooded
structure (bond wire/solder ball/lead frame) to the
termination layer of the structure (a physical
stackup layer).
Note: Keep this option enabled if you plan to
use port extensions.
Unchecked, signal pins remain on the flooded
structure.
Fill Bond Wire Checked, completely fills the bond wire region
Area with a reference plane.
Unchecked, creates a strip of reference plane along
perimeter of the bond wires.
This option is for bond wire groups only.

d. Click Apply.
The software creates the external reference plane and displays it in the Model window.
3. To use a floating external reference layer that is not connected to the Model, do the
following:
a. Check Use Bottom Reference Plane and/or Use Top Reference Plane as needed.
b. Select a power net from the available nets, or click “+” to create a new net to use.
c. Specify the gap between the solder ball/bumps/lead frames and the reference plane.
d. Specify the reference plane size by typing in the width, height, center and angle of
the plane.
e. Click Apply.
The software creates the external reference plane and displays it in the Model window.
4. Verify the design Technology:
a. Right-click Technology and choose the Edit Technology menu item.

86 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an External Reference

b. Review the various tabs for any parameter changes that occurred as a result of the
added external reference and edit as needed.
c. Click Apply.
Examples
Figure 4-6 through Figure 4-10 show before and after examples of an external reference, which
is the metal fill around the Bond Wires and Solder Balls, except for where the net does not
connect to the net of the Bond Wire or Solder Ball.

Figure 4-6. Bond Wires Before and After Adding External References

HyperLynx® Advanced Solvers User Guide, VX.2.10 87

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding an External Reference

Figure 4-7. Solder Balls Before and After Adding External References

Figure 4-8. Hole Distances

88 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an External Reference

Figure 4-9. Example of a Filled Reference Area

Figure 4-10. Example of a Non-filled Reference Area

Related Topics
Adding Ports to a Model
Preparing to Solve a Design

HyperLynx® Advanced Solvers User Guide, VX.2.10 89

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding Ports to a Model

Adding Ports to a Model

Add ports to a model to define where you want to observe design behavior, terminate pins, or
excite pins. After defining a Layout for a project simulation, you can assign ports to pins.
The type of port you define depends on the solver you use:

• Full-Wave Solver, Hybrid Solver — Between nets, between pins

• Fast 3D Solver — Across nets

Topic Description
Ports A port is a probe that you set up in a Simulation.
Place your ports where you want to observe the
electrical properties of your design. The electrical
path between the ports is what characterizes the
behavior of the net in the layout.
Adding a Port Between Nets When you add a port between nets, the software
finds a pin (or pin group) for each signal (source)
and reference (sink) net that you have selected to
analyze, then adds them to a port. Use this option
when you want to generate S-parameters, EMI, or
to set up a port source for DC drop analysis.
Adding a Port Between Pins When you add a port between pins, you manually
specify a pin (or pin group) for each signal (source)
and reference (sink) net that you have selected to
analyze, then the software adds them to a port. Use
this option when you want to generate S-
parameters, EMI, or to set up a port source for DC
drop analysis.
Adding a Port Across a Net When you add a port across a net, the software
finds a pin (or pin group) at the signal (source) end
of a net and the reference (sink) end of the same
net. Use this option when you want to generate
RLGC data that you want to post-process to create
SPICE netlists or IBIS models.
Editing a Port Change existing port definitions, especially when
automatic port assignments are incorrect.
Creating a Port for Multiple Pins Specify how you want the software to assign a port
when a port assignment involves multiple pins.

90 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Ports

Topic Description
Creating Port Extensions Use port extensions when the distance between port
pins is large enough to cause invalid results. You
generally should use port extensions, unless you
have a specific reason to not do so. Running solves
at 10 GHz and higher generally require port
extensions.
Enabling/Disabling Port Extension for You can enable/disable the port extension options
Individual Ports for individual ports.
Port Extension Examples This section includes port extension examples.

Ports
A port is a probe that you set up in a Simulation. Place your ports where you want to observe the
electrical properties of your design. The electrical path between the ports is what characterizes
the behavior of the net in the layout.
A port has at least one source and sink pin that define the positive and negative terminals of the
port, respectively, and is required to specify how to apply excitation to the model. The source
pin of a port displays in the model with a solid outline while the sink pin displays with a dashed
outline.

Define your ports at the Simulation level. After importing or creating a layout, extracting the
geometry to a Simulation, the software automatically creates pins that you can use to define
ports.

While a port has a reference characteristic impedance that you specify, you can assign an
electrical load to a port by using basic components such as resistors, capacitors, inductors, or
any other SPICE-based circuit model. See “Adding a Circuit Model to a Component” on
page 111.

Note
An example application of assigning a circuit model is where you only want to observe
near-end crosstalk for a differential pair. You can assign a 50 ohm resistor circuit to the far-
end component pins (instead of assigning ports) to cut the number of ports from four to two and
reduce the solving run time.

For another example application, if your design had 32 differential pairs but you wanted to
evaluate only four of them, you could assign ports to the four differential pairs and assign
resistor circuit models (instead of ports) to component pins that represent the remaining 28
differential pairs. This approach enables solving to include the loading effect of the remaining
28 differential pairs without having to solve for their ports, and avoids noise caused by ports
that were not properly terminated.

HyperLynx® Advanced Solvers User Guide, VX.2.10 91

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Ports

You can define a port across nets, between nets, and between pins, depending on which solver
you use.

A port can consist of several pins by forming a pin group. You can also use a pin group as a sink
port. For detailed information on creating pin groups, see “Grouping Pins” on page 319.

Sometimes the distance (electrically) between the terminals of the port is too large, causing
inaccurate solve results. To correct ports that exceed the maximum distance, you can create a
port grouping, and additionally use port extensions. See “Assigning Ports to Pin Groups” on
page 92 and “Creating Port Extensions” on page 105.

Assigning Ports to Pin Groups

Excessive electrical distance between the pins of a port can lead to inaccurate solving results.
One way to reduce this distance is to use a port grouping.

When using a pin group as a source or sink terminal of a port, the software interprets ports that
are “between nets” as a port group consisting of sub-ports. Each sub-port has a pin from the
source pin group and the nearest reference pin from the sink pin group.

During the solve, the software applies an excitation voltage across all sub-ports and the
algebraic sum of all of the currents flowing through these sub-ports is considered the port
current. This method lumps all of the source pins without having to establish an electrical short
across a large distance, which can be a significant fraction of the wavelength at high frequency.

You can choose from three options to terminate multi-pin ports:

• Single Port
Forms a single port by shorting all source pins and shorting all sink pins. The software
then creates a single port between the nearest pin pair.
• Parallel Ports
Forms parallel sub-ports that are excited together by connecting pin pairs, each with a
source pin and the nearest pin.
• Distributed Reference
Forms a set of sub-ports that are excited together by connecting each source pin to all
sink pins that are within a distance determined by the simulation frequency.

92 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Port Between Nets

Figure 4-11. Ports Created by Port Grouping

Related Topics
Creating a Port for Multiple Pins

Adding a Port Between Nets

When you add a port between nets, the software finds a pin (or pin group) for each signal
(source) and reference (sink) net that you have selected to analyze, then adds them to a port. Use
this option when you want to generate S-parameters, EMI, or to set up a port source for DC drop
analysis.
Prerequisites
• You understand the role ports play in a solve. See “Ports” on page 91.
• The model contains pins. For information about adding pins, see “Pins” on page 317.
Procedure
1. In Project Browser, double-click Ports. The Port Definition dialog box opens.
2. If needed, review port-creation options:
a. Click the Options tab.
b. If you plan to create ports that use a pin group, use the “Port / Pin Grouping Options”
option to control how the software implements multiple-pin terminations. Refer to a
tooltip for option descriptions.

Note
The software ignores pin grouping options if you enable Use Port Extensions in
step 2.d.

c. Set “Default Reference Pin Options” to control how the software finds or creates a
pin on a reference net.

HyperLynx® Advanced Solvers User Guide, VX.2.10 93

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Port Between Nets

Note
Select the “USE_EXISTING_OR_CREATE” list item unless you have a
specific reason to not do so.

d. Configure port extension options as needed. Refer to tooltips. You typically want to
enable port extensions when solving at 10 GHz and higher. See “Creating Port
Extensions” on page 105 and “Enabling/Disabling Port Extension for Individual
Ports” on page 107.

Note
If you disable Use Port Extensions on this tab, the software does not add port
extensions when you specify Yes in the Extension column on the Port tab. See
step 11.

e. Click Apply.
3. Click the Between Nets tab.
4. To filter net or component lists, do any of the following:

If you want to display... Do this...

Nets or components with properties, such as At the bottom of a list, type text
name or type, that match a filter string (case-insensitive) into one or
more fields.
For some filters, you can
double-click its field to display
a list of items.
Components with circuits assigned to them Check “Show Components/
Note: You likely do not want to assign Pins with Circuits”.
ports to components with circuit models.
See a tooltip for details.
Components connected to the selected pair of Check “Filter Components
source and reference nets Automatically”.

5. To assign a port to a reference net pin on a specific stackup layer, select a layer from the
Reference Layer list.
6. To create ports that exclude pins on capacitors, inductors, or resistors, check “Discard
Passive Components”.
7. (Optional) In the Port Naming field, type a naming convention. Refer to a tooltip for
information about the available variables, which are case-sensitive.

94 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Port Between Nets

If your naming convention contains something besides a variable, the software adds it to
port name. If you define an already-used port name, the software appends a number to
the end of the name.
8. Select any number of source nets and one reference net.
To see a selected net in a model layout, you may need to move aside the Port Definition
dialog box.
9. Click Add Ports, then click Apply.
The Ports tab displays the added ports.
The Sink Pin column displays reference pins found by the software. If needed, you can
manually select a different reference pin, then click Apply again.
10. Repeat steps 4 - 9 until you have added all ports.
If a warning occurs, select a more appropriate sink filter or add ports using the Between
Pins tab. See “Adding a Port Between Pins” on page 96.
11. Configure the ports according to the type of solve you plan to perform. Do any of the
following, then click Apply:
• To short ports together to create a loop, click the Shorted column for the ports, so
that it displays “Yes”.
• To use a port extension for a specific port, click its Extension column so that it
displays “Yes”.

Caution
The software will not create port extensions if you disabled “Use Port
Extensions”, in step 2.d.

• For “Reference Pin Options”, select the USE_EXISTING_OR_CREATE list item

and check the “Create Pins if Port Extension Fails” option, unless you have a
specific reason to not do so.
• If you use Hybrid Solver and plan to run at DC (to produce voltage and current
plots), add a voltage and current source:
i. Locate the port to change into a source.
ii. In the Source column for that port, choose VOLTAGE or CURRENT.
12. If needed, update the reference characteristic impedance by typing a value into the
Resistance cell.
13. (Optional) Verify the location of added ports:
a. In Object Browser, expand Ports, expand a port, then click Source or Sink. The
model layout highlights the port.

HyperLynx® Advanced Solvers User Guide, VX.2.10 95

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Port Between Pins

b. If needed, zoom, pan, or rotate the model layout to see a highlighted port.
14. To adjust the port order for a Touchstone model created by a solve, such as when you
plan to use an S-parameter model for circuit simulation:

a. Select a port row, then click or as needed. Repeat for other port rows, as
needed.
b. After you have created the correct port order, click Apply.
15. Click Close.
Results
With ports added to the model, you are ready to mesh and solve. See “Meshing a Model” on
page 129 and “Solving a Design” on page 137.

Adding a Port Between Pins

When you add a port between pins, you manually specify a pin (or pin group) for each signal
(source) and reference (sink) net that you have selected to analyze, then the software adds them
to a port. Use this option when you want to generate S-parameters, EMI, or to set up a port
source for DC drop analysis.
Prerequisites
• You understand the role ports play in the solve. See “Ports” on page 91.
• The model contains pins. For information about adding pins, see “Pins” on page 317.
Procedure
1. In Project Browser, double-click Ports.
2. If needed, review port-creation options
a. Click the Options tab.
b. If you plan to create ports that use a pin group, use the “Port / Pin Grouping Options”
option to control how the software implements multiple-pin terminations. Refer to a
tooltip for option descriptions.

Note
The software ignores pin grouping options if you enable Use Port Extensions in
step 2.d.

c. Set “Default Reference Pin Options” to control how the software finds or creates a
pin on a reference net.

96 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Port Between Pins

Note
Select the “USE_EXISTING_OR_CREATE” list item unless you have a
specific reason to not do so.

d. Configure port extension options as needed. Refer to tooltips. See “Creating Port
Extensions” on page 105 and “Enabling/Disabling Port Extension for Individual
Ports” on page 107.

Note
If you disable Use Port Extensions on this tab, the software does not add port
extensions when you specify Yes in the Extension column on the Port tab. See
step 10.

e. Click Apply.
3. Click the Between Pins tab.
4. To filter net lists, do any of the following:

If you want to display... Do this...

Nets with properties, such as name or type, that At the bottom of a list, type text
match a filter string (case-insensitive) into one or
more fields.
For some filters, you can
double-click its field to display
a list of items.
Components with circuits assigned to them Check “Show Components/
Note: You likely do not want to assign Pins with Circuits”.
ports to components with circuit models.
See a tooltip for details.

5. To create ports that exclude pins on capacitors, inductors, or resistors, check “Discard
Passive Components”.
6. (Optional) In the Port Naming field, type a naming convention. Refer to a tooltip for
information about the available variables, which are case-sensitive.
If your naming convention contains something besides a variable, the software adds it to
port name. If you define an already-used port name, the software appends a number to
the end of the name.
7. Select any number of source pins (or pin groups) and one reference pin (or pin group).
To see a selected pin (or pin group) in a model layout, you may need to move aside the
Port Definition dialog box.
8. Click Add Ports, then click Apply.

HyperLynx® Advanced Solvers User Guide, VX.2.10 97

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Port Between Pins

The Ports tab displays the added ports.

9. Repeat steps 4 - 8 until you have added all ports.
10. Configure the ports according to the type of solve you plan to perform. Do any of the
following, then click Apply:
• To use a port extension for a specific port, click its Extension column so that it
displays “Yes”.

Caution
The software will not create port extensions if you disabled “Use Port
Extensions”, in step 2.d.

• To short ports together to create a loop, click the Shorted column for the ports, so
that it displays “Yes”.
• For “Reference Pin Options”, select the USE_EXISTING_OR_CREATE list item
and check the “Create Pins if Port Extension Fails” option, unless you have a
specific reason to not do so.
• If you use Hybrid Solver and plan to run at DC (to produce voltage and current
plots), add a voltage and current source:
i. Locate the port to change into a source.
ii. In the Source column for that port, choose VOLTAGE or CURRENT.
11. If needed, update the reference characteristic impedance by typing a value into the
Resistance cell.
12. (Optional) Verify the location of added ports:
a. In Object Browser, expand Ports, expand a port, then click Source or Sink. The
model layout highlights the port.
b. If needed, zoom, pan, or rotate the model layout to see a highlighted port.
13. To adjust the port order for a Touchstone model created by a solve, such as when you
plan to use an S-parameter model for circuit simulation:

a. Select a port row, then click or as needed. Repeat for other port rows, as
needed.
b. After you have created the correct port order, click Apply.
14. Click Close.
Results
With ports added to the model, you are ready to mesh and solve. See “Meshing a Model” on
page 129 and “Solving a Design” on page 137.

98 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Port Across a Net

Adding a Port Across a Net

When you add a port across a net, the software finds a pin (or pin group) at the signal (source)
end of a net and the reference (sink) end of the same net. Use this option when you want to
generate RLGC data that you want to post-process to create SPICE netlists or IBIS models.
For ports across nets, positive and negative terminals are on the same net.

Restrictions and Limitations

• The Port Definition dialog box displays the Across Nets tab only for Fast 3D and
Hybrid Solver.
• If you plan to export your results data in SPEF format, do not add ports across nets.
SPEF format is not available when you define ports across nets.
Prerequisites
• You understand the role ports play in a solve. See “Ports” on page 91.
• The model contains pins. For information on adding pins, see “Pins” on page 317.
Procedure
1. In Project Browser, double-click Ports.
The Port Definition dialog box opens.
2. Click the Across Nets tab.
3. To filter net or sink pin lists, do any of the following:

If you want to display... Do this...

Nets or components with properties, such as At the bottom of a list, type text
name or type, that match a filter string (case-insensitive) into one or
more fields.
For some filters, you can
double-click its field to display
a list of items.
Components with circuits assigned to them Check “Show Components/
Note: You likely do not want to assign Pins with Circuits”.
ports to components with circuit models.
See a tooltip for details.
Components connected to the selected net Check “Filter Components
Automatically”.

HyperLynx® Advanced Solvers User Guide, VX.2.10 99

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Port Across a Net

4. Select a sink pin filter, to enable the software to find an appropriate reference pin for a
port:

If your design... Do the following...

Contains a solder ball layer, or you do Choose “No Filter”
not want to restrict the software This enables the software to select the
sink pins to use when creating a port.
Does not contain a solder ball layer and 1. Choose “Component Filter”.
you want to select a component to 2. Select the component to use as the
create the termination sink side of a sink side of a port.
port
Does not contain a solder ball layer and 1. Choose “Layer Filter”.
you want to select a layer to create the 2. Select the layer to use as the sink
termination sink side of a port side of a port.

5. Select one more nets to create ports across.

6. Decide how to automatically assign ports:

If you want to create ports so that every Do the following...

port has...
One source pin and all sink pins are grouped 1. Uncheck “Group Source Pins”.
2. Check “Group Sink Pins”.
One source pin and one sink pin (the central 1. Uncheck “Group Source Pins”.
pin). Additional ports are also created using 2. Uncheck “Group Sink Pins”.
the central sink pin as the source and any
remaining sink pins as the sink.
One or more source pins are grouped, and all 1. Check “Group Source Pins”.
sink pins are grouped. 2. Check “Group Sink Pins”.
Source pins are grouped by component.
One or more source pins are grouped, and 1. Check “Group Source Pins”.
one sink pin (the central pin). Additional 2. Uncheck “Group Sink Pins”.
ports are also created using the central sink
pin as the source and any remaining sink
pins as the sink.

7. (Optional) In the Port Naming field, type a naming convention. Refer to a tooltip for
information about the available variables, which are case-sensitive.
If your naming convention contains something besides a variable, the software adds it to
port name. If you define an already-used port name, the software appends a number to
the end of the name.

100 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Editing a Port

8. Click Add Ports, then click Apply.

The Ports tab displays the added ports.
Ports cannot be created on some nets. For example, if the sink pin filter is incorrect or
too restrictive or if pins are missing on a net, a warning message describes which nets
had a port-creation problem.
If a warning occurs, select a more appropriate sink filter or add ports using the Between
Pins tab. To add ports between pins, see “Adding a Port Between Pins” on page 96.
9. Repeat steps 3 - 8 until you have added all ports.
10. If needed, update the reference characteristic impedance by typing a value into the
Resistance cell.
11. (Optional) Verify the location of added ports:
a. In Object Browser, expand Ports, expand a port, then click Source or Sink. The
model layout highlights the port.
b. If needed, zoom, pan, or rotate the model layout to see a highlighted port.
12. To adjust the port order for a Touchstone model created by a solve, such as when you
plan to use an S-parameter model for circuit simulation:

a. Select a port row, then click or as needed. Repeat for other port rows, as
needed.
b. After you have created the correct port order, click Apply.
13. Click Close.
Results
With ports added to the model, you are ready to mesh (except for Hybrid Solver, which does not
support meshing parameters that you specify) and solve. See “Meshing a Model” on page 129
and “Solving a Design” on page 137.

Editing a Port
Change existing port definitions, especially when automatic port assignments are incorrect.
Procedure
1. In Project Browser, right-click Ports and choose the Edit Ports menu item.
The Port Definition dialog box opens to the Ports tab.

HyperLynx® Advanced Solvers User Guide, VX.2.10 101

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Editing a Port

2. Filter and sort existing ports:

Editing ports for a large design is easier when you filter the number of ports available to
edit.
a. Filter ports (per column) by typing into the field near the top of a column.
b. Sort the ports (per column) by clicking a column header. Use the Port Table context
menu to sort, filter, copy, and remove ports.
o Start with ~ or ! to clear a filter.
o Use * for unknown characters.
o Use ? for single missing characters.
o Use | or ; to separate multiple filters.
o Start with < for “less than” matching. Start with > for “greater than” matching.
c. You can also perform common operations on any existing ports including Copying
Selected, Copying All, Move Up, Move Down, Move to Top, Move to Bottom,
Keys: Short [S], Open [O], and Toggle [T]. Keys: Remove [R], Delete All [D].
3. Edit ports by doing any of the following:

If you want to... Do the following...

Rename a port Click the Port Name in the table and type a unique,
new name.
Edit automatically-defined Select the appropriate cell in the Ports Table and
ports change the value in the dropdown list.
(Ports are typically added
using Automatic Port
Definition.)
Copy one or all ports 1. Select one or more port(s).
2. Right-click and choose the Copy Selected Ports
menu item.
Move a port within the 1. Select a port.
table 2. Use the arrows to move a port up, down, to the
top, or to the bottom.
Remove Selected Ports 1. Select the ports.
2. Press R to remove the ports.
Delete all ports Press D to delete the ports.
Edit the Reference (Sink) Double-click the cell in the Sink Pin column, then
Pin of the Port choose the Pin (or Pin Group) to use.

102 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Editing a Port

If you want to... Do the following...

Set the port type to short/ Select the ports in the table and use the S (short), O
open or toggle a port. (open), or T (toggle) keys, or click the
corresponding button at the bottom of the table.
Manually create pins when 1. Manually create pins on the reference net.
Automatic Port 2. Automatically assign ports.
Assignment fails.
(This typically happens for
edge pins when there are
no pins on the reference
net.)
4. Verify any changed ports by doing any of the following:
• In Object Browser, expand Ports.
The newly added ports display in Object Browser under Ports.
• In the Model window, view selected ports.
Selected ports are highlighted in the selection color (white).

Unselected ports display in the port color (default is purple). To display port names
in the Model window, choose the Options > Show Selected Port Names menu
item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 103

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Creating a Port for Multiple Pins

Results
With ports added to the model, you are ready to mesh and solve. See “Meshing a Model” on
page 129 and “Solving a Design” on page 137.

Creating a Port for Multiple Pins

Specify how you want the software to assign a port when a port assignment involves multiple
pins.
Restrictions and Limitations
• Port Options are not available for Hybrid Solver.
• Port grouping is not available for a port definition across a net.
• If you enable port extensions, the software ignores Port/Pin Grouping Options.
Prerequisites
• You understand pin groups. See “Assigning Ports to Pin Groups” on page 92.
Procedure
1. Do one of the following in Project Browser:
• Right-click Layout, choose Edit > Edit Layout Options, then click the Port tab.
• Right-click Ports, choose Edit Ports, then click the Options tab.
2. Set the Port/Pin Grouping Options to control how the software implements multiple-pin
terminations. This setting applies to any port created using a Pin Group.

If you want to... Do the following...

Add a single port with one source Choose SINGLE_PORT.
termination and one sink The software uses the nearest pin pair in the
termination. port, and applies short circuits between the
connected pin and all other termination pins.
Add a set of sub-ports in parallel. Choose PARALLEL_PORTS.
The software connects all pins of a terminal
to the nearest pin of the opposite terminal.
These form a set of parallel “sub-ports” that
are excited together.

104 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Creating Port Extensions

If you want to... Do the following...

Add a set of sub-ports that provide Choose DISTRIBUTED_REFERENCE.
multiple return current paths. The software connects all pins of the
positive terminal to all pins of the opposite
terminal that are within a distance
determined by the simulation frequency.
These form a set of parallel “sub-ports” that
are excited together.
This is the default option and is best for high
frequency full-wave extraction.

Results
Port Grouping terminations are now set and the software applies them during meshing.

Creating Port Extensions

Use port extensions when the distance between port pins is large enough to cause invalid
results. You generally should use port extensions, unless you have a specific reason to not do so.
Running solves at 10 GHz and higher generally require port extensions.
When you add a port, the software assumes the pin separation in a port definition is electrically
small - less than one tenth of the wavelength of the highest solve frequency in the model. When
the distance exceeds this value, an error appears in the mesh/solver validity checks.

Use port extensions to automatically reduce the gap between the pins by creating a valid port
and avoid numerical issues that can result in passivity violations.

Ports that are not vertically aligned or not defined using an external reference can have a large
pin-to-pin distance. These ports are typically located at edge connectors or across series- or
decoupling-capacitors. These ports, as well as circuit ports and shorted ports, can potentially
cause passivity issues in high frequency extraction. The solution is to automatically create
physical extensions for these ports to bring the reference pins closer to the source pins. See
“Port Extension Examples” on page 108.

Procedure
1. In Project Browser, double-click Ports.
2. In the Port Definition dialog box, click the Options tab.
3. Check “Use Port Extensions” to extend the sink pin geometry to reduce port size.

HyperLynx® Advanced Solvers User Guide, VX.2.10 105

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Creating Port Extensions

4. Set the dimensions of a port extension:

Dimension Description
Minimum Port Size Set a minimum port size distance to ignore
during port extension creation.
Fixed Pin Width Set a width > 0 to force this fixed width to the
shifted sink pin. Use this option to improve the
automated port extension creation.
Fixed Gap Length Overrides the gap between the source and sink
terminations, using the distance you specify.

5. Set additional options as needed:

Option Description
Shift Both (Source + Sink) Pins Enabled, moves the source and sink pins
closer to each other, creating new source and
sink pins.
Disabled (unchecked), moves and creates a
new sink pin closer to the source pin.
Create Edge Pins Enabled, turns the sink pin into an edge pin.
Use Delta Gaps Enabled, the software attempts to build delta
gaps that directly inject excitation into the
electromagnetic simulation.
Do not disable this option unless meshing
issues arise.

6. Verify that Use Delta Gaps, Use Sheet Delta Gaps, and Use Limit Lines in Delta Gaps
are enabled.
Use Delta Gaps instructs the software to build delta gaps that directly inject excitation
into the electromagnetic simulation.
Use Sheet Delta Gaps creates a zero thickness, horizontal sheet as part of the port
extension. This methodology brings in less artificial capacitive loading to the port,
creating a more accurate solve model.
Use Limit Lines in Delta Gaps creates boundaries around the delta gap to ensure lower
port loading. Limit lines restrict mesh element creation to within the limit lines.

Note
Delta Gaps are ignored during mesh when meshing in Fast 3D or Hybrid Solver.

7. Click Apply.

106 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Enabling/Disabling Port Extension for Individual Ports

Results
The software creates port extensions before meshing the design.

Enabling/Disabling Port Extension for Individual

Ports
You can enable/disable the port extension options for individual ports.
Prerequisites
• Port extensions are defined. See “Creating Port Extensions” on page 105.
Procedure
1. In Project Browser, right-click Ports and choose the Edit Ports menu item.
The Port Definition dialog box opens.
2. Click the Ports tab.
3. In the Ports Table, select ports.
4. Do any of the following:

If you want to... Do the following...

Enable port extension on the selected ports Click .
Shortcut: E key
Disable port extension on the selected ports Click .
Shortcut: X key
Toggle the port extensions on the selected ports Click .
Shortcut: H key

Tip
You can also enable/disable the Port Extension option in Object Browser. Select the
ports, right-click and choose Enable High Frequency Extension or Disable High
Frequency Extension.

Results
The state of the port extension (enabled/disabled) displays in the Port Properties Table, in the
Extension row.

HyperLynx® Advanced Solvers User Guide, VX.2.10 107

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Port Extension Examples

Port Extension Examples

This section includes port extension examples.

Topic Description
Ports Before Extension In this example, the port terminals are too far apart for the solve
at the specified frequency. Note that ports display as purple
rectangles.
Ports After Extension Using In this example, port extensions were added by automatically
Only Shift Reference Pin extending metal (during meshing) to move the port terminals
closer together.
Ports After Extension Using This example shows the addition of port extensions by shifting
Shift Both Pins both source and sink terminals towards each other by adding
metal to each pin.
Ports After Extension Using This example adds port extensions by moving both source and
Create Edge Pins, Shift Both sink terminals closer together (using the “Shift Both Pins”
Pins option) and converting the ground pin to an edge pin (using
“Create Edge Pins”).

Ports Before Extension

In this example, the port terminals are too far apart for the solve at the specified frequency. Note
that ports display as purple rectangles.

108 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Port Extension Examples

Ports After Extension Using Only Shift Reference Pin

In this example, port extensions were added by automatically extending metal (during meshing)
to move the port terminals closer together.

Ports After Extension Using Shift Both Pins

This example shows the addition of port extensions by shifting both source and sink terminals
towards each other by adding metal to each pin.

HyperLynx® Advanced Solvers User Guide, VX.2.10 109

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Port Extension Examples

Ports After Extension Using Create Edge Pins, Shift Both

Pins
This example adds port extensions by moving both source and sink terminals closer together
(using the “Shift Both Pins” option) and converting the ground pin to an edge pin (using “Create
Edge Pins”).
Note
The left pin (purple line) is at the edge of the layer.

110 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding a Circuit Model

Adding a Circuit Model

Use a circuit model to include the electrical behavior of a component in simulation. Although an
imported layout includes component layout footprints, a circuit model must be attached to the
component to include electrical properties in a simulation.
Use “Attach Circuit” to assign a model to a component by either using RLC values, or by
specifying a circuit model (SPICE or Touchstone file) in the Circuit Netlist dialog box.
Attaching a circuit automatically creates a circuit port for the solver to use during simulation.

Circuit Ports are defined between two or more pins. For detailed information on adding pins, see
“Pins” on page 317.
Topic Description
Adding a Circuit Model to a Component Define circuit ports for a component to apply a
behavioral model between two or more pins using
circuit netlist information.
Creating a Circuit Model Create a circuit model for a discrete component and
assign it to a component.
Creating a Circuit Model From an Create additional circuit models by editing an
Existing Model existing model.
Using a File to Assign a Circuit Model to Import a file and use it to assign a circuit model to a
a Component component.
Assigning a Circuit Model to a Create a circuit port by assigning a circuit model to a
Component component.
Importing Pin Information to Import a file that contains information about the pins
Automatically Create Circuit Ports (.attach) in the design to automatically create
connected components.
Mapping Pins to Terminals If you have a circuit model with more than two
terminals, assign the pins manually by editing the
Component.
Mapping Pins Based on Circuit Merge For certain flows, the mapping for all pins (for
example, circuits with hundreds or more terminals /
pins) can be difficult to perform. For these cases, you
can use a semi-automated process to determine pin
mappings.

Adding a Circuit Model to a Component

Define circuit ports for a component to apply a behavioral model between two or more pins
using circuit netlist information.
Use the Circuit Netlist dialog box at the Simulation level to define circuit ports.

HyperLynx® Advanced Solvers User Guide, VX.2.10 111

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding a Circuit Model to a Component

Prerequisites
• You have imported or created a layout, extracted the geometry to a simulation, and
defined pins.
• You have created a circuit model that you plan to attach to a component. See “Creating a
Circuit Model” on page 113.
Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
When editing the circuits for the first time, the Component list displays component
names with a strikethrough font. For example, .

2. Add or import circuit models as needed:

a. To define and add an RLC circuit model:
i. Click Add Circuit.
The New Circuit Model Values dialog box opens.
ii. Specify the RLC values, noting the provided units.
The model name field populates using the values you enter. Edit the model name
as needed.
iii. Click OK.
The new circuit model name appears in the Circuit Models column and the model
content populates the Circuit Model Details area.

Tip
To edit the model, click inside the content area, edit as needed, and click Save.

b. To import an exiting model, click Import Circuit, navigate to the circuit input file
with one of the accepted file extensions, and click Open.
The circuit model name appears in the Circuit Models column and the model content
populates the Circuit Model Details area.
3. Create circuit ports using components:
• Modify the values of a component using the Edit Selected Components button. For
example, edit a resistor and then activate that resistor, or select some components
and click Create From Components.
4. Edit a selected component.

112 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Creating a Circuit Model

When a component is properly defined and ready to be converted into a circuit port, the
model name displays next to the component name in parenthesis and the strikethrough
font is removed. For example, C1 (c1_model).
5. Select a circuit model that you want to assign to a component and select the
corresponding component, then do the following:
a. If your component and circuit model use different pin names, decide whether to
enable “Pin Name Circuit Merge”.
Checked, the software uses the pin names in the circuit model file for terminal-pin
mapping when assigning the model to the component.
Unchecked, you manually select terminal-pin mapping for the circuit model
assignment.
b. If your component has three or more pins, decide whether to enable “Require
Terminal-Pin Name Match”.
Checked, the pin names must match the terminal names for Components with 3 or
more pins.
Unchecked, the terminal-pin mapping is done in order.
c. Click Assign Model To Component.
6. Continue to assign models to components as needed.
7. Click Apply to accept and create the circuit ports.
8. Click Close.

Creating a Circuit Model

Create a circuit model for a discrete component and assign it to a component.
Prerequisites
• You have verified that the project technology and layout of your design are accurate.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• If your design contains package design nets, you have added an external reference to
reduce port size. See “Adding an External Reference” on page 84.

HyperLynx® Advanced Solvers User Guide, VX.2.10 113

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Creating a Circuit Model From an Existing Model

Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
2. Click Add Circuit.
The New Circuit Model Values dialog box opens.
3. Type in the resistance, inductance, and/or capacitance for the new model.
4. Specify a unique model name.
5. Click OK.
The new circuit model name appears in the Circuit Model list and the model content
populates the Circuit Model Details area.
Results
You are now ready to assign the circuit model to a component.
Related Topics
Assigning a Circuit Model to a Component
Using a File to Assign a Circuit Model to a Component

Creating a Circuit Model From an Existing Model

Create additional circuit models by editing an existing model.
Prerequisites
• You have verified that the project technology and layout of your design are accurate.
See “Verifying That the Software Correctly Recognizes Your Design” on page 35.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• If your design contains package design nets, you have added an external reference to
reduce port size. See “Adding an External Reference” on page 84.
Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
2. In the Circuit Models column, click on the model to edit.

114 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Using a File to Assign a Circuit Model to a Component

The model content populates the Circuit Model Details area.

3. Click in the Contents area and edit the model as needed.
A Save button appears above the name field to signify the model was modified.
4. Specify a unique model name and click Save.
5. To save the model for future use, in Project Browser, right-click on the project
associated with the simulation and choose the Save > Save Project menu item.
Results
The new model is now available to assign to a component.

Using a File to Assign a Circuit Model to a

Component
Import a file and use it to assign a circuit model to a component.
Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
2. Click Import Circuit.
3. Select a file to import.
You can import a SPICE (.sp), Touchstone (.s1p, .s2p), or Power Model.
4. Click Open.
Results
After importing a file, the circuit model name appears in the Circuit Models list and the model
content populates the Circuit Model Details area. You can now assign the circuit model to a
component.

HyperLynx® Advanced Solvers User Guide, VX.2.10 115

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Assigning a Circuit Model to a Component

For example, you can import a simple SPICE file (rlc.sp):

* 25pF Capacitor
.subckt c25pf 1 2
C 1 2 25e-12
.ends

* 12mH Inductor
.subckt l12mh 1 2
L 1 2 12e-3
.ends

* 100kOhm Resistor
.subckt r100kohm 1 2
R 1 2 100e3
.ends

.end

After importing this file, three circuit models appear in the Circuit Models list (c25pf,
r100kohm, and l12mh). Note that the source filename is included, (*:spice).
Related Topics
Creating a Circuit Model
Using a File to Assign a Circuit Model to a Component

Assigning a Circuit Model to a Component

Create a circuit port by assigning a circuit model to a component.
Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
2. Select a circuit model and the corresponding Component(s).
3. Click Assign Model To Components.
4. Repeat steps 2 and 3 for each Circuit Model.
5. Click Apply, then Close.
Results
You can now verify the added circuit ports in Object Browser (accessed by double-clicking on a
Layout item). The newly added circuit ports display in Object Browser.

116 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Assigning a Circuit Model to a Component

You can also verify the added circuit ports in the Model window. Selected circuit ports are
highlighted in the selection color (white).

Examples
Circuit model assignments appear in the Circuit Netlist dialog box.

For this example, circuit model “c25pf:spice” is assigned to components “C7”, “C8”, and “C9”,
circuit model “l12mh:spice” is assigned to components “L1”, “L2,” “L3”, and “L4”, and circuit
model “r100kohm:spice” is assigned to components “R10”, “R11”, and “R12”.

HyperLynx® Advanced Solvers User Guide, VX.2.10 117

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Importing Pin Information to Automatically Create Circuit Ports

Related Topics
Creating a Circuit Model
Using a File to Assign a Circuit Model to a Component

Importing Pin Information to Automatically Create

Circuit Ports
Import a file that contains information about the pins (.attach) in the design to automatically
create connected components.
You can also add component instances using X (X<name> <terminal1> <terminal2>
<subckt_name>) and .attach (.attach <terminal> <pin_name>) statements.

Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
2. Click Import Circuit.

118 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Mapping Pins to Terminals

3. Locate the file to import and click Open.

A new circuit model (containing the source filename) displays in Circuit Models, the
model content populates the Circuit Model Details area, and any new components
display in the Components list.
4. Click Apply and verify the circuit ports.
You can also manually add components using the Add button under the Components
list.
Examples
A cattach.sp file:

* 25pF Capacitor
.subckt c25pf 1 2
C 1 2 25e-12
.ends

xc1 1 2 c25pf
.attach 1 BGA1.A3
.attach 2 BGA1.A6

xc2 1 2 c25pf
.attach 1 BGA1.B4
.attach 2 BGA1.B5

xc3 1 2 c25pf
.attach 1 BGA1.D4
.attach 2 BGA1.D5

.end

This file automatically creates the new circuit model (c25pf) and new components xc1, xc2, and
xc3. Note that the source file name is included in the circuit model name (:test). The Circuit
Netlist dialog box displays circuit model assignments to components using an .attach file.

Mapping Pins to Terminals

If you have a circuit model with more than two terminals, assign the pins manually by editing
the Component.
Procedure
1. Click the specified component in Object Browser.
2. In the Properties table, make sure that the component has the same number of pins as the
external terminals in the circuit model.
3. Add or remove pins until the component has the specified number of pins.

HyperLynx® Advanced Solvers User Guide, VX.2.10 119

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Mapping Pins to Terminals

4. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
5. Click Import Circuit.
6. Locate the SPICE file to import and click Open.
A new circuit model (containing the source filename) displays in Circuit Models, the
model content populates the Circuit Model Details area, and any new components
display in the Components list.
7. Click Apply and verify the circuit ports.
8. In the Circuit Netlist dialog box, select the component you want to edit and click Edit
Selected Components.
The Component dialog box opens.
9. On the Pins tab, verify that the pin mappings are correct. Delete any pins mappings that
are incorrect.
10. Add pin mappings.
a. Select a Terminal and a Pin.
b. Click Add, located below the Mappings list.
c. Repeat until all pin mappings are added.
11. Click Apply.
The Component dialog box closes.
12. Click Apply in the Circuit Netlist dialog box to accept and create the Circuit Ports.
13. Verify that the added circuit ports display in Object Browser.
Examples
This section contains an example of how to import a SPICE model and manually map the pins.

Importing and Editing a Resistor Pack

In this example, the SPICE file is a resistor pack with 6 external terminals.

* Resistor Pack
.subckt rpack 1 2 3 4 5 6
r1 1 2 22
r2 3 4 22
r3 5 6 22
.ends
.end

120 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Mapping Pins to Terminals

First, click the component in Object Browser and look at the Properties table (located under
Project Browser) to make sure that the component has the same number of pins as external
terminals in the circuit model (in this case, 6). The Pins property shows the number of pins.

Add or remove pins until the component has the required number of pins. Once the component
has the correct number of pins, go back to the Circuit Netlist dialog box and Import Circuit to
import the SPICE file. The new circuit appears in the Circuit Models and Circuit Model Details
sections of the dialog box.

From the Circuit Netlist dialog box, select the component you want to edit and click Edit
Selected Components. On the Pins tab of the Component dialog box. Either verify that the pin
mappings are correct, or delete the pin mappings if they are incorrect.

Next, start adding pin mappings. Select a Terminal and a Pin and click “+ Add”. The new pair
appears in the Mappings list. After all of the pin mappings are added (in this case, two to match
the two terminals), click Apply.

Sometimes a pin error occurs if the component you are mapping does not have the correct
number of pins defined. If this occurs, use the Component tab to update component definition
and click Apply.

Click Apply in the Circuit Netlist dialog box to accept and create the Circuit Ports. After adding
the Circuit Ports, you can verify the added Circuit ports in Object Browser. The newly added
Circuit ports display in Object Browser.

HyperLynx® Advanced Solvers User Guide, VX.2.10 121

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Mapping Pins Based on Circuit Merge

Mapping Pins Based on Circuit Merge

For certain flows, the mapping for all pins (for example, circuits with hundreds or more
terminals / pins) can be difficult to perform. For these cases, you can use a semi-automated
process to determine pin mappings.
Procedure
1. In Project Browser, right-click Circuits and choose the Edit Circuit Netlists menu
item.
The Circuit Netlist dialog box opens.
2. Uncheck “Pin Name Circuit Merge”.
This configuration option allows you to map the terminals to the pins using relative
locations of the pins. The translation, rotation, and flip are discerned from a mapping of
pins, as specified in the 3-pin mapping received through the Terminal-Pin Mapping
dialog box.

This provides automatic pin grouping based on the circuit node naming.
3. Click Import and choose a valid input file.

122 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an Excitation

A valid input file for a 3 terminal-pin mapping contains text similar to the text below:
* Begin Chip Package Protocol —>
* U1-72 : (-2952.500000 52.000000) : p155 * A556 * PLL5\_AVS
* U1-71 : (-2952.500000 102.000000) : p1 * A560 * PLL5\_DVS
* U1-486 : (-2387.000000 4582.500000) : p2 * A74 * PG1
* U1-478 : (-1882.000000 4582.500000) : p3 * A51 * PG1

Adding an Excitation
You can specify a port excitation or an external excitation. A port excitation represents voltages
or currents applied to a specific port. An external excitation represents a wave excitation that is
located outside your model layout. For example, you can use an external excitation to see how
well shielding structures in your model layout prevent electromagnetic energy from reaching
structures being shielded.
Whether you add an excitation before or after solving depends on your solving goal. Examples:

• For EMI near/far field results, add excitations prior to solving so that the near/far fields
can be computed for specific excitation values. See “Solving to Measure Near and Far
Fields” on page 200.
• For S/Y/Z extractions used to create current density plots, add excitations after solving
and post-processing results. See “Creating Current Plots” on page 246.
Prerequisites
• If you plan to use a Huygens box as an external excitation, you know its file location and
spatial location (relative to your model layout). The software supports Huygens box files
created by HyperLynx Advanced Solvers and Siemens Simcenter 3D High Frequency
EM.
Procedure
1. Open the Excitation dialog box:

To specify an excitation... Do this...

Before solving, for EMI In Project Browser, double-click Excitation.
near/far field results
After solving, for S/Y/Z 1. Open the Create New Results dialog box. For
extractions used to create example, in Project Browser, right-click Results,
current density plots then click the Current Plot menu item.
2. Click Edit Port Excitations.

The Excitation dialog box opens.

HyperLynx® Advanced Solvers User Guide, VX.2.10 123

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding an Excitation

2. On the Ports tab, specify voltages or currents per port:

a. Select a port.
b. Specify a Domain View.
For EMI, set Domain View to Frequency.
c. Specify an Excitation Type, then type impedance values. The impedance fields are
located below the table.
For EMI, specify an Excitation Type value of Current.
d. Set Data View to Table.
e. In the table, specify excitation parameter values:
o To specify the same excitation for all frequencies, ensure that the Frequency
column displays ALL.
o To specify frequency-specific excitations, type a frequency in the Frequency
column (replacing the word ALL with a numerical value), then click Add to add
rows for additional frequencies.
o To import excitation parameter values from a comma-separated values (CSV)
file or piecewise linear (PWL) file, click Import from CSV, then open a file.
When your design has many ports, you can use these buttons to speed the
assignment of excitation to each port: Apply to All Ports, Apply to Selected Ports,
Apply to Voltage/Current Ports. Refer to tooltips for button usage.
f. If you plan to perform PDN analysis, add current source groups:
o Check “Show Current Source Groups”, click Add Group, then specify
parameter values.
3. If needed, add external excitation(s) by using any of the following tabs:
a. On the Plane Waves tab:

i. Click Add Wave .

ii. Specify propagation (incident) direction and electric field parameter values.
Refer to a tooltip for parameter definitions.
You can intuitively verify an intended excitation by doing the following:
a. In Project Browser, for the Simulation you plan to solve, double-click
Layout. If needed, move the Excitation dialog box aside so you can see the
model layout.
b. Type angle values in the theta and phi columns, then observe the resulting
propagation direction (as a column of k and E characters). Note that all

124 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an Excitation

electric field parameters values (in the four E columns) must be 0 to display
this basic version of the visual aid. This example shows an propagation
direction angle of 33 degrees from the Y axis and X axis, looking straight
down at a model layout:

c. Type electric field parameter values in the E columns and notice that the
visual aid now displays electric and magnetic field orientation in relation to a
propagation direction and model layout. It also shows the propagation

HyperLynx® Advanced Solvers User Guide, VX.2.10 125

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding an Excitation

direction (k). This example shows a looking-from-above and slightly rotated

view of a model layout:

b. On the Dipoles tab:

i. Click Add Dipole .

ii. Specify parameter values for a dipole with an axis, but no length. Refer to a
tooltip for parameter definitions.
X, Y, and Z coordinates are relative to model layout coordinates. You can
intuitively verify the intended spatial relationship between a dipole and model
layout by doing the following:
a. In Project Browser, for the Simulation you plan to solve, double-click
Layout. If needed, move the Excitation dialog box aside so you can see the
model layout. Also, it can help to rotate the model layout to make the
location of the dipole easier to see.

126 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Adding an Excitation

b. Type spatial parameters for the dipole and observe its relation to the model
layout. Here is a dipole with an axis that is parallel to the XY plane:

c. On the Huygens tab:

i. Click Import from File , select one or more files (representing one or more
frequencies), then click Open. The Add Huygens Box dialog box opens.
ii. Specify parameter values, then click OK. The X, Y, and Z coordinates represent
the center of a Huygens box.
X,Y, and Z coordinates are relative to model layout coordinates. You can
intuitively verify the intended spatial relationship between a Huygens box and
the model layout by doing the following:
a. In Project Browser, for the Simulation you plan to solve, double-click
Layout. If needed, move the Excitation dialog box aside so you can see the
model layout. Also, it can help to rotate the model layout to make the
location of the Huygens box easier to see.

HyperLynx® Advanced Solvers User Guide, VX.2.10 127

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Adding an Excitation

b. In the Excitation dialog box, select a Huygens box and observe its relation to
the model layout. Here is a Huygens box that is near an end of a model
layout:

iii. When you have imported multiple Huygens box files and want to apply a subset
of them to a solve, you can select one or more specific Huygens boxes, then
check or uncheck the Enabled option.
4. Click OK.
Results
A green checkmark appears next to Excitation in Project Browser, indicating an excitation is
available.

128 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Meshing a Model

Meshing a Model
After the physical model is finished (model is finalized and ports are defined), you can set mesh
options and create a mesh to simulate.
The Mesh Options dialog box is separated into five main tabs:

• The Refinement tab allows for basic mesh controls.

• The Layers tab contains controls for mesh simplification on a Layer-by-Layer basis.
• The Engine tab contains controls for multithreading.
• The File tab allows for importing and exporting Mesh Options.

Note
The Expert tab of the Mesh Options dialog box, which you can use to edit various expert
options that are stored in an XML-style format, is not covered in this documentation.

Topic Description
Preparing to Mesh a Design Edit the mesh parameters before creating a mesh for
your design.
Creating a Mesh Mesh your design before solving.
Importing Mesh Options Use the File tab of the Mesh Options dialog box to
import existing mesh options.

Preparing to Mesh a Design

Edit the mesh parameters before creating a mesh for your design.
To import existing mesh options, see “Importing Mesh Options” on page 136.

Restrictions and Limitations

• This topic does not apply to Hybrid Solver because it generally does not support
meshing parameters that you specify.
Prerequisites
• You have imported or created a design model. See “Importing a Design” on page 41.
• You have verified the Technology and Layout of the model.
• You have reduced your model size. See “Cropping a Model” on page 74.
• You have set up your ports. See “Adding Ports to a Model” on page 90.
• You have assigned circuits. See “Adding a Circuit Model” on page 111.

HyperLynx® Advanced Solvers User Guide, VX.2.10 129

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Preparing to Mesh a Design

Procedure
1. In Project Browser, right-click Mesher and choose the Edit Mesh Options Only menu
item.
The Mesh Options dialog box opens.
2. On the Refinement tab, set the basic mesh controls:
a. Specify the highest simulation frequency. The maximum mesh edge length is based
on a fraction of the wavelength at this frequency.
The mesh frequency is a a positive floating point value or a number followed by Hz,
kHz, MHz, GHz, and THz.
Each Frequency input value is in the units you specify. SI unit prefixes are accepted,
for example: K for 1e3, M for 1e6, G for 1e9, T for 1e12.
b. Specify the default mesh resolution in cells per wavelength.
Typically, the default number of 10 works well, since in most cases, 10 cells per
wavelength are enough to resolve field variations across the physical model.
However, for faster simulations, use a smaller number such as 6.
This number must be positive.
3. Click Advanced Options.
The advanced options display in the Mesh Options dialog box.
4. Set advanced mesh options:
a. Specify a defeaturing distance, which is the absolute smallest geometry allowed in
the meshed model.
The software removes larger geometries that do not contribute significantly to the
electromagnetic solution.
The software uses this setting for some healing operations during the meshing
operation. A value of -1 enables automatic healing when meshing. This is a floating
point number in the units shown in Length Unit.
b. To define the default mesh refinement for the background material, enable Use
Background Cells Per Wavelength.
Type the number of background cells per wavelength to use during meshing.
Typically, the default number of 10 works well, since 10 cells per wavelength is
enough to resolve field variations across the physical model. However, for faster
simulations, use a smaller number such as 6.
This number must be positive.

130 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Preparing to Mesh a Design

c. Specify the DC Refinement Factor, which is the minimum refinement at low

frequency, relative to model size. Higher numbers result in greater mesh refinement.
Specify the snap distance, which represents the numerical noise floor of the mesher
to account for round-off errors. Geometries smaller than this are deleted.
A value of -1 instructs the software to auto-compute the noise floor (usually in
proportion to the total problem size).
Adjust this parameter to resolve failures in Broadband or Layered meshing.

Note
A value of 1nm is often a useful manual setting for boards and packages, while
10pm is a typical value for chip structures.

d. To remove mesh elements that are considered too long and/or thin (which can yield
bad mesh results), enable Remove Low Quality Elements.
e. To apply the matched boundary created during cropping during meshing, if one
exists, enable Use Matched Boundary (if defined).
5. For Full-Wave Solver and Full-wave Solver HPC only, apply a mesher preset:

If your design model... Do the following...

Is a PCB or Package structure with non- Click 3D Mesh (Default).
hatched planes and you are performing a Loads an expert set of parameter
high frequency extraction, especially definitions for the 3D mesher on the
when using matched crop boundary Expert tab.
Contains hatched ground plane structures Click Broadband Layered Mesh.
with many net objects The software loads an expert set of
parameter definitions for the
Broadband Layered mesher on the
Expert tab.
This option is faster than the default
3D mesh.
Note: This option results in more
mesh elements when using
matched crop boundary.

HyperLynx® Advanced Solvers User Guide, VX.2.10 131

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Preparing to Mesh a Design

If your design model... Do the following...

Involves a solve that does not exceed Click Layered Mesh.
10GHz The software loads an expert set of
parameter definitions for the Layered
mesher on the Expert tab.
This option produces the most stable
mesh and is faster than the default 3D
mesh.
Note: This option results in more
mesh elements when using
matched crop boundary.
Is a PCB or package structure with non- Click High Frequency Refinement.
hatched planes and you are performing a The software sets the correct expert
high frequency extraction, especially options for a high frequency solve.
when using matched crop boundary
Requires a low frequency extraction Click Low Frequency Refinement.
The software sets the correct expert
options for a high frequency solve.
6. If necessary, simplify the physical model for a faster simulation. This is called
“flattening” and reduces the number of mesh elements, decreasing both the time and
memory requirements for solve.
a. Click the Layers tab.
b. Choose how to implement layer flattening:

If you want to... Do the following:

Rely on the software Select Automatic Flattening.
expertise to select and
flatten layers

132 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Preparing to Mesh a Design

If you want to... Do the following:

Choose the layers to 1. Select Manual Flattening.
flatten yourself 2. On dielectric (via) layers, simplify vias by
choosing which layers to include when modeling
using a via macro model. Choose No Macromodel
(default), Reference Nets, Signal Nets, or All Nets.
In full wave simulations, the software replaces vias
with triangular shapes. In quasi-static simulations,
the software replaces vias with circuit models.
Both accurately model via losses, however the
quasi-static ignores via-to-via interactions.
3. Flatten plane or conductor layers to reduce the size
of the mesh requirement on the layer by more than
half. Choose No Flatten (default), Top, Middle, or
Bottom.
While flattening removes the vertical extent of a
layer, the software still uses the full layer thickness
for modeling losses. Sidewall losses and coupling
are ignored.
Simplify vias and flatten Click Simplified Vias/Flattening.
layers The software removes geometries from the model to
reduce required mesh elements which, in turn, reduces
solve time.
c. Optionally, choose whether to include the affects of non-functional pads or via stubs
by enabling or disabling these two options.
Use the tooltips to help you decide which effects to include.
7. On the Engine tab, set multiple-threading and processor options.

Note
Default option values work well for most solves. For helpful definitions, see “Engine
Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

8. Click Apply.
9. (Optional) Export the current mesh options to a file you specify:
a. On the File tab, click Export Mesh Options.
b. If necessary, navigate to the save location.

HyperLynx® Advanced Solvers User Guide, VX.2.10 133

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Creating a Mesh

c. Specify the file name and click Save.

The software saves the mesh options in the specified file.
10. Click Close.
11. (Optional) To increase the accuracy of the solve results, increase the mesh density for a
net or a layer. In Object Browser, do either of the following:
• Right-click a net, then choose the Nets > Adjust Mesh Density menu item.
• Right-click a layer, then choose the Layers > Adjust Mesh Density menu item.
A dialog box opens where you can increase the density of the selected net or layer.
Results
The design is now ready to mesh. The next step is to set up your solving options. See “Solving a
Design” on page 137.

Creating a Mesh
Mesh your design before solving.
Restrictions and Limitations
• Delta Gaps are ignored during mesh when you solve in Fast 3D Solver or when using the
Hybrid Solver.
Prerequisites
• Mesh options are set for the design. See “Preparing to Mesh a Design” on page 129.
Procedure
1. Validate the model before meshing. In Project Browser, right-click Mesher and choose
Check Model Validity for Meshing.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin placement,
flattening on via layers and on adjacent conductor layers, nets and port size.
2. Run the mesh. In Project Browser, right-click Mesher and choose Create Mesh.
Results
Once the software creates the mesh, the default view is the mesh overlaid on the physical model.
You can turn layers of the mesh on and off in Object Browser.

134 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Preparing to Solve a Design
Creating a Mesh

Figure 4-12. Top View of the Newly Created Mesh Object in the Model Window

Figure 4-13. Bottom View of the Newly Created Mesh Object in the Model
Window

You can display information about the number of elements and ports in the mesh. In Project
Browser, right-click Mesher and choose Show Mesh Information.

HyperLynx® Advanced Solvers User Guide, VX.2.10 135

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Preparing to Solve a Design
Importing Mesh Options

If an error message appears in the Status Messages window during meshing that identifies a
specific mesh element, view the element in the display by double-clicking on the error message.
The meshing element responsible for the error highlights in the display.

Importing Mesh Options

Use the File tab of the Mesh Options dialog box to import existing mesh options.
Prerequisites
• You have an existing MeshOptions.opt file to import.
Procedure
1. In Project Browser, right-click Mesher and choose Edit Mesh Options Only.
The Mesh Options dialog box opens.
2. On the File tab, click Import Mesh Options.
3. Navigate to the location of the *.opt file you want to import.
4. Select the filename and click Open.
Results
The mesh options settings from the file are loaded into the dialog box. Verify that the settings
are correct before solving.

136 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 5
Solving a Design

Before running a solve, edit the mesh and solve options to obtain that data you need to verify
your design or uncover design issues.

Topic Description
Cable Cross-Section Analysis Measure impedance, velocity of propagation,
nominal delay, insertion loss and return loss
for your cable design. Perform a 2D cross-
section analysis to obtain S-, Y-, and Z-
Parameters, RLGC matrices, TDR results, and
more.
Optimizing PDN Decoupling Capacitors - The PDN Decoupling Optimizer enables you
HyperLynx Advanced Solvers to analyze decoupling capacitors and their
locations on a board design to determine the
optimum decoupling capacitor for each
location. An optimum design includes the
minimum number of capacitors, the minimum
number of different capacitor types, and has
the lowest cost.
Solving for Accelerated Parasitic Extraction Use RLGC extraction to perform accelerated
parasitic extraction to solve for resistance (R),
inductance (L), conductance (G), capacitance
(C), and current density.
Solving to Characterize Interconnect and Measure return loss (reflections) and insertion
Signal Vias Using Full-Wave Solver loss (transmission) for signal nets. You can
evaluate interconnect and signal via behaviors
that are represented by S-parameters. The
software solves all regions of your simulation
layout with a full-wave solver.
Solving to Characterize Interconnect and Measure insertion loss, return loss, and other
Signal Vias Using Hybrid Solver frequency domain behaviors for signal nets.
The Hybrid Solver runs quickly and can help
you evaluate full nets in your design.
Solving in Partitioned Mode to Characterize Simulate in partitioned mode to solve specific
Interconnect and Signal Vias regions using Full-Wave Solver HPC and the
rest of the layout using the Hybrid Solver to
reduce the solve time while preserving result
accuracy.

HyperLynx® Advanced Solvers User Guide, VX.2.10 137

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design

Topic Description
Solving to Extract Package and PCB Extract parasitic RLGC values for nets in
Interconnect Models Using Fast 3D Solver package or board designs. The software can
report nets whose parasitic RLGC values
exceed constraints, and create IBIS model
RLC pin parasitics and package model
coupling matrix information for each signal
net.
Solving to Extract Package Loop Inductance Measure loop inductance for nets in a package
Using Fast 3D Solver design. For example, you can measure power
loop inductance from die to PCB through the
package or capacitor loop inductance.
Running Layout Software to Extract Launch HyperLynx Fast 3D Solver from
Packaging and PCB Interconnect Models Xpedition Package Integrator (via Xpedition
Layout) to extract an RLGC model.
Solving to Extract PCB Loop Inductance Measure loop inductance for nets in a board
design.
Solving to Measure DC Power Resistance and Find metal areas, stitching vias, and other
IR Drop structures in a power-distribution network
(PDN) with high DC power loss.
Solving to Measure Near and Far Fields Find structures that emit excessive radiation or
fail to shield excessive radiation, which can
cause your design to exceed electromagnetic
interference (EMI) or electromagnetic
compatibility (EMC) limits. You can observe
how external radiation sources affect your
design. You can also plot electric, magnetic, or
power density fields emitted by your design or
received by your design (from external
radiation sources).
Solving to Visualize Signal Return Paths and Find return paths with high current density for
PDN Current Paths signal nets or a power-distribution network
(PDN) using Full-Wave Solver or Full-Wave
Solver HPC.
Setting Hybrid Solver Options in Full-Wave The Hybrid Solver solves regions using
Solver HPC different solve engines during the same
simulation run.
Slider Settings for Fast Frequency Sweep Three settings are available for each slider to
(AFS) Options control the adaptive frequency sweep options:
low (far left), medium (center), and high (far
right) setting.

138 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Cable Cross-Section Analysis

Cable Cross-Section Analysis

Measure impedance, velocity of propagation, nominal delay, insertion loss and return loss for
your cable design. Perform a 2D cross-section analysis to obtain S-, Y-, and Z-Parameters,
RLGC matrices, TDR results, and more.
Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Restrictions and Limitations

• Cross-section analysis is only available for HyperLynx Full Wave Solver HPC and
Hybrid Solver.
• Hybrid Solver does not support job distribution.
• Cross-section analysis considers only the metal and dielectric shapes. The solve ignores
any additional geometry (bond wires, solder balls, and so on).
Prerequisites
• You have opened your cable design in the tool, either directly or through 3D Explorer.
To use 3D Explorer cable templates, see “Evaluating Design Variations” on page 225.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, right-click Solver and choose the Edit Solver Options Only menu
item.
The Solver Options dialog box opens.
2. Specify solver options for your design:
a. On the Output tab, select Cross-Section Analysis and specify the length of the
cross-section to analyze.
b. On the Frequency tab, set up a discrete sweep:
i. Set the Type to “Sweep”.

HyperLynx® Advanced Solvers User Guide, VX.2.10 139

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Cable Cross-Section Analysis

ii. Specify a start and end frequency.

iii. Select either Linear or Logarithmic for the Frequency Scale.
• For a linear sweep, specify either the step size or the number of points.
• For a logarithmic sweep, specify either the points per decade or number of
points.
The Number of Points indicates the number of frequencies to solve, which
determines how long the solve takes to complete.
iv. Set Fast Frequency Sweep options to NONE.
c. On the Threads tab, specify multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology
definitions, see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute
threads. In this case, you can change option values to reduce solve run time. See
“Single Solve Example” on page 336 and “Multiple Solve Example - Solve With
GUI” on page 337.

3. Click Apply.
4. (Optional) Save your solver settings for use by another simulation:
a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a Solver Options file in the simulation directory as
SolverOptions.opt.
5. Click Close.

140 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Cable Cross-Section Analysis

6. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.
Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
simulations), then choose the
• IBM® Spectrum LSF®
Solve > Distributed Solve menu item.
• Amazon Web Services™ 2. Use the Distributed Solve dialog box
(AWS™) to run a solve. See:
• Windows HPC • “Solving With LSF Job
• “Local mode”, which enables Distribution” on page 376
you to solve with a: • “Solving With AWS Job
• Remote Linux computer, Distribution” on page 379
especially one that is more • “Solving With HPC Job
powerful than your own Distribution” on page 380
computer.
• “Solving With Local Mode —
• Your own computer with Linux” on page 384
multiple program instances,
which can shorten solving run
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

HyperLynx® Advanced Solvers User Guide, VX.2.10 141

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

Results
The software creates a simple 2D cross-section cable model. The software also produces results
that show RLGC matrices, impedance, nominal delay, TDR and so on. See “Viewing and
Processing Results” on page 237.

Optimizing PDN Decoupling Capacitors -

HyperLynx Advanced Solvers
The PDN Decoupling Optimizer enables you to analyze decoupling capacitors and their
locations on a board design to determine the optimum decoupling capacitor for each location.
An optimum design includes the minimum number of capacitors, the minimum number of
different capacitor types, and has the lowest cost.
Note
If you opened the PDN Decoupling Optimizer from the Advanced Decoupling Wizard
(available from HyperLynx SI/PI), perform the instructions in “Optimizing PDN
Decoupling Capacitors - HyperLynx PI” in the HyperLynx SI/PI User Guide.

The software can use synthesis or optimization to determine the best design. Synthesis is a
relatively quick-running iterative process, in which the software follows one of several methods
to improve the design through each analysis iteration. Optimization is more complex, and is
based on the genetic algorithm, in which the software begins with a design solution that consists
of a random selection of potential capacitors, and evolves the design in multiple iterations
(generations) using potential design variants (populations) that improve through each
generation.

Optimization also creates results that include the impedance profile at each DUT probe location
(for an IC power-supply pin or VRM pin), and loop inductance results from each capacitor to
each DUT probe.

Restrictions and Limitations

• If you have a multiple-board design, run decoupling optimization on one board at a time.
• Decoupling optimization does not support a design containing multiple stackups, such
as a design with rigid and flexible areas.
• Decoupling optimization does not support job distribution.
Prerequisites
• Review the list of capacitors included in the default capacitor libraries (.decap), located
in C:\MentorGraphics\<release>\SDD_HOME\Nimbic\examples.

142 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

If needed, create additional decoupling capacitor libraries in the .caplib format to define
all capacitors that the software considers when determining the optimum capacitor for
each capacitor location in the design. See “CAPLIB File Format” on page 325.
• A Touchstone file (.sNp) containing S-Parameter results that represent an impedance
profile at various frequencies for power-supply and decoupling capacitor pins in your
design.
• A port configuration file (.pdn).
If you do not have a port configuration file for your PDN, see “Creating a Default Port
Configuration File” on page 330.
• Information to define the target impedance for the PDN. The software enables you to
specify target impedance requirements at multiple frequencies, so that you can, for
example, relax the impedance requirement at higher frequencies. See “Information
Needed to Calculate Target PDN Impedance” in the HyperLynx SI/PI User Guide.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From the HyperLynx Advanced Solvers dashboard, click PDN Decoupling Optimizer.
The PDN Decoupling Optimizer opens.
2. On the Library Setup tab:
a. Add capacitors that you want to make available to optimization:

If you want to... Do this...

Add capacitors to an Click Append and select a capacitor library
existing capacitor list file.
Erase an existing capacitor Do either of the following:
list, then add capacitors • To add all capacitor library files in a
folder, click Import Folder, then select
the folder.
• To add a specific capacitor library file,
click Import and select a capacitor library
file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 143

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

b. (Optional) Reduce run time, by making only specific capacitors in a library available
to optimization:
Click the first column for a capacitor that you want to make available to
optimization, so that it is enabled:

If you do not enable specific capacitors, the software can include all capacitors with
suitable footprints during optimization.
3. On the Model Setup tab, load an impedance profile and specify a port configuration:
a. Next to “Bareboard S-Parameter Model (Touchstone File)”, click Browse and open
a Touchstone file with ports for IC and VRM (if any), and decoupling capacitor pins.
Specify a port configuration:

If you want to... Do this...

Load an existing port Click IMPORT, then browse to a port configuration
configuration. file (.pdn) file.
Note: A Touchstone file generated from
Advanced Solvers has an associated port
configuration file (.pdn) saved in the same location
as the Touchstone file. If available, load this .pdn
file.

144 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

If you want to... Do this...

Create a new port 1. Click CREATE DEFAULT.
configuration. The default setup assumes the DUT is the first
port and assigns a default impedance
requirement, and assumes all the other ports are
capacitors with a footprint of 0603 and an “open”
termination.
2. Assign a footprint to each capacitor, so the
software can limit the available capacitors for
each location on the board based the physical
size of the capacitor.
a. Click FootPrint Remap. The Footprint
Remap dialog box opens.
Note: Because standards for capacitor
footprint sizes do not exist, the software
collects capacitor sizes into categories to make
footprint assignment more manageable. By
default, all capacitor sizes appear in the table
as <unknown>.
b. Select a row in the Sizes table and select the
corresponding footprint on the right.
c. Click Assign.
d. Repeat for all sizes, then click Save, then
Close.
The Port Configuration table displays two kinds of design information. A row with
Type = DUT represents a PDN power-supply pin for an IC or VRM (if any). A row
with Type = CAP represents a pair of decoupling capacitor pins.

Note
You can change the type for a port by double-clicking its Type cell and selecting
a new type.

The Type, Name, Footprint and Termination columns display by default. To view
additional columns such as Width, Length and Part Number, which you can use to
sort the capacitor library, click the menu button to the right of the headers.
4. Specify impedance requirements for each DUT probe location and run a baseline
analysis:
a. On the Model Setup tab, specify impedance requirements for each probe location by
double-clicking a DUT type row in the Termination column of the Port
Configuration spreadsheet.
b. In the Impedance Requirement dialog box, edit the frequency and impedance values
as needed.

HyperLynx® Advanced Solvers User Guide, VX.2.10 145

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

Click Add to specify additional values. Repeat this step for all DUT type rows.
c. To see if the baseline design and best-case design (capacitors modeled as shorts)
meet the impedance requirement, click Run Analysis.
The Baseline Analysis graph displays the best-case and impedance requirements for
the design.
In the Baseline Analysis graph, click legend labels to hide or show impedance or
target impedance curves.

Note
If the computed best-case design does not meet the impedance requirement, stop
and change your design.
Consider changing the number and locations of capacitors in your design, or the
sampling frequency range, and run the baseline analysis again to ensure that the
best-case design meets the impedance requirement with some margin.

5. On the Run tab, run synthesis:

a. Select a process:

To run... Do the following...

All available 1. In the Process list, select Recommended Flow.
synthesizer 2. Click Run Process.
strategies This option enables you to compare results to find the best design
solution. Synthesis runs faster than optimization, so run synthesis
alone before running optimization to ensure that the design meets
(or is close to meeting) the impedance requirement.
A single 1. In the Process list, select Expert System.
synthesizer 2. Select a strategy in the Strategy list.
strategy
See “PDN Decoupling Optimizer” on page 343 for a description
of the strategies.
3. Edit the Similar Tolerance value, if needed.
Using the default value (3), the software attempts to use a single
capacitor in place of three different capacitors with similar
performance and value whenever possible.
A higher similar tolerance value produces a design solution that
contains fewer different capacitor types, reducing the potential
cost of the design. However, a higher value also decreases the
number of different capacitor types that the synthesizer
considers.
4. Click Run Process.

146 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers

When process completes, the best capacitor for each location appears in the Results
table. An unnecessary capacitor, marked as Open in the Termination column,
indicates a capacitor location that you can remove from the design.
b. In the Plot area, evaluate the impedance profile.
If the design meets the impedance requirement or is close to meeting the
requirement, consider running optimization to further improve the design and reduce
the number and different types of capacitors.
6. On the Run tab, run the optimizer:
a. In the Process list, select Genetic Algorithm (Optimizer).
Leave the default values set in the Population and Generations list unless you need to
change them.
The number of populations is the number of potential design solutions in each
analysis iteration (generation). Increasing the number of populations and generations
increases run time.

Tip
A populations value between 30 (for a low number of capacitors) and 50 (for a
high number of capacitors) produces valid results.
If you specify a generations value, the recommended value,is approximately three
times the number of capacitor types to ensure appropriate convergence.

b. Click Run Process.

Results
When the process completes, the best capacitor for each location appears in the Results table. A
capacitor marked as Open in the New Termination column indicates a capacitor that is not
necessary and can be safely removed from the design.
Select the Report tab to see result details.
The report contains five sections:
Section Description
Version Lists the software version for documentation purposes.
Summary An overview of the analysis setup.
Loop Inductance A plot and table of the loop inductance of each capacitor for a given device
with its power and ground pins shorted.
This provides a quick way to identify capacitors with poor layout by using
the quantitative score of each capacitor layout/mounting as well as a
comparative metric among the capacitors on the PCB.

HyperLynx® Advanced Solvers User Guide, VX.2.10 147

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving for Accelerated Parasitic Extraction

Section Description
Model Setup The Touchstone file name and location, pass/fail criteria, and margin, as well
as plots/configuration data of the baseline analysis.
Results Lists of passing optimized PDNs with margin, number of capacitors, number
of capacitor parts, and cost.
Select the PDN to display detailed information.
The software saves simulation files to a timestamped folder in the design folder. These files
include a .dao wizard settings file, the .pdn port/footprint mapping file, S and Z parameter files
for the PDN, and a log file.
Related Topics
CAPLIB File Format
PDN Decoupling Optimizer
Creating a Default Port Configuration File

Solving for Accelerated Parasitic Extraction

Use RLGC extraction to perform accelerated parasitic extraction to solve for resistance (R),
inductance (L), conductance (G), capacitance (C), and current density.
Restrictions and Limitations
• RLGC extraction is only available with HyperLynx Fast 3D Solver and Hybrid Solver.
• Fast 3D Solver and Hybrid Solver do not support a design containing multiple stackups,
such as a design with rigid and flexible areas.
Prerequisites
• You have a HyperLynx Fast 3D or a HyperLynx Hybrid Solver license.
• If you load a design into Fast 3D Solver and plan to use job distribution to reduce overall
runtime, you have configured job distribution. See “Job Distribution” on page 375.
Hybrid Solver does not support job distribution.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.

148 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving for Accelerated Parasitic Extraction

• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets to your model and added a VRM. You have
assigned one port as a voltage source and one or more ports as a current sink. See
“Adding Ports to a Model” on page 90.
Procedure
1. In Project Explorer, double-click Solver.
The Simulation Options dialog box opens.
2. For a design loaded in Fast 3D Solver, specify mesh options for your design:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. If necessary, simplify the physical model for a faster simulation. This reduces the
number of mesh elements, decreasing both the time and memory requirements for
solve.
i. Click the Layers tab.
ii. On dielectric (via) layers, simplify vias by choosing which layers to include
when modeling using a via macro model. Choose No Macromodel (default),
Reference Nets, Signal Nets, or All Nets.
In full wave simulations, the software replaces vias with triangular shapes. In
quasi-static simulations, the software replaces vias with circuit models. Both
accurately model via losses, however the quasi-static ignores via-to-via
interactions.
iii. Flatten plane or conductor layers to reduce the size of the mesh requirement on
the layer by more than half. Choose No Flatten (default), Top, Middle, or
Bottom.
While flattening removes the vertical extent of a layer, the software still uses the
full layer thickness for modeling losses. Sidewall losses and coupling are
ignored.
d. On the Engine tab, set multiple-threading options as needed.

Note
Default option values work well for most meshes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 149

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving for Accelerated Parasitic Extraction

e. Click Apply.
3. Specify the solver options:
a. Click the Solver Options tab.
b. On the Output tab, select RLGC Extraction.
This selects RLGC options for Package Model Analysis.
c. (Optional for Fast 3D Solver) Enable Current Density if you want the ability to
generate 3D color plots for current density.
This option enables you to specify various voltages on ports as a post-processing
step to generate 3D Color Plots of the current density. See “Creating Current Plots”
on page 246.
d. Enable types of data to extract.
e. Specify the frequency. Do one of the following:

If you want to... Do the following...

Run the analysis at the given Specify a frequency:
frequency • For AC output, type the frequency.
• For DC output, type “0”.
Run the analysis at DC and 1. Enable Create Broadband Model.
AC to create a SPICE netlist 2. Specify the highest fitting frequency.
that approximates broadband The software creates the SPICE netlist by
behavior. combining DC and AC values of R and L to
approximate broadband behavior.

Note
Each Frequency input value is in scientific notation (for example, 1e6) or the
user-specified units. SI unit prefixes are accepted, for example: K for 1e3, M for
1e6, G for 1e9, T for 1e12, and so on. An input of “100 MHz” yields 100,000,000 Hz
(100e6). Examples: 100 MHz, 2 GHz, 123 kHz, 1.2e9, 456e6 Hz, 789 k, 654 M, and
so on.

f. For Fast 3D Solver, click Advanced and set options as needed.

Note
See “Guidance for Solving RL and GC Together” on page 338 for details about
these options.

g. For Hybrid Solver, specify a reference net to use for capacitance and conductance
extraction.

150 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving for Accelerated Parasitic Extraction

h. Click Apply.
i. On the Engine tab, optionally use pin area in the solve:

If you want to... Do the following...

Include current flow into the Enable “Use Pin Area”
perimeter of the pin and not inside the
pin
Include current flow into the pin to a Disable “Use Pin Area”
point inside the mesh in the pin area

See “Use Pin Area” on page 361.

4. On the Threads tab, set multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology definitions,
see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

5. Click Apply, then Close.

6. Validate the model before meshing: In Project Browser, right-click Mesher and choose
the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin placement,
flattening on via layers and on adjacent conductor layers, nets and port size.
7. Create the mesh: In Project Browser, right-click Mesher and choose the Create Mesh
menu item.
The software creates a mesh to use during the solve.
8. Validate the mesh: In Project Browser, right-click Mesher and choose the Check Mesh
Validity for Solving menu item.
If an error message appears, fix the identified issues and rerun the mesh validation.

HyperLynx® Advanced Solvers User Guide, VX.2.10 151

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving for Accelerated Parasitic Extraction

9. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.
Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a: Distribution” on page 376
• Remote Linux computer, • “Solving With AWS Job
especially one that is more Distribution” on page 379
powerful than your own
computer. • “Solving With HPC Job
Distribution” on page 380
• Your own computer with
multiple program instances, • “Solving With Local Mode —
which can shorten solving run Linux” on page 384
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

152 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.

Solving to Characterize Interconnect and

Signal Vias Using Full-Wave Solver
Measure return loss (reflections) and insertion loss (transmission) for signal nets. You can
evaluate interconnect and signal via behaviors that are represented by S-parameters. The
software solves all regions of your simulation layout with a full-wave solver.
Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Prerequisites
• If you plan to use job distribution to reduce overall runtime, you have configured job
distribution. See “Job Distribution” on page 375.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets to your model. See “Adding Ports to a Model” on
page 90.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
For advanced options, see “Preparing to Mesh a Design” on page 129.

HyperLynx® Advanced Solvers User Guide, VX.2.10 153

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

a. Click the Mesh Options tab.

b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength (which defines the default mesh resolution).
Typically, 10 cells per wavelength are enough to resolve field variations across the
physical model.
c. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

d. Click Apply.
3. Validate the Model:
In Project Browser, right-click Mesher and choose the Check Model Validity for
Meshing menu item.
If an error message appears, fix the identified issues and rerun model validation.
4. Specify solver options:
a. Click the Solver Options tab.
b. On the Output tab:
i. Select Port Analysis (SYZ) mode.
ii. To ensure S-parameter results are passive, enable Enforce Passivity.
When you enable this option, the software checks for passivity issues after the
solve and enforces passivity, if necessary. If the software detects a passivity
violation during a solve, the original results display in Object Browser under
“Unprocessed.” A second set of results also display in Object Browser under the
simulation name. This second set of results contain numbers with enforced
passivity.
If “Unprocessed” results do not display in Object Browser, the software did not
detect any passivity violations.
iii. To include a broadband netlist to use in a SPICE simulation, enable Broadband
Netlist.
A broadband netlist may be necessary if your SPICE simulator has issues with S-
parameters.
iv. To remove artificial noise in S-parameters due to the physical effects of a port
assignment, enable Run De-Embedding.
When you enable this option, the software runs a separate solve for each port to
identify and remove artificial resonances.

154 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

c. On the Frequency tab:

i. Set the Type to “Sweep”.
ii. Specify sweep parameters:
If you want to... Do the following...
Specify the frequencies 1. Specify a start and end frequency.
to solve 2. Select either Linear or Logarithmic for the
(Run a discrete sweep) Frequency Scale.
• For a linear sweep, specify either the step
size or the number of points.
• For a logarithmic sweep, specify either the
points per decade or number of points.
For a discrete frequency sweep, the Number of
Points indicates the number of frequencies to
solve, which determines how long the solve
takes to complete.
3. Set Fast Frequency Sweep options to None.
Let the software pick a 1. Under Fast Frequency Sweep Options, click
minimum number of Type and choose Adaptive if the frequency
frequencies, but still response of the structure you are evaluating is
provide accurate results. smooth (free of sharp resonances).
The software increases This option runs the solver only on the
the sampling rate near frequencies determined by the Maximum
frequencies with Points and Threshold values.
resonances.
2. Do one of the following:
(Run an adaptive • Specify the Maximum Points to use in the
sweep) sweep.
• Enable Automatically Determine Maximum
Points Needed to have the software specify
the maximum number of points to use in the
sweep.
3. Adjust the two sliders to control the fast
frequency sweep results. The Threshold value
updates based on the slider settings when you
click Apply. See “Slider Settings for Fast
Frequency Sweep (AFS) Options” on
page 213. Also see the tooltip for details about
how each slider affects the solve.
Note: An AFS simulation is an interpolation
and results may not match actual values.

HyperLynx® Advanced Solvers User Guide, VX.2.10 155

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

If you want to... Do the following...

Run an interpolation 1. Under Fast Frequency Sweep Options, click
simulation. Type and choose Interpolation.
2. In the Interpolation table, click in a cell to edit
the sweep parameters as needed.
3. To decrease the solve time for results you
expect to be smooth (for example, for low
frequency PDN or SI with smooth
resonances), enable Use Spline Model For
Interpolation.
d. On the Engine tab, set solver accuracy, set Green’s Function, and use pin area in the
solve:
i. (Optional) For “Use Solver Accuracy Slider”, set the slider usage:
• Checked, the solver uses the slider level option. A tooltip defines each level.
• Unchecked, the solver uses default accuracy.
ii. Set Green’s Function:
Select MULTILAYERED if your design contains large, planar structures. This
option provides increased accuracy over a wide frequency range when your
design contains multiple dielectric layers between conductors.
Otherwise, select FREESPACE.
iii. (Optional) For Use Pin Area, set the pin area usage:
• Checked, the current flows to the perimeter of the pin and not inside the pin.
• Unchecked, the current flows into the pin to a point inside the mesh in the pin
area.
See “Use Pin Area” on page 361.
e. On the Threads tab, specify multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology
definitions, see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute
threads. In this case, you can change option values to reduce solve run time. See
“Single Solve Example” on page 336 and “Multiple Solve Example - Solve With
GUI” on page 337.

5. Click Apply.

156 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Full-Wave Solver

6. (Optional) Save your solver settings for use by another simulation:

a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a Solver Options file in the simulation directory as
SolverOptions.opt.
7. Click Close.
8. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin
placement, flattening on via layers and on adjacent conductor layers, nets and port
size.
b. Create the mesh:
In Project Browser, right-click Mesher and choose the Create Mesh menu item.
9. Validate the mesh:
a. In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
b. If an error message appears, fix the identified issues and rerun mesh validation.
10. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.
11. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.

HyperLynx® Advanced Solvers User Guide, VX.2.10 157

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

If you want to run a solve with... Do the following...

Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a: Distribution” on page 376
• Remote Linux computer, • “Solving With AWS Job
especially one that is more Distribution” on page 379
powerful than your own
computer. • “Solving With HPC Job
Distribution” on page 380
• Your own computer with
multiple program instances, • “Solving With Local Mode —
which can shorten solving run Linux” on page 384
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.
If more than one solve is running, you can manage the solves in the queue. See “Using the Solve
Queue” on page 362.

Solving to Characterize Interconnect and

Signal Vias Using Hybrid Solver
Measure insertion loss, return loss, and other frequency domain behaviors for signal nets. The
Hybrid Solver runs quickly and can help you evaluate full nets in your design.

158 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Restrictions and Limitations

• Hybrid Solver not support a design containing multiple stackups, such as a design with
rigid and flexible areas.
• Hybrid Solver does not support job distribution.
Prerequisites
• You have opened your design in Hybrid Solver.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets or between pins to your model. See “Adding Ports to
a Model” on page 90.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. On the Engine tab, set multiple-threading options.

HyperLynx® Advanced Solvers User Guide, VX.2.10 159

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

Note
Default option values work well for most meshes.

3. Specify Solver Options for your design:

a. Click the Solver Options tab.
b. On the Output tab:
i. Select “Port Analysis (SYZ)” mode.
ii. To ensure s-parameter results are passive, enable Enforce Passivity.
When you enable this option, the software checks for passivity issues after the
solve and enforces passivity, if necessary. If the software detects a passivity
violation during a solve, the original results display in Object Browser under
“Unprocessed.” A second set of results also display in Object Browser under the
simulation name. This second set of results contain numbers with enforced
passivity.
If “Unprocessed” results do not display in Object Browser, the software did not
detect any passivity violations.
iii. To include a broadband netlist to use in a SPICE simulation, enable Broadband
Netlist.
A broadband netlist may be necessary if your SPICE simulator has issues with S-
parameters.
iv. To include the shorted loop inductance for a decoupling capacitor at the given
frequency, enable “Report Loop Inductance (if any) with Capacitors Shorted”
and specify a frequency.
The software calculates the loop inductance by shorting all decoupling capacitor
pins together at the given frequency and generates a separate result.

Note
The calculated loop inductance value does not include the inductance of the
capacitor body.

c. On the Frequency tab:

i. Set the Type to “Sweep”.

160 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

ii. Specify sweep parameters:

If you want to... Do the following...
Specify the frequencies 1. Specify a start and end frequency.
to solve (run a discrete 2. Select either Linear or Logarithmic for the
sweep) Frequency Scale.
• For a linear sweep, specify either the step
size or the number of points.
• For a logarithmic sweep, specify either the
points per decade or number of points.
For a discrete frequency sweep, the number of
points indicates the number of frequencies to
solve, which determines how long the solve takes
to complete.
Let the software pick a 1. Under Fast Frequency Sweep Options, click
minimum number of Type and choose Adaptive if the frequency
frequencies, but still response of the structure you are evaluating is
provide accurate smooth (free of sharp resonances).
results. The software This option runs the solver only on the
increases the sampling frequencies determined by the Maximum
rate near frequencies Points and Threshold values.
with resonances.
2. Do one of the following:
(Run an adaptive • Specify the Maximum Points to use in the
sweep.) sweep.
• Enable Automatically Determine Maximum
Points Needed to have the software specify
the maximum number of points to use in the
sweep.
3. Adjust the sliders to control the fast frequency
sweep results. The Threshold value updates
based on the slider settings when you click
Apply. See “Slider Settings for Fast
Frequency Sweep (AFS) Options” on
page 213. Also see the tooltip for details about
how each slider affects the solve.
Note: An AFS simulation is an interpolation
and results may not match actual values.

HyperLynx® Advanced Solvers User Guide, VX.2.10 161

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

If you want to... Do the following...

Run an interpolation 1. Under Fast Frequency Sweep Options, click
simulation. Type and choose Interpolation.
2. In the Interpolation table, click in a cell to edit
the sweep parameters as needed.
3. To decrease the solve time for results you
expect to be smooth (for example, for low
frequency PDN or SI with smooth
resonances), enable Use Spline Model For
Interpolation.
d. On the Engine tab, set Hybrid Solver options:

If you want to... Do the following...

Save solve run time by Enable “Ignore Unused Nets”.
ignoring all nets that are The software ignores all nets from the model that
not necessary for the do not have a port assignment. This option can
solve reduce result accuracy.
Significantly reduce 1. Enable “Automatic Crop with Minimum
solve run time by Width”.
reducing Model size 2. Specify a crop width.
The software crops around the nets at the distance
you specify. The nets included are those that have
a port assignment.
Note: This option can reduce result accuracy.
Simplify the model by Enable “Ignore Layout Features smaller than”,
excluding layout then specify a distance.
features that are smaller
than the distance you
specify.
Simplify the model by Enable “Ignore All holes smaller than”, then
excluding holes that are specify a width.
smaller than the width
you specify.
Include ground/power Enable “PDN Aware SI Analysis”.
(reference) plane details
during the solve

162 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Characterize Interconnect and Signal Vias Using Hybrid Solver

If you want to... Do the following...

Exclude ground/power Disable “PDN Aware SI Analysis”.
(reference) plane details This option reduces solve time by assuming an
during the solve ideal return path. This ideal path uses the actual
metal areas to find a return path for a given trace.
However, the use of an ideal return path can
reduce result accuracy.
Use the matched Enable “Use Matched Boundary for SI Analysis”.
boundary during the Applies only when all ports are signal ports and
solve either the layout is cropped with a matched
boundary or auto cropping is enabled.
Specify a virtual 1. Enable “Use Return Plane”.
reference plane location 2. Specify the distance between the virtual plane
to the layer you specify.
3. Choose to place the virtual plane either above
the top layer or below the bottom layer.
Enable this option to provide a default return path
when no other return path is available.
4. On the Threads tab, set multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology definitions,
see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

The software saves multi-threading options with the project. Every project can have a
different setting.
5. (Optional) Save your solver settings for use by another simulation:
a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a Solver Options file in the simulation directory as
SolverOptions.opt.
6. Click Apply and Close.
7. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose the Check Model Validity for Meshing menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 163

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin
placement, flattening on via layers and on adjacent conductor layers, nets and port
size.
b. Create the mesh.
In Project Browser, right-click Mesher and choose the Create Mesh menu item.
8. Validate the mesh:
• In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
The software checks the model, the mesh, and solver options for any settings that may
cause problems during the solve. Checks include verifying that the mesh frequency is
less than the highest solve frequency, solver options for the solve mode, and whether a
valid mesh exists.
If an error message appears, fix the identified issues and rerun mesh validation.
9. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.
10. Run the solve:

If you want to... Do the following...

Run the solve in the background. In Project Browser, right-click Solver and
You can continue to work in the choose the Solve > Solve menu item.
GUI while the solve runs.
Run the solve in the foreground. In Project Browser, right-click Solver and
You cannot continue to work in the choose the Solve > Solve in GUI menu
GUI while the solve runs. This item.
solve takes longer with this option.

Results
View plots that show return loss, insertion loss, and so on. See “Processing Results” on
page 245.

Solving in Partitioned Mode to Characterize

Interconnect and Signal Vias
Simulate in partitioned mode to solve specific regions using Full-Wave Solver HPC and the rest
of the layout using the Hybrid Solver to reduce the solve time while preserving result accuracy.

164 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Restrictions and Limitations

• Hybrid Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
• Job distribution is not available when solving in partitioned mode.
Prerequisites
• You have a Full-Wave Solver HPC license.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets to your model and you have specified a reference
(sink) net that is the same for all ports, or you have stitched together all reference nets as
shorted ports. See “Adding Ports to a Model” on page 90.
Procedure
1. You have loaded your design into Full-Wave Solver HPC.
2. Create a solve region:
a. With the model of a specific simulation displayed in the Model window, in the Draw
toolbar, click Draw and choose the Draw Solve Region menu item.

b. Click the rectangle or polygon icon.

c. In the Model window, click and drag to select the solve region.
For a polygon, double-click to finish the region. Use the BACKSPACE key to undo
the last point.
The Add Solve Region dialog box opens.
d. Specify a name for the region and verify the shape parameters.

HyperLynx® Advanced Solvers User Guide, VX.2.10 165

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

e. Click Add.
The new region appears in Object Browser under Full-Wave Solve Regions.
3. Add additional solve regions as needed, ensuring that the solve regions do not overlap.
4. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
5. Specify mesh options:
a. Click the Mesh Options tab.
For advanced options, see “Preparing to Mesh a Design” on page 129.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
c. If necessary, simplify the physical model for a faster simulation. This reduces the
number of mesh elements, decreasing both the time and memory requirements for a
solve.
i. Click the Layers tab.
ii. On dielectric (via) layers, simplify vias by choosing which layers to include
when modeling using a via macro model. Choose No Macromodel (default),
Reference Nets, Signal Nets, or All Nets.
In full-wave solves, the software replaces vias with triangular shapes. In quasi-
static simulations, the software replaces vias with circuit models. Both
accurately model via losses, however the quasi-static solve ignores via-to-via
interactions.
iii. Flatten plane or conductor layers to reduce the size of the mesh requirement on
the layer by more than half. Choose No Flatten (default), Top, Middle, or
Bottom.
While flattening removes the vertical extent of a layer, the software still uses the
full layer thickness for modeling losses. Sidewall losses and coupling are
ignored.
d. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

e. Click Apply.

166 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

f. (Optional) Save your mesh settings for use by another simulation:

i. On the File tab, click Export Mesh Options.
ii. If necessary, navigate to the save location.
iii. Type the file name and click Save.
The software saves the mesh options in the specified file.
6. Specify solver options:
a. Click the Solver Options tab.
b. On the Output tab, select Port Analysis (SYZ) mode.
c. To ensure S-parameter results are passive, enable Enforce Passivity.
When you enable this option, the software checks for passivity issues after the solve
and enforces passivity, if necessary. If the software detects a passivity violation
during a solve, the original results display in Object Browser under “Unprocessed.”
A second set of results also display in Object Browser under the simulation name.
This second set of results contain numbers with enforced passivity.
If “Unprocessed” results do not display in Object Browser, the software did not
detect any passivity violations.
d. To include a broadband netlist to use in a SPICE simulation, enable Broadband
Netlist.
A broadband netlist may be necessary if your SPICE simulator has issues with S-
parameters.
e. To remove artificial noise in S-parameters due to the physical effects of any port
assignment, enable Run De-Embedding.
When you enable this option, the software runs a separate solve for each port to
identify and remove artificial resonances.
f. To solve for loop inductance, including capacitor mounting inductance, enable
“Report Loop Inductance (if any) with Capacitors Shorted at” and specify a
frequency.
The software calculates the loop inductance obtained by shorting all decoupling
capacitors at the given frequency and generates a separate result “Shorted Loop
Inductance”.
Shorted loop inductance is the loop inductance for a decoupling capacitor, calculated
as if the capacitor pins were shorted together. The value does not include the
inductance of the capacitor body. This report also includes capacitor “mounting
inductance” and can help identify ineffective capacitors with high mounting
inductance.

HyperLynx® Advanced Solvers User Guide, VX.2.10 167

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

g. On the Frequency tab:

i. Set the type to Sweep.
ii. Specify sweep parameters:
If you want to... Do the following...
Specify the frequencies 1. Specify a start and end frequency. For a
to solve (run a discrete Partitioned solve, the lowest solve
sweep) frequency you can use is 10KHz.
2. Select either Linear or Logarithmic for the
Frequency Scale.
• For a linear sweep, specify either the
step size or the number of points.
• For a logarithmic sweep, specify either
the points per decade or number of
points.
For a discrete frequency sweep, the Number
of Points indicates the number of frequencies
to solve, which determines how long the
solve takes to complete.

168 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

If you want to... Do the following...

Let the software pick a 1. Enable Fast Frequency Sweep (Adaptive)
minimum number of if the frequency response of the structure
frequencies, but still you are evaluating is smooth (free of
provide accurate sharp resonances).
results. The software When you enable this option the solver
increases the sampling includes only the frequencies determined
rate near frequencies by Maximum Points and Threshold
with resonances. values.
(Run an adaptive 2. Do one of the following:
sweep) • Specify the Maximum Points to use in
the sweep.
• Enable Automatically Determine
Maximum Points Needed to have the
software specify the maximum number
of points to use in the sweep.
3. Adjust the sliders to control the fast
frequency sweep results. The Threshold
value updates based on the slider settings
when you click Apply. See “Slider
Settings for Fast Frequency Sweep (AFS)
Options” on page 213. Also see the tooltip
for details about how each slider affects a
solve.
Note: An AFS simulation is an
interpolation and results may not match
actual values.
iii. Click Apply.
h. On the Engine tab, set solver accuracy, set Hybrid Solver options, set Green’s
Function, and use pin area in the solve:
i. (Optional) For “Use Solver Accuracy Slider”, set the slider position:
• Checked, the solver uses the slider level option. A tooltip defines each level.
• Unchecked, the solver uses default accuracy.
ii. Click Show Hybrid Solver Options and specify options as needed:
If you want to... Do the following...
Save solve run time by Enable “Ignore Unused Nets”.
ignoring all nets that are The software ignores all nets from the
not necessary for the model that do not have a port assignment.
solve This option can reduce result accuracy.

HyperLynx® Advanced Solvers User Guide, VX.2.10 169

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

If you want to... Do the following...

Significantly reduce 1. Enable “Automatic Crop with Minimum
solve run time by Width”.
reducing Model size 2. Specify a crop width.
The software crops around the nets at the
distance you specify. The nets included are
those that have a port assignment.
Note: This option can reduce result
accuracy.
Simplify the model by Enable “Ignore Layout Features smaller
excluding layout features than”, then specify a distance.
that are smaller than the
distance you specify.
Simplify the model by Enable “Ignore All holes smaller than”, then
excluding holes that are specify a width.
smaller than the width
you specify.
Include ground/power Enable “PDN Aware SI Analysis”.
(reference) plane details
during the solve
Exclude ground/power Disable “PDN Aware SI Analysis”.
(reference) plane details This option reduces solve time by assuming
during the solve an ideal return path. This ideal path uses the
actual metal areas to find a return path for a
given trace. However, the use of an ideal
return path can reduce result accuracy.
Use the matched Enable “Use Matched Boundary for SI
boundary during the Analysis”.
solve Applies only when all ports are signal ports
and either the layout is cropped with a
matched boundary or auto cropping is
enabled.
Specify a virtual 1. Enable “Use Return Plane”.
reference plane location 2. Specify the distance between the virtual
plane to the layer you specify.
3. Choose to place the virtual plane either
above the top layer or below the bottom
layer.
Enable this option to provide a default
return path when no other return path is
available.

170 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving in Partitioned Mode to Characterize Interconnect and Signal Vias

iii. Set Green’s Function:

Select MULTILAYERED if your design contains large, planar structures. This
option increases accuracy over a wide frequency range when your design
contains multiple dielectric layers between conductors.
Otherwise, select FREESPACE.
iv. (Optional) For Use Pin Area, set the pin area usage:
• Checked, the current flows to the perimeter of the pin and not inside the pin.
• Unchecked, the current flows into the pin to a point inside the mesh in the pin
area.
See “Use Pin Area” on page 361.
7. On the Threads tab, specify multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology definitions,
see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

As in the Mesh Options tab, the software saves multi-threading options with the project.
Every project can have a different setting.
8. (Optional) Save your solver settings for use by another simulation:
a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves the Solver Options file in the simulation directory as
SolverOptions.opt.
9. Click Apply, then click Close.
10. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin
placement, flattening on via layers and on adjacent conductor layers, nets and port
size.

HyperLynx® Advanced Solvers User Guide, VX.2.10 171

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

b. Create the mesh:

In Project Browser, right-click Mesher and choose the Create Mesh menu item.
11. Validate the mesh:
• In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
The software checks the Model, the mesh, and solver options for any settings that may
cause problems during the solve. Checks include verifying that the mesh frequency is
less than the highest solve frequency, solver options for the solve mode, and whether a
valid mesh exists.
If an error message appears, fix the identified issues and rerun mesh validation.
12. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.
The software displays the memory required to run the solve. Ensure sufficient memory
is available before running the solve.
13. Right-click Solver and choose the Solve > Solve in Partitioned Mode menu item.
A partitioned solve launches, creating:
• A project containing all simulations to solve, using the name followed by a
timestamp, as project_YYMMDD_HHMMSS.phys and its respective folder with
data.
• A folder named project_YYMMDD_HHMMSS_spice, containing the SPICE model
(.sp) and S-parameters for each region, to stitch the partial simulations.
Results
When the simulation completes, the results display in the Model window. See “Viewing and
Processing Results” on page 237.

Solving to Extract Package and PCB

Interconnect Models Using Fast 3D Solver
Extract parasitic RLGC values for nets in package or board designs. The software can report
nets whose parasitic RLGC values exceed constraints, and create IBIS model RLC pin
parasitics and package model coupling matrix information for each signal net.
Restrictions and Limitations
• Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.

172 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

• RLGC extraction does not support designs with negative planes.

Prerequisites
• You have acquired the nbpack, nbapex, nbapexconsole and nbapexsolve licenses.
• Your EDA tools are set up correctly in the Configuration Options dialog box. See
“Importing a Design” on page 41 for details.
Procedure
1. Import a design. Choose the Design > Import Design File menu item. The Import
Design dialog box opens.
a. Select the nets to import into the tool. If you plan to run more than one simulation on
this design, include all nets in the import and use a subset of specific nets in each
simulation.
b. Set the minimum number of segments to use when approximating circles in the
layout (typical values are 8-12). The higher the number, the better the
approximation, and the longer the simulation time.
c. Click Change in the Technology File section to verify the technology (Layers,
Materials, Bond Wires, Solder Balls/Bumps and Lead Frames) of the design. In the
Technology dialog box, make updates as needed. See “Technology” on page 350 for
details.

Note
Do not add solder bump/balls here. You can add these in a later step.

d. To include a surface roughness model:

i. On the Other tab, enable “Enable Surface Roughness” (located in the lower
right-hand corner of the Technology dialog box), and choose the model and
measurement.
To use a different surface roughness model for each layer, choose Custom and
assign models.
ii. On the Layers tab, click the Roughness box for each layer and select a model for
the top, side and bottom of the layer.
To use... Do the following...
No model Choose None from the pulldown list.
Simulation will not consider surface
roughness.
Hammerstad model 1. Choose Hammerstad from the
pulldown list.
2. Specify the height (RMS).

HyperLynx® Advanced Solvers User Guide, VX.2.10 173

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

To use... Do the following...

Huray model 1. Choose Huray from the pulldown list.
2. Specify the height of the hemisphere,
the base diameter of the hemisphere
and the distance between the peaks.
Advanced Cannonball model 1. Choose Cannonball_Advanced from
the pulldown list.
2. Specify the Height, Area of Unit Cell,
and the Number of Nodules Per Unit
Cell.
Hammerstad Correction model 1. Choose Hammerstad_Correction
from the pulldown list.
2. Specify the height in RMS to include
in the model and a scaling factor to
account for especially rough surfaces.
Use this model if the height is large.
Cannonball model 1. Choose Cannonball from the
pulldown menu.
2. Specify the average peak to peak
height from your manufacturer data
sheet.
Groisse model 1. Choose Groisse from the pulldown
list.
2. Specify the height of the jagged
surface.
iii. Click OK to close the Roughness dialog box.
e. Click Apply.
f. Click Change in the Padstack section to verify the Padstack properties. See “Editing
a Padstack Database” on page 331 for details.
g. Click Apply to import the design.
The layout file imports and the design displays in the tool. You can select nets,
layers or other objects by clicking in the Model 3D view, or use the Object Browser.
2. (Optional) Modify bond wires, add solder bumps (top) or balls (bottom), or add lead
frames as required by the design. When adding solder balls or bumps, set the
Component name to ensure balls/bumps are added automatically to the correct location.
Select Autoupdate to automatically adjust size or bond wires/ lead frames.

174 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

3. Add a Simulation to the Project and copy the layout:

a. Right-click the project in Project Browser and choose the Add Simulation menu
item. The simulation branch of the tree appears in Project Browser.
b. Right-click Model and select the Copy Model From Project menu item.
4. Select nets to include in extraction. Right-click extract selected nets. (Or crop) to include
ground nets.
5. Crop the area around selected nets:
a. Right-click Layout, choose the Edit > Crop by Nets menu item.
b. In the Cropping dialog box, select Automatic Cropping and enter the width. Add the
net to crop to Signal Nets to Tunnel.
c. Click Next.
d. Select a shape, edit the shape coordinates directly, or type in an expand/contract
value for the crop and click Expand or Contract to change the crop area.
e. Click Next.
f. Select Keep Selection Only, define specifications as needed, and select the layers to
crop. Add a ground net to include ground metal in the crop area.
g. Click Crop.
h. When the crop is complete, only the cropped area displays. Add a ground net to
include ground metal in the crop area. Delete subnets to reduce solving time. If
keeping a subnet, rename the net to original name.
6. Check for layout issues such as shorts or disconnected nets:
a. Right-click Layout and choose the Tools > Apply Antipads on Model menu item.
b. Right-click Layout and choose the Tools > Create Valid Nets menu item.
c. Click OK in the Net Creation Results dialog box to acknowledge the cropping
results.
7. Delete extra nets:
a. Locate any split nets. If a net is split, it appears in the object browser with
"_SUBNET_###" appended to each fragment.
b. Rename one of the nets by deleting the appended string and deleting any other
fragments.
c. To delete a net, select the net in Object Browser, right-click and choose the
Edit > Delete Selected Objects menu item.
d. Click Yes when prompted.

HyperLynx® Advanced Solvers User Guide, VX.2.10 175

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

8. Create a port at each end of the selected nets:

a. Right-click Ports, then choose the Ports > Edit Ports menu item.
The Port Definition dialog box opens.
b. Select the Across Nets tab.
c. Set the Sink Pin Filter to Component Filter.
d. Select a net(s), select a sink component (for example, a solder ball or bump is a good
sink), and click Add Ports from Selected Nets.
e. Add additional ports as needed. Use a consistent direction when assigning ports:
assign all sinks at the same end of the nets.
f. Click Apply.
Ports appear as a +/- at each end of the net.
9. Set mesher and solver options:
a. Right-click Mesher and choose the Edit Simulation Options menu item.
b. In the Mesh Options tab, set Refinement, Engine, and File options as needed.
Using default settings is recommended. For advanced settings, see “Preparing to
Mesh a Design” on page 129. Refinement options determine the mesh size.

Note
The Mesh frequency is the same as the highest frequency set in the Solver
Options. The Solver Options default is 100MHz. Broadband simulates DC and
AC. If you plan to output a SPICE model, the extraction combines these values.

c. Click Apply.
d. In the Solver Options tab, enable RLGC Extraction, which selects the package
model elements to include in the extraction.
e. (Optional) Enable Current Density if you want the ability to generate 3D color plots
for current density.
This option enables you to specify various voltages on ports as a post-processing
step to generate 3D Color Plots of the current density. See “Creating Current Plots”
on page 246.
f. Enable types of data to extract.

176 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

g. Specify the frequency. Do one of the following:

If you want to... Do the following...

Run the analysis at the given Specify a frequency:
frequency • For AC output, type the frequency.
• For DC output, type “0”.
Run the analysis at DC and AC to 1. Enable Create Broadband Model.
create a SPICE netlist that 2. Specify the highest fitting frequency.
approximates broadband behavior. 3. To calculate two capacitance values for a
TSV structure, click Advanced and
enable “Broadband CG for TSV”.
The software creates the SPICE netlist by
combining DC and AC values of R and L to
approximate broadband behavior.

Note
Each Frequency input value is in scientific notation (for example, 1e6) or the
user-specified units. SI unit prefixes are accepted, for example: K for 1e3, M for
1e6, G for 1e9, T for 1e12, and so on. An input of “100 MHz” yields 100,000,000 Hz
(100e6). Examples: 100 MHz, 2 GHz, 123 kHz, 1.2e9, 456e6 Hz, 789 k, 654 M, and
so on.

h. Click Advanced and set options as needed.

Note
See “Guidance for Solving RL and GC Together” on page 338 for additional
details about these options.

i. Click Apply, then click Close.

j. Right-click Mesher and choose the Check Model Validity for Solving menu item.
This checks the Model for any problems.
10. Validate the mesh: In Project Browser, right-click Mesher and choose the Check Mesh
Validity for Solving menu item.
If an error message appears, fix the identified issues and rerun the mesh validation.
11. (Optional) Right-click Solver and choose Estimate Memory to estimate how long the
simulation will take based on how much memory the simulation requires.

HyperLynx® Advanced Solvers User Guide, VX.2.10 177

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

12. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.
Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a: Distribution” on page 376
• Remote Linux computer, • “Solving With AWS Job
especially one that is more Distribution” on page 379
powerful than your own
computer. • “Solving With HPC Job
Distribution” on page 380
• Your own computer with
multiple program instances, • “Solving With Local Mode —
which can shorten solving run Linux” on page 384
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

178 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

When the solve completes, a Results table appears in Object Browser. To examine
RLGC matrices, click an entry in the Results table. To view the solution summary, right-
click Solver and choose Show Simulation Summary.
13. Export the SPICE RLGC model:
a. Right-click Results and choose the Export Results menu item.
b. In the Export Results dialog box, specify the file name and location.
c. Set other options as needed.

Note
You can export a SPICE model as a Lumped L model or a Lumped Pi model.

If you want to Do the following...

extract...
RLGC Matrix 1. For Output Data, choose R-L-G-C- Matrix from the
dropdown list. The File Format automatically sets to
Matrix.
2. Set the Data File Precision value.
SPICE Netlist 1. For Output Data, choose SPICE Netlist from the
dropdown list. The File Format automatically sets to
SPICE Netlist.
2. Set the Data File Precision value.
3. Do one of the following:
• In the SPICE (RLGC) Options section, set Basic and
Advanced options as needed.
• Click Import Options to load saved settings.
• You can also save your options for future use.
IBIS Model 1. For Output Data, choose IBIS from the dropdown list.
The File Format automatically sets to IBIS.
2. Set the Data File Precision value.
3. (Optional) Enable Flip Source and Sink Pin Names.

d. Click Apply.
e. Close the Export Results dialog box.
Results
The software exports the model to the specified location.
Related Topics
Technology

HyperLynx® Advanced Solvers User Guide, VX.2.10 179

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

Editing a Padstack Database

Preparing to Mesh a Design
Preparing for RLGC Extraction

Solving to Extract Package Loop Inductance

Using Fast 3D Solver
Measure loop inductance for nets in a package design. For example, you can measure power
loop inductance from die to PCB through the package or capacitor loop inductance.
Although you can also use Full-Wave Solver and Full-Wave Solver HPC to solve for package
loop inductance, this procedure focuses on the Fast 3D Solver.

Note
If you plan to use console commands to set up your projects and solve, see “Console
Operation” on page 329.

Restrictions and Limitations

• Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
Prerequisites
• If you plan to use job distribution to reduce overall runtime, you have configured job
distribution. See “Job Distribution” on page 375.
• You have opened your design in Fast 3D Solver and verified that the project technology
and layout are accurate. See “Importing a Design” on page 41 and “Verifying That the
Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets to your model and created a short across one end of
the nets to complete the loop. See “Adding Ports to a Model” on page 90.
To measure power loop inductance from die to PCB through the package, you have
added ports at the die, shorted BGA, and excluded capacitors.

180 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

To measure capacitor loop inductance, you have added port at capacitors, shorted at the
die, leaving the BGA end open.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
For advanced options, see “Preparing to Mesh a Design” on page 129.
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
c. If necessary, simplify the physical model for a faster simulation. This reduces the
number of mesh elements, decreasing both the time and memory requirements for
solve.
i. Click the Layers tab.
ii. On dielectric (via) layers, simplify vias by choosing which layers to include
when modeling using a via macro model. Choose No Macromodel (default),
Reference Nets, Signal Nets, or All Nets.
In full wave simulations, the software replaces vias with triangular shapes. In
quasi-static simulations, the software replaces vias with circuit models. Both
accurately model via losses, however the quasi-static ignores via-to-via
interactions.
iii. Flatten plane or conductor layers to reduce the size of the mesh requirement on
the layer by more than half. Choose No Flatten (default), Top, Middle, or
Bottom.
While flattening removes the vertical extent of a layer, the software still uses the
full layer thickness for modeling losses. Sidewall losses and coupling are
ignored.
d. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 181

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

e. (Optional) Save your mesh settings for use by another simulation:

i. On the File tab, click Export Mesh Options.
ii. Specify a filename and click Save.
The software typically saves a mesh options file in the simulation directory as
MeshOptions.opt.
f. Click Apply.
3. Specify solver options for your design:
a. Click the Solver Options tab.
b. On the Output tab:
i. Select RLGC Extraction.
This selects R, L, G and C for package model analysis.
ii. Enable Current Density if you want the ability to generate 3D color plots for
current density.
This option enables you to specify various voltages on ports as a post-processing
step to generate 3D Color Plots of the current density. See “Creating Current
Plots” on page 246.
iii. Enable types of data to extract.
iv. Specify the frequency by doing one of the following:
If you want to... Do the following...
Run the analysis at the Specify a frequency:
given frequency • For AC output, type the frequency.
• For DC output, type “0”.
Run the analysis at DC 1. Enable Create Broadband Model.
and AC to create a SPICE 2. Specify the highest fitting frequency.
netlist that approximates 3. To calculate two capacitance values for a
broadband behavior. TSV structure, click Advanced and enable
Broadband CG for TSV.
The software creates the SPICE netlist by
combining DC and AC values of R and L to
approximate broadband behavior.

v. Click Advanced and set options as needed.

182 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

Note
See “Guidance for Solving RL and GC Together” on page 338 for details
about these options.

c. (Optional) On the Engine tab, set the pin area usage:

o Checked, the current flows to the perimeter of the pin and not inside the pin.
o Unchecked, the current flows into the pin to a point inside the mesh in the pin
area.
See “Use Pin Area” on page 361.
4. On the Threads tab, set multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology definitions,
see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

As in the Mesh Options tab, the software saves multi-threading options with the project.
Every project can have a different setting.
5. (Optional) Save your solver settings for use by another simulation:
a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a solver options file in the simulation directory as
SolverOptions.opt.
6. Click Apply and Close.
7. Validate the model before meshing: In Project Browser, right-click Mesher and choose
the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin placement,
flattening on via layers and on adjacent conductor layers, nets and port size.
8. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin

HyperLynx® Advanced Solvers User Guide, VX.2.10 183

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

placement, flattening on via layers and on adjacent conductor layers, nets and port
size.
b. Create the mesh:
In Project Browser, right-click Mesher and choose the Create Mesh menu item.
9. Validate the mesh:
a. In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
If an error message appears, fix the identified issues and rerun mesh validation.
10. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.
11. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.

184 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract Package Loop Inductance Using Fast 3D Solver

If you want to run a solve with... Do the following...

Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a: Distribution” on page 376
• Remote Linux computer, • “Solving With AWS Job
especially one that is more Distribution” on page 379
powerful than your own
computer. • “Solving With HPC Job
Distribution” on page 380
• Your own computer with
multiple program instances, • “Solving With Local Mode —
which can shorten solving run Linux” on page 384
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

Results
When the solve completes, results display in the Model window and Object Browser. See
“Viewing and Processing Results” on page 237.

HyperLynx® Advanced Solvers User Guide, VX.2.10 185

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Running Layout Software to Extract Packaging and PCB Interconnect Models

Running Layout Software to Extract Packaging

and PCB Interconnect Models
Launch HyperLynx Fast 3D Solver from Xpedition Package Integrator (via Xpedition Layout)
to extract an RLGC model.

Topic Description
Preparing for RLGC Extraction Before running an extraction, use this
procedure to launch HyperLynx Fast 3D
Solver and set up extraction options. You can
create RLGC constraints and assign them to
net classes.
Running a Siemens EDA Layout Tool to Extract parasitic RLGC values for nets in
Extract Packaging and PCB Interconnect package or board designs. The software can
Models report nets with parasitic RLGC values exceed
constraints, and create an IBIS model with
RLGC values and coupling matrix information
for each signal net.

Preparing for RLGC Extraction

Before running an extraction, use this procedure to launch HyperLynx Fast 3D Solver and set
up extraction options. You can create RLGC constraints and assign them to net classes.
Restrictions and Limitations
• Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
• RLGC extraction does not support designs with negative planes.
Prerequisites
• You have installed:
o Compatible versions of HyperLynx and a Siemens EDA layout tool with an Analysis
Control capability that supports the Fast 3D Solver client. For details, see HyperLynx
Release Highlights.
o Xpedition Layout or another Siemens EDA layout tool with an Analysis Control
capability that supports the Fast 3D Solver client. By contrast, an Xpedition Layout
Team Client does not support the Fast 3D Solver client.
• You have acquired the nbpack, nbapexconsole, and nbapexsolve licenses.
• If you plan to use job distribution to reduce overall runtime, you have

186 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Preparing for RLGC Extraction

o Installed a full HyperLynx Advanced Solvers release. The HyperLynx Advanced

Solvers release version must match the X-ICP release version.
o Configured job distribution that is based on HyperLynx technology. See “Solving
With HyperLynx Job Distribution” on page 382.
Procedure
1. Choose the Analysis > Analysis Control menu item.
The Analysis Control dialog box opens.
2. Choose the Fast 3D Solver > Start Client menu item. The HyperLynx Fast 3D Solver
client starts as a background process.
3. Choose the Fast 3D Solver > Extraction Settings menu item. The HyperLynx Fast 3D
Solver dialog box opens.
4. Click the Setup tab and set options:
a. Specify how the extraction accounts for return-current loops:

If you want to... Do the following...

Account for return-current paths on 1. Enable Include Reference Net.
one power-supply net 2. Select a power-supply net.
Extract partial parasitic RLGC values Disable (uncheck) Include
(do not account for return-current Reference Net.
paths)

b. Specify an extraction frequency:

If you want to... Do the following...

Model net resistance and inductance at 1. Enable Broadband.
two frequency points (0 Hz and a 2. Specify a frequency with units.
frequency you specify) For example, “100 MHz” or
Note: A net model does not “1e6”.
represent an actual broadband
variation of resistance and inductance
across a frequency range. It represents
an approximate behavior.

HyperLynx® Advanced Solvers User Guide, VX.2.10 187

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Preparing for RLGC Extraction

If you want to... Do the following...

Model net resistance and inductance at 1. Disable (uncheck) Create
one frequency point Broadband Model.
2. Specify a frequency with units.
For example, “100 MHz” or
“1e6”.
3. To calculate two capacitance
values for a TSV structure,
click Advanced and enable
Broadband CG for TSV.
c. Set cropping options:

If you want to... Do the following...

Reduce simulation run time 1. Enable Apply Crop.
by cropping regions of your 2. Specify a width including units. “Width”
design that surround a signal starts at an edge of a signal net trace.
net The software crops dielectric layers and a
metal layer that contains the reference net
you specify (if you check Include Reference
Net).
Include the full outline for Disable (uncheck) Apply Crop.
dielectric layers and a metal
layer that contains the
reference net you specify (if
you check Include Reference
Net)

d. If you want to distribute extraction processes across a cluster of remote computers,

check Use Job Distribution.
e. (Optional) Run an extraction or verify a setup:

If you want to... Do the following...

Run an extraction and report RLGC Select Analyze.
values
Verify a setup, such as constraint Select Setup Only.
assignments to net classes

188 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models

If you want to... Do the following...

Verify a setup and create a 3D model Select Setup and Open in Fast 3D
for the selected nets Solver.
Note: Note: You can use this
option to load the 3D model and
project in HyperLynx Fast 3D Solver,
to review the project and run an
extraction from there.
5. (Optional) Click the Rules tab and create RLGC constraint rules.

Note
Check an RLGC constraint to test an extracted value against a limit. When you
check a constraint on this tab, the software automatically checks the corresponding
constraint in the Analysis Control dialog box.

6. (Optional) Click the Constraints tab to create net classes and assign constraint rules to
them.

Note
You can use a regular expression to specify members of a net class.

7. Click Apply, then OK.

Results
You are now ready to run an extraction. See step 3 in “Running a Siemens EDA Layout Tool to
Extract Packaging and PCB Interconnect Models” on page 189.
To make constraints and net classes available to other designs, export a constraint file.
Related Topics
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models

Running a Siemens EDA Layout Tool to Extract

Packaging and PCB Interconnect Models
Extract parasitic RLGC values for nets in package or board designs. The software can report
nets with parasitic RLGC values exceed constraints, and create an IBIS model with RLGC
values and coupling matrix information for each signal net.
Restrictions and Limitations
• Fast 3D Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
• RLGC extraction does not support designs with negative planes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 189

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models

Prerequisites
• You have installed:
o Compatible versions of HyperLynx and a Siemens EDA layout tool that supports the
Analysis Control capability. For details, see HyperLynx Release Highlights.
o Xpedition Layout or another Siemens EDA layout tool with an Analysis Control
capability that supports the Fast 3D Solver client. By contrast, an Xpedition Layout
Team Client does not support the Fast 3D Solver client.
• For Analysis Control to properly work, you have installed the correct version of a
Siemens EDA layout tool. For details, see HyperLynx Release Highlights.
• Acquire the nbpack, nbapexconsole, and nbapexsolve licenses.
• You have set up extraction options. See “Preparing for RLGC Extraction” on page 186.
• If you plan to use job distribution to reduce overall runtime, you have:
o Installed a full HyperLynx Advanced Solvers release. The HyperLynx Advanced
Solvers release version must match the X-ICP release version.
o Configured job distribution that is based on HyperLynx technology. See “Solving
With HyperLynx Job Distribution” on page 382.
Procedure
1. Choose the Analysis > Analysis Control menu item.
2. In Analysis Control, from the Fast 3D Solver menu, choose Start Client. The
HyperLynx Fast 3D Solver client starts as a background process.
3. Select nets and run extraction:

If you want to extract data for... Do the following...

Nets you select 1. In the Siemens EDA layout tool, select
nets.
2. Click Analyze Selection.
All nets in the design Click Analyze Design.

4. If you have enabled job distribution, the HyperLynx Job Distribution dialog box opens.
Click SOLVE ALL SIMULATIONS. After solving starts, you can use the Jobs tab to
monitor progress.

190 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Running a Siemens EDA Layout Tool to Extract Packaging and PCB Interconnect Models

5. View results:

If you want to see... Do the following...

Numeric and graphical results, in Choose the Fast 3D Solver > Open Report
HTML menu item.
An IBIS model with RLC Choose the Fast 3D Solver > Open IBIS
parasitics Model menu item.
A 3D model for nets Choose the Fast 3D Solver > Open 3D
Model menu item in HyperLynx Fast 3D
Solver.

6. View more results or view the location of a net that fails a constraint:
a. In Analysis Control, click Hazards View.
b. In Hazard Explorer, on the left side, click the Fast 3D Solver tab:

If you want to see... Do the following...

Numerical results In the Fast 3D Solver tree in the left pane, expand
Results and click a measurement type.
Numerical results that In the Fast 3D Solver tree in the left pane, expand
fail constraints All Hazards and select either Summary or
Violations
The Violations branch is unavailable when all
results pass constraints.
Numerical results that 1. In the Siemens EDA layout tool, select one or
fail constraints for more nets that you have analyzed.
selected nets 2. In the Fast 3D Solver tree in the left pane,
expand Selection Hazards and select
Violations.

HyperLynx® Advanced Solvers User Guide, VX.2.10 191

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract PCB Loop Inductance

If you want to see... Do the following...

Locations of nets that 1. (Optional.) To improve your ability to see the
have failed a constraint location of a net, enable these buttons on the
Hazard Explorer toolbar:
• Fit Selected
• Color by Hazard
• Shadow Mode
For information about Hazard Explorer, see
“Displaying Hazards in the Design” in the
PCB Verification Guide.
2. In the Fast 3D Solver tree in the left pane,
expand either All Hazards or Selection
Hazards, and select a violation.
3. In the spreadsheet in the right pane, click a
row. The Siemens EDA layout tool highlights
the net.

Related Topics
Preparing for RLGC Extraction
Solving to Extract Package and PCB Interconnect Models Using Fast 3D Solver

Solving to Extract PCB Loop Inductance

Measure loop inductance for nets in a board design.
The software calculates the loop inductance obtained by shorting all decoupling capacitors at
the given frequency and generates a separate result called Shorted Loop Inductance. The value
does not include the inductance of the capacitor body.

Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Restrictions and Limitations

• Hybrid Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
• Hybrid Solver does not support job distribution.
Prerequisites
• You have a Hybrid Solver license.

192 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract PCB Loop Inductance

• You have opened your design in Hybrid Solver and verified that the project technology
and layout are accurate. See “Verifying That the Software Correctly Recognizes Your
Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have added ports between nets to your model at the device and decoupling
capacitor pins and shorted pins at the device. See “Adding Ports to a Model” on page 90.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

d. (Optional) Save your mesh settings for use by another simulation:

i. On the File tab, click Export Mesh Options.
ii. Specify a filename and click Save.
The software typically saves a mesh options file in the simulation directory as
MeshOptions.opt.
e. Click Apply.

HyperLynx® Advanced Solvers User Guide, VX.2.10 193

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract PCB Loop Inductance

3. Specify solver options for your design:

a. Click the Solver Options tab.
b. On the Output tab:
i. Select “Port Analysis (SYZ)” mode.
ii. To ensure S-parameter results are passive, enable Enforce Passivity.
If the software detects a passivity violation during a solve, the original results
display in Object Browser under “Unprocessed.” A second set of results also
display in Object Browser under the simulation name. This second set of results
contain numbers with enforced passivity.
If “Unprocessed” results do not display in Object Browser, the software did not
detect any passivity violations.
iii. To include a broadband netlist to use in a SPICE simulation, enable Broadband
Netlist.
A broadband netlist may be necessary if your SPICE simulator has issues with S-
parameters.
iv. Enable “Report Loop Inductance (if any) with Capacitors Shorted at”, then
specify a shorted frequency.
c. On the Frequency tab:
i. Set the type to Sweep.
ii. Specify sweep parameters:
If you want to... Do the following...
Specify the frequencies to 1. Specify a start and end frequency.
solve 2. Select either Linear or Logarithmic for the
(Run a discrete sweep) Frequency Scale.
• For a linear sweep, specify either the step
size or the number of points.
• For a logarithmic sweep, specify either the
points per decade or number of points.
For a discrete frequency sweep, the Number
of Points indicates the number of frequencies
to solve, which determines how long the
solve takes to complete.

194 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract PCB Loop Inductance

If you want to... Do the following...

Let the software pick a 1. Under Fast Frequency Sweep Options, click
minimum number of Type and choose Adaptive if the frequency
frequencies, but still provide response of the structure you are evaluating is
accurate results. The software smooth (free of sharp resonances).
increases the sampling rate This option runs the solver only on the
near frequencies with frequencies determined by the Maximum
resonances. Points and Threshold values.
(Run an adaptive sweep.) 2. Do one of the following:
• Specify the Maximum Points to use in the
sweep.
• Enable Automatically Determine
Maximum Points Needed to have the
software specify the maximum number of
points to use in the sweep.
3. Adjust the sliders to control the fast
frequency sweep results. The Threshold value
updates based on the slider settings when you
click Apply. See “Slider Settings for Fast
Frequency Sweep (AFS) Options” on
page 213. Also see the tooltip for details
about how each slider affects the solve.
Note: An AFS simulation is an interpolation
and results may not match actual values.
Run an interpolation 1. Under Fast Frequency Sweep Options, click
simulation. Type and choose Interpolation.
2. In the Interpolation table, click in a cell to
edit the sweep parameters as needed.
3. To decrease the solve time for results you
expect to be smooth (for example, for low
frequency PDN or SI with smooth
resonances), enable Use Spline Model For
Interpolation.
iii. Click Apply.
4. On the Engine tab, set Hybrid Solver options:

If you want to... Do the following...

Save solve run time by Enable “Ignore Unused Nets”.
ignoring all nets that are The software ignores all nets from the model that
not necessary for the do not have a port assignment. This option can
solve reduce result accuracy.

HyperLynx® Advanced Solvers User Guide, VX.2.10 195

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Extract PCB Loop Inductance

If you want to... Do the following...

Significantly reduce 1. Enable “Automatic Crop with Minimum
solve run time by Width”.
reducing Model size 2. Specify a crop width.
The software crops around the nets at the distance
you specify. The nets included are those that have
a port assignment.
Note: This option can reduce result accuracy.
Simplify the model by Enable “Ignore Layout Features smaller than”,
excluding layout then specify a distance.
features that are smaller
than the distance you
specify.
Simplify the model by Enable “Ignore All holes smaller than”, then
excluding holes that are specify a width.
smaller than the width
you specify.
Include ground/power Enable “PDN Aware SI Analysis”.
(reference) plane details
during the solve
Exclude ground/power Disable “PDN Aware SI Analysis”.
(reference) plane details This option reduces solve time by assuming an
during the solve ideal return path. This ideal path uses the actual
metal areas to find a return path for a given trace.
However, the use of an ideal return path can
reduce result accuracy.
Use the matched Enable “Use Matched Boundary for SI Analysis”.
boundary during the Applies only when all ports are signal ports and
solve either the layout is cropped with a matched
boundary or auto cropping is enabled.
Specify a virtual 1. Enable “Use Return Plane”.
reference plane location 2. Specify the distance between the virtual plane
to the layer you specify.
3. Choose to place the virtual plane either above
the top layer or below the bottom layer.
Enable this option to provide a default return path
when no other return path is available.
5. On the Threads tab, set multiple-threading and processor options.

196 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Extract PCB Loop Inductance

Note
Default option values work well for most solves. For option terminology definitions,
see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute threads.
In this case, you can change option values to reduce solve run time. See “Single Solve
Example” on page 336 and “Multiple Solve Example - Solve With GUI” on page 337.

As in the Mesh Options tab, the software saves multi-threading options with the project.
Every project can have a different setting.
6. (Optional) Save your solver settings for use by another simulation:
a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a solver options file in the simulation directory as
SolverOptions.opt.
7. Click Apply and Close.
8. Validate the model before solving:
• In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin placement,
flattening on via layers and on adjacent conductor layers, nets and port size. The
software also estimates the memory required to run the solve and checks for availability.
If an error message appears, fix the identified issues and rerun mesh validation.
9. Run the solve:

If you want to... Do the following...

Run the solve in the background. You In Project Browser, right-click Solver and
can continue to work in the GUI while choose the Solve > Solve menu item.
the solve runs.
Run the solve in the foreground. You In Project Browser, right-click Solver,
cannot continue to work in the GUI choose the Solve > Solve in GUI menu item.
while the solve runs. This solve takes
longer with this option.

HyperLynx® Advanced Solvers User Guide, VX.2.10 197

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Measure DC Power Resistance and IR Drop

Results
When the solve completes, results display in the Model window and Object Browser. You can
process results to view additional details about your solve data. See “Viewing and Processing
Results” on page 237.

Solving to Measure DC Power Resistance and

IR Drop
Find metal areas, stitching vias, and other structures in a power-distribution network (PDN)
with high DC power loss.
Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Restrictions and Limitations

• Hybrid Solver does not support a design containing multiple stackups, such as a design
with rigid and flexible areas.
• Job distribution is not available for this solving type.
Prerequisites
• You have opened your design in Hybrid Solver.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the measurement to include connections to an IC
or PCB, you have defined package connections. See “Defining Package Connections”
on page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• You have grouped package or die pins to get the distributed effect of current flowing
across multiple pins. See “Grouping Pins” on page 319.
• You have added ports between nets to your model and have shorted at least one port (to
connect the nets). See “Adding Ports to a Model” on page 90.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.

198 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Measure DC Power Resistance and IR Drop

Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

d. (Optional) Export the current mesh options to a file you specify:

i. On the File tab, click Export Mesh Options.
ii. If necessary, navigate to the save location.
iii. Specify the file name and click Save.
The software saves the mesh options in the specified file.
e. Click Apply.
3. Specify solver options for your design:
a. Click the Solver Options tab.
b. On the Output tab:
i. Select “DC Resistance Extraction”.
ii. Enable “Voltage (IR Drop)”.
iii. To view current density plots, enable Current Density.
c. On the Threads tab, set multiple-threading and processor options.

Note
Default option values work well for most solves. For option terminology
definitions, see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute
threads. In this case, you can change option values to reduce solve run time. See

HyperLynx® Advanced Solvers User Guide, VX.2.10 199

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Measure Near and Far Fields

“Single Solve Example” on page 336 and “Multiple Solve Example - Solve With
GUI” on page 337.

d. Click Apply, then Close.

4. Validate the model before solving:
• In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
The software checks the model and solve options for any settings that may cause errors.
Checks include valid mesh options, technology, ports, pin placement, flattening on via
layers and on adjacent conductor layers, nets and port size.
If an error message appears, fix the identified issues and rerun the mesh validation.
5. Estimate memory consumption:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.
The software displays the memory required to run the solve. Ensure sufficient memory
is available before running the solve.
6. Run the solve:
In Project Browser, right-click Solver and choose the Solve > Solve in GUI menu item.

Restriction
Do not choose the Solver > Solve > Solve menu item.

Results
The software produces a resistance table that you can use to create an IR drop plot and table.
See “Processing Results” on page 245.

Solving to Measure Near and Far Fields

Find structures that emit excessive radiation or fail to shield excessive radiation, which can
cause your design to exceed electromagnetic interference (EMI) or electromagnetic
compatibility (EMC) limits. You can observe how external radiation sources affect your design.
You can also plot electric, magnetic, or power density fields emitted by your design or received
by your design (from external radiation sources).
Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

200 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Measure Near and Far Fields

Prerequisites
• If you plan to use job distribution to reduce overall runtime, you have configured job
distribution. See “Job Distribution” on page 375.
• You have imported your design into Full-Wave Solver or Full-Wave Solver HPC. See
“Importing a Design” on page 41.
• You have verified that the project technology and layout are accurate. See “Verifying
That the Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a simulation for your project. See “Adding a Simulation to a Project”
on page 72.
• You have reduced your model layout size to include only the area you want to evaluate.
See “Cropping a Model” on page 74.
• If your design contains package design nets, you have added an external reference to
reduce port size. See “Adding an External Reference” on page 84.
• You have added ports between nets or pins to your model. See “Adding Ports to a
Model” on page 90.
• You have defined stimulus (that is, excitation) for your solve. You can assign excitations
to ports or assign excitations that are external to your design (such as a Huygens box or
dipole). See “Adding an Excitation” on page 123.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. On the Engine tab, set multiple-threading options.

HyperLynx® Advanced Solvers User Guide, VX.2.10 201

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Measure Near and Far Fields

Note
Default option values work well for most meshes.

d. Click Apply.
3. Specify solver options for your design:
a. Click the Solver Options tab, then the Output tab.
b. Select an analysis type:

If you want to run a solve to Do the following...

completion, then...
Create plots or results with either a Select Port Analysis (SYZ).
pre-solve excitation or a different post-
solve port excitation.
If you want to apply different port
excitations to create new plots or
results, you do not have to re-solve.
Note: To apply a different external
excitation (such as a Huygens box)
and create new plots or results, you
must re-solve.
Create plots or results with only a pre- Select EMI (Radiation)
solve excitation. Analysis.
If you want to apply different
excitations to create new plots or
results, you must re-solve.

202 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Measure Near and Far Fields

c. Enable solving output data options as needed:

To create an... Do the following...

Electric, 1. Enable Field Plot.
magnetic, or 2. On the EMI tab, specify field plot parameters:
power density a. Enable field type(s) to plot.
field plot
b. Specify field observation shape(s) and location(s).
Observation shapes can be points, planes, and so
on.
c. Click Add <shape>.
The spreadsheet displays a new row.
d. Click a cell to edit a value.
For X, Y, Z coordinates, use “Position” values
from the model layout.
The model layout displays and updates observation
shapes as you type coordinate values.
e. Add rows as needed.
Tip: A new row copies values from the bottom
row, making it easier to add several similar
rows.
Data that you Enable Huygens Box, click the Huygens tab, then
can export to specify properties.
files representing Expansion factor options define the gap between your
a Huygens box model layout and an enclosing Huygens box.
Note: A The Cells Per Wavelength option applies to meshing for
Huygens box a Huygens box surface.
enables you to
reuse radiated The Background Cells Per Wavelength option applies to
emissions results meshing for the environment (such as air) surrounding a
for your design Huygens box.
as an external
excitation for
another design.
Radiation pattern 1. Click the RCS tab.
This option generates radiation results by sweeping
over various angles.
2. Specify the start, end, and number of steps for both
Theta and Phi to run a sweep simulation using these
variables.
Current density Enable Current Density.
plot

HyperLynx® Advanced Solvers User Guide, VX.2.10 203

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Measure Near and Far Fields

d. Click Apply.
e. On the Frequency tab, specify a discrete sweep of frequencies to solve:
i. Set the Type to “Sweep”.
ii. Specify a start and end frequency.
iii. Select either Linear or Logarithmic for the Frequency Scale.
• For a linear sweep, specify the number of frequency points to use in the
sweep. The step size updates dynamically.
• For a logarithmic sweep, specify either the frequency points per decade or the
number of frequency points to use in the sweep.
The numbers you specify dictate the number of frequencies to solve, which
determines how long a solve takes to complete.
iv. Click Apply.
f. On the Engine tab, set solver accuracy, set Green’s Function, and use pin area in the
solve:
i. (Optional) For “Use Solver Accuracy Slider”, set the slider usage:
• Checked, the solver uses the slider level option. A tooltip defines each level.
• Unchecked, the solver uses default accuracy.
ii. Set Green’s Function:
Select MULTILAYERED if your design contains large, planar structures. This
option provides increased accuracy over a wide frequency range when your
design contains multiple dielectric layers between conductors.
Otherwise, select FREESPACE.
iii. (Optional) For Use Pin Area, set the pin area usage:
• Checked, the current flows to the perimeter of the pin and not inside the pin.
• Unchecked, the current flows into the pin to a point inside the mesh in the pin
area.
See “Use Pin Area” on page 361.
g. On the Threads tab:
Specify multiple-threading and processor options.

204 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Measure Near and Far Fields

Note
Default option values work well for most solves. For option terminology
definitions, see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute
threads. In this case, you can change option values to reduce solve run time. See
“Single Solve Example” on page 336 and “Multiple Solve Example - Solve With
GUI” on page 337.

4. (Optional) Save your solver settings for use by another simulation:

a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a solver options file in the simulation directory as
SolverOptions.opt.
5. Click Apply, then click Close.
6. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose Check Model Validity for Meshing.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin
placement, flattening on via layers and on adjacent conductor layers, nets and port
size.
b. Create the mesh:
In Project Browser, right-click Mesher and choose Create Mesh.
7. Validate the mesh:
a. In Project Browser, right-click Solver and choose Check Mesh Validity for
Solving.
b. If an error message appears, fix the reported issues and rerun mesh validation.
8. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose Estimate Memory.
The software displays the memory required to run the solve. Ensure sufficient memory
is available before running the solve.

HyperLynx® Advanced Solvers User Guide, VX.2.10 205

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Measure Near and Far Fields

9. Run the solve:

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.
Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a: Distribution” on page 376
• Remote Linux computer, • “Solving With AWS Job
especially one that is more Distribution” on page 379
powerful than your own
computer. • “Solving With HPC Job
Distribution” on page 380
• Your own computer with
multiple program instances, • “Solving With Local Mode —
which can shorten solving run Linux” on page 384
time. Use for large projects
when your computer has at
least eight cores and 16 GB
memory.
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

206 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Visualize Signal Return Paths and PDN Current Paths

Results
To create an EMI plot, see “Generating an EMI Plot” on page 263.
To plot other results, see “Viewing and Processing Results” on page 237.
To export a Huygens box, see “Exporting a Huygens Box” on page 261.
If more than one solve is running, you can manage the solves in the queue. See “Using the Solve
Queue” on page 362.

Solving to Visualize Signal Return Paths and

PDN Current Paths
Find return paths with high current density for signal nets or a power-distribution network
(PDN) using Full-Wave Solver or Full-Wave Solver HPC.
Note
If you plan to use console commands to set up projects and solve, see “Console Operation”
on page 329.

Prerequisites
• If you plan to use job distribution to reduce overall runtime, you have configured job
distribution. See “Job Distribution” on page 375.
• You have opened your design in Full-Wave Solver or Full-Wave Solver HPC and
verified that the project Technology and Layout are accurate. See “Verifying That the
Software Correctly Recognizes Your Design” on page 35.
• If you have a package design and want the solve to include connections to an IC or PCB,
you have defined package connections. See “Defining Package Connections” on
page 359.
• You have created a Simulation for your project and have copied nets or the Model from
the Project to the Simulation. See “Adding a Simulation to a Project” on page 72.
• You have reduced your model size to include only the area you want to evaluate. See
“Cropping a Model” on page 74.
• If needed, you have added external references to reduce port size for package design
nets. See “Adding an External Reference” on page 84.
• If needed, you have added passive circuits to connect power-supply nets. See “Adding a
Circuit Model to a Component” on page 111.
• You have added ports between nets or pins to your model, to signal nets to measure
return paths, and to power-supply nets to measure PDN current paths. See “Adding Ports
to a Model” on page 90.

HyperLynx® Advanced Solvers User Guide, VX.2.10 207

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Visualize Signal Return Paths and PDN Current Paths

• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. In Project Browser, double-click Solver.
The Simulation Options dialog box opens.
2. Specify mesh options for your design:
a. Click the Mesh Options tab.
b. On the Refinement tab, set the mesh frequency (the highest simulation frequency)
and the cells per wavelength.
Cells per wavelength defines the default mesh resolution. Typically, 10 cells per
wavelength are enough to resolve field variations across the physical model.
For advanced options, see “Preparing to Mesh a Design” on page 129.
c. On the Engine tab, set multiple-threading options.

Note
Default option values work well for most meshes.

d. Click Apply.
3. Specify solver options for your design:
a. Click the Solver Options tab.
b. On the Output tab:
i. Select Port Analysis (SYZ) mode.
ii. Enable Current Density.
iii. To ensure S-parameter results are passive, enable Enforce Passivity.
If the software detects a passivity violation during a solve, the original results
display in Object Browser under “Unprocessed.” A second set of results also
display in Object Browser under the simulation name. This second set of results
contain numbers with enforced passivity.
If “Unprocessed” results do not display in Object Browser, the software did not
detect any passivity violations.
iv. To include a broadband netlist to use in a SPICE simulation, enable Broadband
Netlist.
A broadband netlist may be necessary if your SPICE simulator has issues with S-
parameters.

208 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Visualize Signal Return Paths and PDN Current Paths

v. To remove artificial noise in S-parameters due to the physical effects of a port

assignment, enable Run De-Embedding.
When you enable this option, the software runs a separate solve for each port to
identify and remove artificial resonances.
c. On the Frequency tab, specify the frequencies to solve (run a discrete sweep):
i. Set the Type to “Sweep”.
ii. Specify a start and end frequency.
iii. Select either Linear or Logarithmic for the Frequency Scale.
• For a linear sweep, specify the number of frequency points to use in the
sweep. The step size updates dynamically.
• For a logarithmic sweep, specify either the frequency points per decade or the
number of frequency points to use in the sweep.
The numbers you specify dictate the number of frequencies to solve, which
determines how long the solve takes to complete.
d. On the Engine tab, set solver accuracy, set Green’s Function, and use pin area in the
solve:
i. (Optional) For “Use Solver Accuracy Slider”, set the slider usage:
• Checked, the solver uses the slider level option. A tooltip defines each level.
• Unchecked, the solver uses default accuracy.
ii. Set Green’s Function:
Select MULTILAYERED if your design contains large, planar structures. This
option provides increased accuracy over a wide frequency range when your
design contains multiple dielectric layers between conductors.
Otherwise, select FREESPACE.
iii. (Optional) For Use Pin Area, set the pin area usage:
• Checked, the current flows to the perimeter of the pin and not inside the pin.
• Unchecked, the current flows into the pin to a point inside the mesh in the pin
area.
See “Use Pin Area” on page 361.
e. On the Threads tab, specify multiple-threading and processor options.

HyperLynx® Advanced Solvers User Guide, VX.2.10 209

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Solving to Visualize Signal Return Paths and PDN Current Paths

Note
Default option values work well for most solves. For option terminology
definitions, see “Engine Option Terminology” on page 336.
Some server computers with multiple NUMA nodes can inefficiently distribute
threads. In this case, you can change option values to reduce solve run time. See
“Single Solve Example” on page 336 and “Multiple Solve Example - Solve With
GUI” on page 337.

4. (Optional) Save your solver settings for use by another simulation:

a. On the File tab, click Export Solver Options.
b. Specify a filename and click Save.
The software typically saves a Solver Options file in the simulation directory as
SolverOptions.opt.
5. Click Apply, then Close.
6. Mesh the design:
a. Validate the model before meshing. In Project Browser, right-click Mesher and
choose the Check Model Validity for Meshing menu item.
The software checks the model and mesh options for any settings that may cause
meshing errors. Checks include valid mesh options, technology, ports, pin
placement, flattening on via layers and on adjacent conductor layers, nets and port
size.
b. Create the mesh:
In Project Browser, right-click Mesher and choose the Create Mesh menu item.
7. Validate the mesh:
a. In Project Browser, right-click Solver and choose the Check Mesh Validity for
Solving menu item.
b. If an error message appears, fix the identified issues and rerun mesh validation.
8. Verify the amount of memory required to run the solve:
• In Project Browser, right-click Solver and choose the Estimate Memory menu
item.

210 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Solving to Visualize Signal Return Paths and PDN Current Paths

9. Run the solve:

Note
Solve in Partitioned Mode is not available for solves involving current density.

If you want to run a solve with... Do the following...

Your computer and one instance of In Project Browser, right-click a
the program. simulation or project (to solve all of its
simulations), then choose a menu item:
• Solve > Solve. You can continue to
work in the GUI while a solve runs.
You should not edit a simulation being
solved.
• (Unavailable for a project) Solve
> Solve in GUI. Solving takes longer.
You cannot continue to work in the
GUI while a solve runs.
Job distribution based on any of the 1. In Project Browser, right-click a
following technologies: simulation or project (to solve all of its
• IBM Spectrum LSF simulations), then choose the
Solve > Distributed Solve menu item.
• Amazon Web Services (AWS)
2. Use the Distributed Solve dialog box
• Windows HPC to run a solve. See:
• “Local mode”, which enables • “Solving With LSF Job
you to solve with a remote Linux Distribution” on page 376
computer or solve on your
computer with multiple program • “Solving With AWS Job
instances. Distribution” on page 379
• “Solving With HPC Job
Distribution” on page 380
• “Solving With Local Mode —
Linux” on page 384
Job distribution based on HyperLynx 1. In Project Browser, right-click a
technology simulation or project (to solve all its
simulations), then choose the
Solve > Solve from Job Distribution
UI menu item.
2. Use the HyperLynx Job Distribution
dialog box to run a solve. See “Solving
With HyperLynx Job Distribution” on
page 382.

Results
View current paths by plotting current density. See “Creating Current Plots” on page 246.

HyperLynx® Advanced Solvers User Guide, VX.2.10 211

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Setting Hybrid Solver Options in Full-Wave Solver HPC

To generate an HTML report, see “Processing Results and Generating Reports for a Solved
Project” on page 249.

Setting Hybrid Solver Options in Full-Wave

Solver HPC
The Hybrid Solver solves regions using different solve engines during the same simulation run.
Prerequisites
• You have selected Port Analysis (SYZ) mode on the Output tab of the Solver Options
dialog box.
• You have a Full-Wave Solver HPC license.
Procedure
1. From the Engine tab of the Solver Options dialog box, click Show Hybrid Solver
Options.
2. Set your solver options as needed:

Option Description
Ignore Layout Features Simplifies model by excluding layout features that are
smaller than smaller than the distance you specify.
Ignore Unused Nets If checked, the model crop removes the nets without ports.
Automatic Crop with Specifies the minimum width to crop around the nets in the
Minimum Width model included in the simulation.
The nets included are those that have a port assignment.
Note: Although this option significantly reduces
simulation run time, it can also potentially reduce
accuracy.
Ignore All holes Simplifies model by excluding holes that are smaller than the
smaller than width you specify.
PDN Aware SI Enabled, the solve includes ground/power (reference) plane
Analysis details.
Disabled (unchecked), the solve excludes ground/power
(reference) plane details and assumes an ideal return path.
Use Matched Applies only when all ports are signal ports and either the
Boundary for SI layout is cropped with a matched boundary or auto cropping
Analysis is enabled.

212 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Solving a Design
Slider Settings for Fast Frequency Sweep (AFS) Options

Option Description
Use Return Plane An optional virtual reference plane location where you
specify the position of the reference plane (Above Top or
Below Bottom) and the distance between the Top/Bottom
layer of the model and the reference plane.
Use this option to provide a default return path when no other
return path is available.
3. Click Apply.

Slider Settings for Fast Frequency Sweep

(AFS) Options
Three settings are available for each slider to control the adaptive frequency sweep options: low
(far left), medium (center), and high (far right) setting.

Slider Description
Convergence Low – Solve quickly using the fewest sample points.
Medium – Balance the speed and accuracy.
High – Capture more variation in S-Parameters.
Magnify Low – Solve quickly using the fewest sample points.
Medium – Balance the speed and accuracy.
High – Account for large variation in S-Parameters at lower
magnitudes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 213

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Solving a Design
Slider Settings for Fast Frequency Sweep (AFS) Options

214 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 6
Exploring Design Variations

3D Explorer can help you quickly set up many “what-if” design variations, run a solver on each
variation, and consolidate results into a report. For a pre-layout design, this capability can help
you design key interconnect elements, such as a differential signal via pair and nearby stitching
vias. For a post-layout design, this capability can help you verify that your design performs
sufficiently when accounting for PCB manufacturing tolerances and material property
variations.

Topic Description
3D Explorer Overview Understanding a few key concepts about 3D Explorer
can help you efficiently use your setup and solving time.
Using a Wide Design Variation To efficiently use your time and solver runtime, define
Range Followed by a Narrower an exploration strategy to help identify a range of design
Range variations that provide both acceptable performance and
design layout flexibility.
Evaluating Design Variations 3D Explorer helps you define a set of “what if” design
variations and run a solver on them. The software
post-processes and consolidates solver results into a
report that can help you identify a range of interconnect,
stackup, and other design parameters to produce
acceptable insertion loss, return loss, and so on.

3D Explorer Overview
Understanding a few key concepts about 3D Explorer can help you efficiently use your setup
and solving time.
When you use HyperLynx Full-Wave Solver HPC or another Advanced Solvers tool, you set up
a simulation to represent a design that you want to evaluate. If you want to evaluate the effect of
a different or varying design property (such as trace width), you copy a simulation, edit its
Layout, run a solver, and compare results from the original simulation to results from the copied
simulation.

3D Explorer automates much of this work by:

• Gathering design variation information from you

• Creating a project that includes a simulation for each design variation

HyperLynx® Advanced Solvers User Guide, VX.2.10 215

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
3D Explorer Overview

• Running a solver on each simulation

• Consolidating results for all simulations into a report
The remainder of this section describes the main types of information that 3D Explorer uses and
produces.

Templates
Templates represent a set of design parameters that you can edit and vary over a range. The
software includes many built-in templates for pre-layout and post-layout design evaluation. You
choose a template that provides the parameters you want to vary and evaluate, make a
customized copy of the template, then make edits to represent your design and the kinds of
variation you want to evaluate.

Pre-layout templates are self-contained, and include interconnect and return path structures.
Pre-layout templates enable you to vary practically all aspects of your design. You can use this
capability to design a variety of interconnect elements, such as signal vias or the mounting for a
DC blocking capacitor.

Post-layout templates operate on an existing design. You can use post-layout templates to
evaluate:

• Manufacturing tolerances with geometric and material parameter variations

• Design objects that you choose in a project or simulation
• Via transitions for all signal nets in a design
• Design changes, such as to add a stitching via near a signal via

216 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
3D Explorer Overview

Table of Parameters
A table of initial (default) parameters contains values that you can edit.

When you turn on “Expert Mode” (so that the toolbar icon to the left of the table has a darker
background ), the Parameters tab displays an Expert column. You can use this capability
to hide parameter rows whose values you do not want to change. To identify a parameter as an

expert parameter, click its Expert column cell, then click the Expert button ( ) below the
table. You can use Shift-click, Ctrl-click, or hold-mouse-button-and-drag, operations to select
multiple parameters before clicking the Expert button.

HyperLynx® Advanced Solvers User Guide, VX.2.10 217

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
3D Explorer Overview

Table of Variability
A table of variability contains design parameters and, if needed, their range of variability.

You can import variability from one or more XML files for another template or from example
files located at ...\MentorGraphics\<release>\SDD_HOME\Nimbic\data\variability.

Template Variables
You can use variables on the tables for parameters and variability. Variables can use other
variables, expressions with basic operands (such as +, -, *, /), and all functions and constants
available in the Python® math module (such as cos, log10, pi, pow, sin, sqrt, tan).

Supported functions and constants: acos, acosh, asin, asinh, atan, atan2, atanh, ceil, copysign,
cos, cosh, degrees, e, erf, erfc, exp, expm1, fabs, factorial, floor, fmod, frexp, fsum, gamma,
gcd, hypot, inf, isclose, isfinite, isinf, isnan, ldexp, lgamma, log, log10, log1p, log2, modf, nan,
pi, pow, radians, sin, sinh, sqrt, tan, tanh, tau, trunc.

Note
Precede a math function or constant with “math.”. For example, math.pi.

Note
An expression cannot contain spaces.

Variable Application Example

Use the table of parameters to define variables to represent the nominal via pad and via antipad
diameters, then add the variables to the table of variability:

• Define a variable named MyPadDiameter with a value of 20.

Do not define units for a variable. When you assign a variable to a parameter, the
software uses the units defined by the parameter.
• Define a variable named MyAntipadDiameter with a value of MyPadDiameter+10.
• Add the variables to the table of variability by selecting the table rows with the
variables, then clicking the Update Selected button.

218 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
3D Explorer Overview

The table of parameters should include this information:

Note
Variables contain numbers. When you assign a variable to a parameter, it inherits the units
from the parameter (marked in the preceding figure).

Use the table of variability to assign a range of via pad diameters to a variable, then assign
variables to parameters.

• Assign a sweep range for the MyPadDiameter variable. Set the operation to Multiply,
then set the sweep range to 1.0 1.1 1.2.
When you use the Multiply operation, a sweep value of 1.0 represents the original
parameter value. A sweep value of 1.2 represents the original parameter value times 1.2.
• On the Parameters tab, you previously defined a variable named MyAntipadDiameter
with a value of MyPadDiameter+10. It is ready to use and you do not have to change its
value on the Variability tab.
• Assign the MyPadDiameter variable to the sweep range for the ViaPadDiameter
parameter (a red arrow in the following figure marks the dependence).
• Assign the MyAntipadDiameter variable to the sweep range for the
ViaAnti-PadDiameter parameter (a red arrow in the following figure marks the
dependence).
• Include the parameters and variables when generating experiments by adding an X in the
Used column for them.

HyperLynx® Advanced Solvers User Guide, VX.2.10 219

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
3D Explorer Overview

The table of variability should include this information:

Table of Experiments
A table of experiments contains combinations of design parameters that you want to evaluate.

You can ignore or delete experiments for unwanted combinations of parameter values, to reduce
solve time and the amount of result data to review.

You can save a table of experiments to, and load it from, a CSV file. You can also use third-
party software such as JMP®, Minitab®, or MATLAB® to determine parameter values and
combinations for specific analysis, such as Design of Experiments (DOE) and Monte Carlo.

220 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
3D Explorer Overview

Table of Constraints
A table of constraints represents measurements that you want to include in a report.

You can import constraints from one or more XML files for another template or from example
files located at ...\MentorGraphics\<release\SDD_HOME\Nimbic\data\constraints.

Project With Simulations

A project contains a simulation for each experiment.

Full-Wave Solver, Full-Wave HPC, and Hybrid Solver automatically add ports for signal nets.
Fast 3D Solver automatically adds ports for signal and power nets.

All solvers automatically mesh your design variations.

HyperLynx® Advanced Solvers User Guide, VX.2.10 221

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Using a Wide Design Variation Range Followed by a Narrower Range

Table of Results
After solving all simulations, the software consolidates results into a table of results and an
HTML report (not shown).

Related Topics
Evaluating Design Variations With 3D Explorer

Using a Wide Design Variation Range

Followed by a Narrower Range
To efficiently use your time and solver runtime, define an exploration strategy to help identify a
range of design variations that provide both acceptable performance and design layout
flexibility.
An example strategy is to use two customized templates for a given design focus. The first
template specifies a wide parameter value range, to get a general idea of the overall combination
of parameter values that produce acceptable performance. After solving, review results to
identify a narrower range of parameter values that provide acceptable performance. Copy the
first template to make a second template. Edit the second template to specify a narrower range
of parameter values.
Let us walk through the process of using two customized templates to identify a range of
microstrip trace widths that have a maximum return loss of -30 dB.

Procedure
1. Customize the built-in Microstrip template and name it Microstrip-1.

222 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Using a Wide Design Variation Range Followed by a Narrower Range

2. Set the Trace Width variability range from 8 to 16 mils, with a step of 0.5 mils:

3. Generate an experiment and evaluate all trace widths (there is an X in the Used column
for all rows):

4. Measure only return loss and specify a maximum constraint of -30 dB:

HyperLynx® Advanced Solvers User Guide, VX.2.10 223

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Using a Wide Design Variation Range Followed by a Narrower Range

5. Run a solver and review results.

For this example, trace widths near 10 mils have less than -30 dB return loss.
6. Copy the Microstrip-1 template to Microstrip-2:

7. Set the Trace Width variability range to 9 to 11 mils, with a step of 0.2 mils:

224 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

8. Generate an experiment and evaluate all trace widths:

9. Measure only return loss and specify a maximum constraint of -30 dB:

10. Run the solver. For this example, trace widths between 9.4 and 10.6 mils have less than
-30 dB return loss. You can use this information to create a routing constraint.
Related Topics
Evaluating Design Variations With 3D Explorer

Evaluating Design Variations

3D Explorer helps you define a set of “what if” design variations and run a solver on them. The
software post-processes and consolidates solver results into a report that can help you identify a
range of interconnect, stackup, and other design parameters to produce acceptable insertion
loss, return loss, and so on.
Note
On-screen documentation provides template descriptions, parameter definitions, and option
definitions.

HyperLynx® Advanced Solvers User Guide, VX.2.10 225

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

Restrictions and Limitations

• Generally, the software cannot vary parameters for solder balls, solder bumps, bond
wires, and package lead fingers. However, you can use the Solder Ball Breakout
Template to create a BGA breakout structure, where you specify pitch, ball size, trace
width/length, and so on.
• 3D Explorer does not support a design containing multiple models, such as a design with
multiple stackups (such as rigid and flexible areas).
Prerequisites
• Some steps in the procedure below rely on these settings:
o You have turned on expert mode, so that the Expert Mode toolbar icon has a shaded
appearance and looks like this .
o You have turned off the Settings > Ask For Name When Customizing menu item
(so that the menu item has a white background). When this setting is turned off, the
software prompts you to name a customized template when you save it, rather than
when you create it.
• You understand “3D Explorer Overview” on page 215, “Using a Wide Design Variation
Range Followed by a Narrower Range” on page 222, and “Evaluating Design Variations
With 3D Explorer” on page 22.
• You have specified locations for your customized template and technology files (from
3D Explorer, choose the Settings > Choose Customized Template Location or
Choose Customized Technology Location menu item).
When you select a customized template in Template Browser, the software displays its
location near the bottom of the Help tab.
• If you plan to evaluate design variations for a project or simulation, you have opened the
design that contains that project or simulation. See “Opening and Verifying a Design”
on page 29 and “Adding a Simulation to a Project” on page 72.
• If you plan to import information into a customized template, you know the source file
location.
You can import information from a technology file (TECH) and padstack database file
(PSD). For post-layout templates, you can import information from a project file
(PHYS) and a design file (such as an MCM file). You can also import information from
constraints and variability XML files.
• (Optional) You know the range of geometric and material parameter variation (or
tolerance) introduced by your PCB manufacturer(s).
• (Optional) You know the performance requirements for your design. 3D Explorer can
report many types of results, such as return loss and crosstalk in dB.

226 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

• If you plan to solve with job distribution, you have:

o Configured machines and clusters. See “Job Distribution” on page 375.
o Turned on job distribution (from 3D Explorer, choose the Settings > Use Job
Distribution to Solve menu option).
• If you plan to evaluate a 3D area defined for a design in HyperLynx BoardSim®, you
have opened your design in BoardSim and have opened the “Add or Edit 3D Area”
dialog box. See Exporting Part of a Board Design for Analysis in HyperLynx Full-Wave
Solver in the HyperLynx SI/PI User Guide.
• If you plan to create an S-parameter model to represent interconnect in HyperLynx
LineSim®, you have opened your schematic design in LineSim and have opened the
“Assign S-Parameter/SPICE Model” dialog box. See the table row for the “S-parameter/
SPICE model” symbol in Creating a Schematic Design in the HyperLynx SI/PI User
Guide.
• You have acquired the nbgeomexplorer license.
Procedure
1. Choose a task:

If you want to... See this

step...
Design BGA breakout solder ball and interconnect elements 1.a
Design interconnect elements 1.b
Note: You can use this capability to design signal vias, DC
blocking capacitor mounting, and so on.
Design cables 1.c
Note: The software represents a cable with a 2-D cross section,
not a full 3-D structure. A 2-D cross-section solver creates results.
Evaluate and change signal via transitions for a design 1.d
Note: You can use this capability to identify design changes (such
as adding stitching vias) to improve performance.
Evaluate variability for design objects in a project or simulation 1.e
Evaluate manufacturing tolerances for a project, simulation, or 1.f
imported design
Evaluate manufacturing tolerances for a 3D area defined for a design 1.g
opened in BoardSim
Evaluate and change a 3D area defined for a design in BoardSim 1.h
Note: You can use this capability to identify design changes (such
as adding stitching vias) that improve performance.

HyperLynx® Advanced Solvers User Guide, VX.2.10 227

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

a. To design BGA breakout solder ball and interconnect elements:

i. From 3D Explorer and Template Browser, double-click a template on the
Breakout branch.
The Parameters tab displays template parameters and the Template Browser
minimizes.
ii. Go to step 2.
b. To design interconnect elements:
i. If you have opened a schematic design in LineSim and have opened the Assign
S-Parameter/SPICE Model dialog box, select Touchstone, then click Create in
3D Explorer.
ii. From 3D Explorer and Template Browser, select a template on the Cables,
Routing or Vias branch, then review its description on the Help tab.
Repeat this step until you identify a template that represents a type of
interconnect element that you want to design.
iii. Double-click a template.
The Parameters tab displays template parameters and the Template Browser
minimizes.
iv. Go to step 2.
c. To design a cable:
i. From 3D Explorer and Template Browser, select a template on the Cables
branch, then review its description on the Help tab.
Repeat this step until you identify a template that represents a type of cable that
you want to design.
ii. Double-click a template.
The Parameters tab displays template parameters and the Template Browser
minimizes.
iii. Go to step 2.
d. To evaluate and change signal via transitions for a design:
i. From 3D Explorer, choose the File > Create Pre-Layout Template from
Design menu item.
The “Choose Design or Project File for Pre-Layout” dialog box opens.
ii. Select a design file, then click Open.

228 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

The software creates a set of customized templates that represents all signal via
transitions in your design, adds them to the Customized > Pre-Layout branch in
Template Browser.
iii. Double-click a customized template that you want to evaluate.
The Parameters tab displays template parameters and the Template Browser
minimizes.
iv. Go to step 2.
e. To evaluate variability for design objects in a project or simulation:
i. From a solver tool, open the model window for a project or simulation.
ii. Choose design objects by doing any of the following:
• From the model window, select one or more objects, right-click, then choose
the Edit > Sweep Parameter menu item.
• From Object Browser, select one or more objects, right-click, then choose the
Edit > Sweep Parameter menu item.
• On the model window toolbar, click the Bounding Box Variability Tool icon
, click a location in the model layout to identify the first bounding box cor-
ner, drag to enclose design objects that you want to evaluate, then release the
mouse button.
The Parameter to Sweep dialog box opens.
iii. Select a parameter and click OK.
3D Explorer opens, imports the design, then opens the Variability tab. The
bottom row(s) of the table shows the object(s) you chose to vary.
iv. Go to step 3.

Note
If you want to review parameters, click the Parameters tab and go to step 2.

f. To evaluate manufacturing tolerances for a project, simulation, or imported design:

i. From 3D Explorer and Template Browser, select a template on the Post-Layout
branch, then review its description on the Help tab.
Repeat this step until you find a template that represents a type of evaluation you
want to perform.
ii. Double-click a template.
The Parameters tab displays template parameters and the Template Browser
minimizes.

HyperLynx® Advanced Solvers User Guide, VX.2.10 229

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

iii. Click the Value cell for the “Input Project File”, “Simulation Name”, or “Input
Design File” row, specify a design location, then click Open.
iv. Go to step 2.
g. To evaluate manufacturing tolerances for a 3D area defined for a design open in
BoardSim:
i. From BoardSim and the Add or Edit 3D Area dialog box, from the 3D Explorer
Variability button/menu, click Open 3D Explorer.
ii. In the Save Template dialog box, type a template name and location, then click
OK.
3D Explorer opens and adds the template to the Customized branch in Template
Browser, then opens the Parameters tab.
iii. Go to step 2.
h. To evaluate and change a 3D area defined for a design open in BoardSim:
i. From BoardSim and its Add or Edit 3D Area dialog box, from the 3D Explorer
Variability button/menu, click Create Pre-Layout Template.
3D Explorer opens and adds the template to Template Browser, in the
Customized > Pre-Layout branch.
ii. Double-click the template.
The Parameters tab displays template parameters and the Template Browser
minimizes.
iii. Go to step 2.
2. On the Parameters tab:

Note
Double-click a cell in the Name column to display its description in the Help tab.

If you want to... Do the following...

Edit parameter values Either:
• Type a new value.
• Select multiple cells, type a value, then press Enter.

230 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

If you want to... Do the following...

Add a variable 1. Click .
2. In the new row, specify a name, value(s), and type.
You can specify a value that includes a math
function or constant (such as math.pi), simple
operands (such as +, -, *, /), and expressions (such as
math.pi/6). An expression cannot contain spaces. For
reference information and example usage, see
“Template Variables” on page 218.
3. To add a variable to the Variability tab, either:
• Select a variable row, then click Update Selected.
• Click Update Variability.
Edit a technology 1. Click the Edit Technology button or click the cell
Edit distance units for the Technology row and Value column.
2. In the dialog box that opens, select a technology
from the Technology Database
3. If needed, use the Length option to change the
distance units.
4. Click OK.
Apply a technology Choose the Edit > Lock Technology menu item.
for a template to all Tip: This capability can be helpful when you create
other templates a set of customized pre-layout templates for a post-
layout design. You can edit the technology for a specific
template, then lock the technology to apply it to all
templates.
(Optional) Create or 1. Click the cell for the Padstack Database row and
edit a padstack Value column.
Note: If you do 2. In the Padstack Editor, either:
not specify a a. Use the Padstacks and Pad Shapes tabs to create
padstack database, the or edit a padstack.
software uses via pad, b. Use the Database tab to import a padstack
via anti-pad, and via database file (PSD).
drill parameters.
c. Click OK.
See the model layout Click Create Model. A solver tool opens and displays
for a customized pre- the model layout.
layout template or see
port locations for a
customized post-
layout template

HyperLynx® Advanced Solvers User Guide, VX.2.10 231

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

Note
You can filter and sort template rows.

3. On the Variability tab:

a. Ensure the parameters you want to evaluate are available:

If you want to... Do the following...

Add a parameter Click .
Note: To add a parameter to a post-layout template,
you can choose a parameter type by double-clicking
the Parameter cell, then choosing a list item.
The software initially displays a subset of available
parameters. To see all parameters, click until the
software repeats a parameter in the table.
Duplicate a parameter Select one or more parameter rows and click .
Note: You can use this capability to perform
additional operations for objects inside a bounding
box you have previously defined.
Remove a parameter Click anywhere in a parameter or variable row, then
or variable click .
Add a variable 1. Click .
2. In the new row:
a. Type a name.
b. In the Parameter column, select Variable.
c. Specify values for the Operation and Sweep cells.
You can specify a value that includes a math
function or constant (such as math.pi), simple
operands (such as +, -, *, /), and expressions (such
as math.pi/6). An expression cannot contain
spaces. For reference information and example
usage, see “Template Variables” on page 218.
d. If needed, check the cell in the Used column.
Import variability 1. Click .
(post-layout)
2. In the dialog box that opens, select one or more XML
files, then click Open.

232 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

b. Specify a relationship between design parameters on the Parameter tab (pre-layout)

or in a model layout (post-layout), and Sweep column values:

If you want to... In the Operation

column...
Either: Select Set.
• Use a parameter value “as is”.
• Override a parameter by value(s) in the Sweep
column.
Offset a parameter by value(s) in the Sweep column. Select Add.
Scale a parameter by value(s) in the Sweep column. Select Multiply.

c. To specify a range of parameter values:

If you want to... Do the following...

Specify a list 1. In the Sweep column, click a cell. A dialog box
opens.
2. In the Type list, select Value.
3. In the Value box, type a set of values or the name of
a variable that defines a set of values.
You can operate on a variable with simple operands
(- + * /) or Python math functions (by using the
“math” prefix). For example:
VariableA*math.sin(math.pi/6)
You can separate values or variable names with
spaces, tabs, or new lines.
Specify a sweep range 1. In the Sweep column, click a cell. A dialog box
opens.
2. In the Type list, select Sweep.
3. Type Start and End values.
4. Type either a Step Size or Steps value.

d. To ignore any sweep values defined on the Variability tab and use the value from
the Parameters tab (pre-layout) or model layout (post-layout), uncheck a cell in the
Used column.
You can check or uncheck many parameters at once by selecting multiple parameter
rows or cells, then clicking or pressing the X key.

Note
Do not uncheck a variable when a parameter uses it.

HyperLynx® Advanced Solvers User Guide, VX.2.10 233

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

e. To limit scope to specific stackup layers or other design elements, click a cell in the
Filter column. Use a dialog box that opens to specify the design elements to include.
f. To change the naming format of experiments and Touchstone files, specify new
values in the Name and Separator fields (located near the bottom of the window). To
automatically add the appropriate operators (such as =, +, x) to the name, check the
box next to the Separator field.
g. Click Generate Experiment.
The software creates a set of experiments and displays them on the Experiment tab.
For example, if you specified 3 trace widths, 3 differential trace separations, and 3
trace lengths, the software creates 27 experiments (3 x 3 x 3).
4. On the Experiment tab:
a. Review the set of experiments to solve.
To save solving run time and reduce the amount of result data to review, you can
turn off or delete specific experiments that represent parameter combinations that are
unlikely to be fabricated by your PCB manufacturer or are otherwise not valuable.
b. Specify experiments to solve:

If you want to... Do the following...

Turn off an experiment In the Used column, uncheck an experiment.
and not delete it You can check or uncheck many experiments at once
by selecting experiment rows or cells, then clicking
or pressing the X key.
Delete an experiment Click anywhere in an experiment row and click .
Add an experiment 1. Click .
2. Type a new name for the added experiment.
3. Enter new parameter values.

5. On the Constraints tab:

a. Review the set of results types and report options and update as needed:

If you want to... Do the following...

Add a result type Click .
Note: The software initially displays a subset of
available result types. To see all result types, click
until the software repeats a result type in the
table.

234 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Exploring Design Variations
Evaluating Design Variations

If you want to... Do the following...

Turn off a result type and In the Used column, uncheck a result type.
not delete it
Delete a result type Click anywhere in a result type row and click .
Import constraints 1. Click .
2. In the dialog box that opens, select one or more
XML files, then click Open.
Edit constraints Click a cell in the Function, Scale, Range, or other
columns, then edit values. On-screen documentation
provides details.
Edit a result type Double-click a cell in the Type columns and select a
new value.
Simplify the report by In the Results To Show box, use regular expressions
specifying which plots to or strings to specify the types of plots you want to see:
include • Type text into the box. On-screen documentation
provides syntax examples.
• Press Up Arrow or Down Arrow keys to scroll
through a list of regular expressions and strings.
b. To edit solver options, click Edit Simulation Options, then specify options.
c. To edit stimulus options for time-domain results, click Edit Time Options, then
specify options.
d. Choose the File > Save menu item. In the dialog box that opens, type a template
name and location, then click OK.
e. Click Run Analysis.

To stop solving before it completes, click .

6. View results:

If you want to... Do the following...

See a results table Click the Results tab.
See a report that summarizes and consolidates Click the Report tab.
solving results
You can save or share this HTML report.
Create additional results On the Results tab, click the
Post Process button.

HyperLynx® Advanced Solvers User Guide, VX.2.10 235

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Exploring Design Variations
Evaluating Design Variations

If you want to... Do the following...

See plots in the Touchstone Viewer 1. On the Results tab, click
If your design implements a complete and the View Results button.
supported Ethernet or PCI Express SERDES The Results to Show dialog
channel, the Touchstone Viewer can calculate a box opens.
figure of merit (FOM) from an S-parameter 2. Specify a filename filter
model. and click OK.
Export a results table to a CSV file 1. On the Results tab, click
(located above Status
Message area).
2. In the dialog box that
opens, specify a location
and click Save.
Export an S-parameter model to a LineSim 1. On the Experiment tab, in
schematic the Used column, check
You must have opened 3D Explorer from the experiment for the S-
LineSim. parameter model you want
to send to LineSim.
2. Click Choose ‘Used’
Results.
A solver tool opens and you can review all the simulations and results (including full
matrices) for experiments you defined with 3D Explorer.
Results
The software saves results to your customized template folder. The HTML report file name is
<customized_template_name>.Report.html.
You can edit a customized template by right-clicking it in Template Browser and choosing the
Edit menu item.
You can copy a customized template to refine parameter and variability values. In Template
Browser, right-click a customized template, click New, specify a template name and location,
then click OK.
You can add result types or change constraint values, and create a new report from existing
solver results. Make changes on the Constraints tab and click Post Process.
You can evaluate nets with circuit simulation. Create a LineSim schematic to represent net(s) in
your design and include S-parameter models created by 3D Explorer.
Related Topics
Exporting Part of a Board Design for Analysis in HyperLynx Full-Wave Solver [HyperLynx SI/
PI User Guide]
Assign S-Parameter/SPICE Model Dialog Box [HyperLynx SI/PI User Guide]

236 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 7
Viewing and Processing Results

The software provides results when solving completes. You can view results, post-process
default results to create specific plots and you can export results in various formats.

Topic Description
Viewing a Plot or Table You can view solver results as plotted curves or as a
table.
Processing Results You can convert default results into additional
reports.
Exporting Results Export your results in various formats.
Generating an EMI Plot The software can generate an electromagnetic
interference (EMI) plot to help you verify that your
design does not exceed radiation limits.
Generating Port Termination Data The software-generated S-parameters are terminated
by default with 50 ohm terminations. However, you
can change these terminations as a post-processing
step on S-parameters to generate port-terminated S-
parameters.
Generating Touchstone 2.0 Data The software generates S-Parameters that are
terminated by default with 50 ohm terminations.
However, you can change these terminations by
generating Touchstone 2.0 S-, Y- and Z-Parameters
from existing S-Parameters.
Preparing S-Parameter Results for Split your S-parameter results into separate
SPICE Simulation Touchstone files based on the coupling between ports
to isolate the ports of interest and reduce SPICE
simulation time.
Enforce Reciprocity The software supports anisotropic systems in which
the transmission/energy loss is the same regardless of
the direction of energy flow. For S-parameters, this
means S(i,j) = S(j,i). If the directional losses are not
identical, the software enforces reciprocity by taking
the average of the two losses and assigning the value
to both directions.
Running a Passivity Check/ Run a passivity check/enforcement to ensure the
Enforcement model does not create energy. Non-passive results can
cause convergence issues.

HyperLynx® Advanced Solvers User Guide, VX.2.10 237

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results

Topic Description
Enforcing Passivity You may need to enforce passivity to ensure that the
model does not create energy. Non-passive results can
cause convergence issues.

238 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Viewing a Plot or Table

Viewing a Plot or Table

You can view solver results as plotted curves or as a table.
The software displays plots in the Results Plot Window when solving completes. You can re-
open a plot or table from Project Browser by right-clicking Results and choosing View Results
Plots or View Results Table.

Note
The software provides more ways to view plots and tables than described here. You can
learn about other capabilities by pointing to a menu item or button and reading a tooltip.

Topic Description
Zooming and Other Plot Viewing Operations You can better see the details of a plot by using
zoom and other viewing operations.
Showing and Hiding a Curve You can help focus your attention by showing
specific curves and hiding other curves.
Measuring a Curve You can measure the location of a point on a
curve and the difference between points.
Measuring a Plot You can measure current density or
electromagnetic interference (EMI) results at a
plot location.
Adding Results From Another Simulation or a You can compare results data from the current
Touchstone File Simulation to results data from other
Simulations (in the same Project) or to a
Touchstone file.
Viewing a Table You can view results in a table.

Zooming and Other Plot Viewing Operations

You can better see the details of a plot by using zoom and other viewing operations.
Procedure
Adjust your view of a plot:

If you want to... Do the following...

Zoom in Rotate mouse wheel forward, click , or press +.
Zoom out Rotate mouse wheel backward, click , or press -.

HyperLynx® Advanced Solvers User Guide, VX.2.10 239

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Zooming and Other Plot Viewing Operations

If you want to... Do the following...

Zoom fit Click or press F.
Zoom to a region Click or press B, and drag a box around the region
to zoom.
Pan or translate 1. Click or press A.
2. Drag the mouse in the plot display.
3. Click to exit this mode.
Use different colors among branches at In Object Browser, right-click a branch and choose
the same level, and the same color Colors > Diversify Sibling Colors.
among branches at lower levels For example, if you right-click SIM1_wider_slot and
choose this option, all items under SIM1_wider_slot
become one color and all items under SIM1 become a
different color.

240 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Showing and Hiding a Curve

If you want to... Do the following...

Use different colors for items under the In Object Browser, right-click a branch and choose
current level Colors > Diversify Children Colors.
For example, if you right-click SIM1_wider_slot and
choose this option, items under S-Parameters became
one color, items under Y-Parameters became a
different color, and so on. This option does not affect
the color of items under SIM1.

Edit curve or text appearance, or plot 1. Double-click a curve (to edit its appearance) or an
scale empty plot area (to edit text appearance or plot
scale).
2. In the Plot Options dialog box, click a tab, edit
options, click Apply and then Close.
Bold a curve, and see its data points In Object Browser, check a curve, and then select it.

Showing and Hiding a Curve

You can help focus your attention by showing specific curves and hiding other curves.

HyperLynx® Advanced Solvers User Guide, VX.2.10 241

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Measuring a Curve

Procedure
Show or hide a curve:

If you want to... Do the following...

Show or hide a curve or branch of In Object Browser, check (show) or uncheck (hide) an
curves individual item or branch of items.
Show all curves with a similar name 1. In Object Browser, right-click an item and choose
Select Similar Results.
2. Right-click a selected item and choose Show
Selected Items.
Use this option when you have loaded multiple
Simulations that represent “what if” design variations
and you want to compare them by showing only S(1,1)
curves.
Use matrix elements to show or hide 1. In Object Browser, right-click a data type branch
curves for a data (such as S-Parameters) and choose Select Matrix
Entries.
2. On the Display tab of the Plot Options dialog box,
select one or more matrix cells or use buttons near
the bottom of the dialog box (such as Select
Diagonals).
3. Click Show Selected (show curves) or Hide
Selected (hide curves).
type

Measuring a Curve
You can measure the location of a point on a curve and the difference between points.
Procedure
Make measurements on a curve:

If you want to... Do the following...

See the X/Y location of a point Hover the mouse pointer over a curve until a black
square and text appear.

242 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Measuring a Plot

If you want to... Do the following...

See the difference between two points 1. Click .
2. Drag a line segment between two points and
optionally press and hold:
• <Shift> to snap the line segment to X axis, Y axis,
or 45 degree angle.
• X to lock the X value and snap the line segment to
the Y axis.
• Y to lock the Y value and snap the line segment to
the X axis.
The Plot Marker Values dialog box opens and the
Name field contains the difference between the
points.
3. If you want to add a plot marker that displays the
difference, click OK. Otherwise, click Cancel.
Add a plot line, to show a limit or 1. Click (add a horizontal line) or (add a
threshold vertical line).
2. Move the mouse pointer to the location of the plot
line you want to add, and double-click.
The Plot Marker Values dialog box opens.
3. To edit the marker name or other properties, type a
new value into a field.
4. Click OK, and then press S to exit this mode.

Measuring a Plot
You can measure current density or electromagnetic interference (EMI) results at a plot
location.
Procedure
1. In Object Browser, check a result.
2. Enable the toolbar button.

3. Hover the mouse pointer over a plot location until measurement and other text appear.

Adding Results From Another Simulation or a

Touchstone File
You can compare results data from the current Simulation to results data from other Simulations
(in the same Project) or to a Touchstone file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 243

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Viewing a Table

Procedure
Add the results you want to see:

If you want to... Do the following...

Copy results data from a Simulation In Object Browser, right-click Results
to another Simulation in the same Plot > <simulation_name>, then choose one of the
Project following:
• Copy Results from Other Simulations menu item
(includes only solver results).
• Copy All Results From Other Simulations menu
item (additionally includes results imported to a
Simulation, such as a Touchstone file).
See curves representing data from a From a file manager, drag one or more Touchstone files
Touchstone file to the Results Plot Window.

Viewing a Table
You can view results in a table.
Procedure
1. In Project Browser, right-click Results and choose View Results Table.
The Results Table Window displays results in a table.
2. To save results to a .txt or .csv file, click .

244 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Processing Results

Processing Results
You can convert default results into additional reports.

Topic Description
Creating a Project Report for Design You can create a comprehensive and portable HTML
Signoff and Results Archive report that contains information about your design
(such as Layout and Technology) and results (such as
S-parameters and net capacitance) for all Simulations in
your project.
Creating Current Plots Current plots show the distribution of current flowing
on conductor surfaces at frequencies you specify. This
information can help you identify signal nets with
overloaded return paths and power-supply nets with
excessive current density.
Creating Voltage Plots Voltage plots show the IR drop on conductor surfaces
at DC. This information can help you identify nets in a
power-distribution network (PDN) with excessive DC
power loss.
Processing Results and Generating You can create additional types of results and generate
Reports for a Solved Project an HTML report for a previously-solved project. For
example, you can create mixed-mode S-parameters and
time-domain reflectometer (TDR) plots without re-
solving.
Generating Mixed-Mode S- You can convert singled-ended (or standard mode) S-
Parameters parameters to mixed-mode S-parameters, which
provide differential mode and common mode
information for differential pairs.

Creating a Project Report for Design Signoff and

Results Archive
You can create a comprehensive and portable HTML report that contains information about
your design (such as Layout and Technology) and results (such as S-parameters and net
capacitance) for all Simulations in your project.
Procedure
From the Report menu, choose the Save Project Report or Save Project Report As menu
item.

The software creates an HTML report and a directory containing all supporting files.

HyperLynx® Advanced Solvers User Guide, VX.2.10 245

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Creating Current Plots

Results
The HTML report contains all of the available project data and provides many curve-viewing
capabilities (such as zoom and pan) and table-viewing capabilities (such as sort and filter). To
see built-in help information about the report viewing capabilities, click .
To share a report with someone, send them the <report>.html file and <report>.html.files
folder.

Creating Current Plots

Current plots show the distribution of current flowing on conductor surfaces at frequencies you
specify. This information can help you identify signal nets with overloaded return paths and
power-supply nets with excessive current density.
Restrictions and Limitations
• Fast 3D Solver and Hybrid Solver do not support plot animation.
Prerequisites
• You have enabled the appropriate options before solving, and solving has completed.
See “Solving to Visualize Signal Return Paths and PDN Current Paths” on page 207.
• To improve the appearance of color gradient and arrow plots, you have enabled the
Model window to draw object faces. To enable, choose the Options > Display Options
menu item. In the Configuration Options dialog box, click the Display tab, then check
Draw Faces of Objects Only.
Procedure
1. In Project Browser, right-click Results, then choose the Current Plot menu item.
The Create New Results dialog box opens, with values for many options already
correctly set for creating a plot. This procedure describes options that you may need to
change.
2. On the Result Creator tab, click Edit Port Excitations.
The Excitation dialog box opens.
3. On the Port Excitations tab, specify excitation options:
a. Select port(s) to excite.
b. Set Excitation Type to Voltage.
c. In the Frequency (Hz) field, type ALL. This a case-insensitive field.

246 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Creating Current Plots

Note
The software applies excitation to result frequencies that you select on the
Result Creator tab in the Create New Results dialog box. See step 4.c.

d. In the Voltage field(s), type a value. You can specify excitation with a real number,
an imaginary number, or a combination of real and imaginary numbers.
For the positive and negative members of a differential pair, specify an excitation
with a 180 degree phase shift. The following are example excitation voltage values
for members of a differential pair:
Number Type Positive Member Negative Member
Real number Voltage (Real) = 1 Voltage (Real) = -1
Imaginary number Voltage (Imag.) = 1 Voltage (Imag.) = -1
Combination of real Voltage (Real) = 0.707 Voltage (Real) = -0.707
and imaginary Voltage (Imag.) = 0.707 Voltage (Imag.) = -0.707
numbers

e. Click OK.
4. In the Create New Results dialog box, specify plot options:
a. In the Layers area, uncheck Plot Individually.
b. In the Nets area, check Plot Individually.
c. In the Frequency area, select results frequencies to plot.
d. In the Direction area, select XYZ.
e. To make it easier to see detailed current flow:

If you want to... Do the following...

Show current flow direction In the 3D Plot Options areas, check Arrow
with arrows Plot.
Show higher current flow 1. In the 3D Plot Options areas, check
with higher plot surfaces Surface Plot.
2. Check Raised Surface Plot.
3. To increase plot height, enter a larger
number in the Distortion Ratio field.
4. (Full-Wave Solver and Full-Wave Solver
HPC only) To specify the number of
animation plots, enter a number in the
Animation Steps field.

f. Click Apply and Close.

HyperLynx® Advanced Solvers User Guide, VX.2.10 247

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Creating Voltage Plots

The Model window displays the plot.

5. (Full-Wave Solver and Full-Wave Solver HPC only) To show a series of plots to help
you visualize current flow as an excitation propagates across your model:
a. In Object Browser, in the 3D Plots branch, check one or more plots to animate.
b. Right-click a checked plot and choose Animate.
c. To start animation, click a blank area in the Model window or in Object Browser.
d. To stop animation, right-click a checked plot and choose Animate.
Results
If you cannot see arrows on a plot for a signal net, open the Create New Results dialog box,
uncheck Surface Plot, then recreate the plot. For nets with very little current flow, you can also
try unchecking Scale next to the Arrow Size Ratio option.
To hide 3D plots and show the model, in Object Browser, check Model, then uncheck 3D Plots.
Related Topics
Processing Results

Creating Voltage Plots

Voltage plots show the IR drop on conductor surfaces at DC. This information can help you
identify nets in a power-distribution network (PDN) with excessive DC power loss.
Restrictions and Limitations
• Only Hybrid Solver can create voltage plots.
Prerequisites
• You have enabled the appropriate options before solving, and solving has completed.
See “Solving to Measure DC Power Resistance and IR Drop” on page 198.
• To improve the appearance of color gradient and arrow plots, you have enabled the
Model window to draw object faces. To enable, choose the Options > Display Options
menu item. In the Configuration Options dialog box, click the Display tab, then check
Draw Faces of Objects Only.
Procedure
1. In Project Browser, right-click Results, then choose the Voltage Plot menu item.
The Create New Results dialog box opens, with values for many options already
correctly set for creating a plot. This procedure describes options that you may need to
change.
2. On the Result Creator tab, click Edit Port Excitations.

248 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Processing Results and Generating Reports for a Solved Project

The Excitation Dialog dialog box opens.

3. On the Port Excitations tab, specify excitation options:
a. Select port(s) to excite.
b. Set Excitation Type to Voltage.
c. In the Frequency (Hz) field, type ALL. This a case-insensitive field.
d. In the Voltage field(s), type a value. You can specify excitation with a real number,
an imaginary number, or a combination of real and imaginary numbers.
e. Click OK.
4. In the Create New Results dialog box, specify plot options:
a. In the Layers area, uncheck Plot Individually.
b. In the Nets area, check Plot Individually.
c. To make it easier to see detailed voltages by showing areas with higher voltage with
higher plot surfaces:
i. In the 3D Plot Options areas, check Surface Plot.
ii. Check Raised Surface Plot.
iii. To increase plot height, enter a larger number in the Distortion Ratio field.
d. Click Apply and Close.
The Model window displays the plot.
Results
To hide 3D plots and show the model, in Object Browser, check Model, then uncheck 3D Plots.

Processing Results and Generating Reports for a

Solved Project
You can create additional types of results and generate an HTML report for a previously-solved
project. For example, you can create mixed-mode S-parameters and time-domain reflectometer
(TDR) plots without re-solving.
Prerequisites
• You have solved a project that created standard mode S-parameters.

HyperLynx® Advanced Solvers User Guide, VX.2.10 249

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Processing Results and Generating Reports for a Solved Project

• If you want the software to identify pairs of single-ended ports that form single mixed-
mode ports, ensure that your model has port numbering that supports one of these
schemes:
o (1,2), (3,4) — Ports 1 and 2 connect to one end of a differential pair, and ports 3 and
4 connect to the other end.
o (1,3), (2,4) — Ports 1 and 3 connect to one end of a differential pair, and ports 2 and
4 connect to the other end.
The software extends a numbering scheme for a design with more than four ports.
Procedure
1. Open 3D Explorer:

If you want to open it... Do the following...

From any HyperLynx Advanced From a solver tool, choose the Design > Open
Solver tool 3D Explorer menu item.
Directly (Windows) 1. From the Windows Start menu, choose the
Note: This method uses the HyperLynx <version> > HyperLynx
Full-Wave Solver or Full-Wave AdvSolvers <version> menu item.
Solver HPC. 2. From the HyperLynx Advanced Solvers
dialog box, select a license type, select 3D
Explorer, then click OK.
Directly (Linux) 1. Enter the following Linux command:
Note: This method uses the .../MentorGraphics/<version>/
SDD_HOME/Nimbic/bin/hlas.sh
Full-Wave Solver or Full-Wave
Solver HPC. 2. From the HyperLynx Advanced Solvers
dialog box, select a license type, select 3D
Explorer, then click OK.

2. Open a solved project:

a. In Template Browser, select the Post-Process > Solved Project branch, then click
Customize.
b. In the Choose Name dialog box, specify a study name and location, then click OK.
a. On the Parameters tab, click the Value cell on the Input Project File row, select a
project file (PHYS), then click Open.
The Template Browser adds your solved project to the Customized branch.
3. Specify the result types of results and generate them:
a. Click the Constraints tab.

250 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Processing Results and Generating Reports for a Solved Project

b. Review the set of result types and update as needed:

If you want to... Do the following...

Add a result type Click .
Note: The software initially displays a subset of
available result types. To see all result types, click
until the software repeats a result type in the table.
Disable a result type In the Used column, uncheck a result type.
and not delete it
Delete a result type Click anywhere in a result type row and click .
Import constraints 1. Click .
2. In the dialog box that opens, select one or more XML
files, then click Open.
Edit constraints Click a cell in the Function, Scale, or Range columns,
and edit values. On-screen documentation provides
details.
Edit a result type Double-click a cell in the Type columns and select a new
value.

c. Click Run Analysis.

4. View results:

If you want to... Do the following...

See a results table Click the Results tab.
See a report that summarizes and Click the Report tab.
consolidates solving results
You can save or share this HTML
report.
See plots in the Touchstone 1. Click the View Results button.
Viewer The Results to Show dialog box opens.
Note: If your design 2. Specify a filename filter and click OK.
implements a complete and
supported Ethernet or PCI Express
SERDES channel, the Touchstone
Viewer can calculate a figure of
merit (FOM) from an S-parameter
model.

HyperLynx® Advanced Solvers User Guide, VX.2.10 251

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Generating Mixed-Mode S-Parameters

If you want to... Do the following...

Export a results table to a CSV file 1. Click .
2. In the dialog box that opens, specify a
location and click Save.
A solver tool opens and you can review results displayed in Object Browser.
Results
The software saves results to your customized template folder. The HTML report filename is
<customized_template_name>.Report.html.
You can edit a customized template by right-clicking the template in Template Browser and
choosing Edit.

Generating Mixed-Mode S-Parameters

You can convert singled-ended (or standard mode) S-parameters to mixed-mode S-parameters,
which provide differential mode and common mode information for differential pairs.
Prerequisites
• If you want the software to identify pairs of single-ended ports used to form single
mixed-mode ports, ensure that your model has port numbering that supports one of these
schemes:
o (1,2), (3,4) — Ports 1 and 2 connect to one end of a differential pair, and ports 3 and
4 connect to the other end.
o (1,3), (2,4) — Ports 1 and 3 connect to one end of a differential pair, and ports 2 and
4 connect to the other end.
The software extends a numbering scheme for a design with more than four ports.
Procedure
1. In Project Browser, right-click Results and choose the Post-Process > Mixed-Mode
Port Data menu item.
The Create New Results dialog box opens.
2. On the Port Data tab, ensure that Operation is set to Mixed-Mode.
3. In the Selected Results list, select a Simulation that contains single-ended results to
convert.
4. In the Results Name field, type a name.

252 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Generating Mixed-Mode S-Parameters

5. Identify pairs of single-ended ports that you want to include in mixed-mode ports:

If you want to... Do the following...

Manually identify pairs of single-ended 1. In the Single-Ended Ports area,
ports. select two ports.
2. Click Make Mixed-Mode Port.
3. Repeat for more pairs of single-
ended ports.
Automatically identify pairs of single- Click (1,2), (3,4) or (1,3), (2,4).
ended ports, based on a port-numbering
scheme.

6. Click Apply and Close.

Results
The Results Plot Window and Object Browser display the mixed-mode results.
Related Topics
Processing Results

HyperLynx® Advanced Solvers User Guide, VX.2.10 253

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Exporting Results

Exporting Results
Export your results in various formats.

Topic Description
Exporting Extracted Parasitics to a SPICE You can convert S-Parameter results to a
Wrapper File SPICE wrapper format (.mod file) so you can
import the extracted parasitic results into a tool
such as Xpedition AMS.
Exporting an IBIS Model From RLGC Results You can export RLGC results to an IBIS file.
Exporting an IBIS Model From S-Parameters You can export S-Parameter results to an IBIS
model file.
Exporting Net Capacitance Create an output file containing the net
capacitance solve results for your model.
Exporting Results in SPEF Format You can export an RC netlist in SPEF format.
Exporting a SPICE Netlist From S-Parameters You can export S-parameters results to a
SPICE netlist. You may want to do this to run
transient simulation on your design with a
circuit simulator that does not support S-
parameters.
Exporting a SPICE Netlist From RLGC You can export RLGC results to a SPICE
Results netlist. You may want to do this to run
transient simulation on your design with a
circuit simulator that does not support RLGC
data. You can also export a subset of the nets
from the results to reduce simulation time.
Exporting a Huygens Box You can convert port or EMI analysis results to
a Huygens box file format. This enables you to
reuse radiated emissions results for your
design as an external excitation for another
design.

Exporting Extracted Parasitics to a SPICE Wrapper

File
You can convert S-Parameter results to a SPICE wrapper format (.mod file) so you can import
the extracted parasitic results into a tool such as Xpedition AMS.
Prerequisites
• You have solve results loaded in HyperLynx Full-Wave Solver, HyperLynx Full-Wave
Solver HPC, or HyperLynx Hybrid Solver.

254 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Exporting an IBIS Model From RLGC Results

Tip
To load results from a previous solve, choose File > Open Results File.

Procedure
1. In Project Browser, right-click Results and choose the Export Results menu item.
The Export Results dialog box opens. You can hover over a dialog box option to display
a tooltip.
2. Click the associated Browse icon, navigate to the save location, and specify an output
file.
Click Save.
3. From the Output list, choose SPICE Wrapper.
The Format field displays the associated format.
4. (Optional) In the Precision field, specify the number of places to the right of the decimal
point.
5. Click the associated Browse icon, navigate to the save location for the file and specify a
Wrapper File with a .mod extension.
Click Save.
6. Click Apply.
The Result Files Exported dialog box appears with a list of the exported files.
7. Click OK.
8. Click Close.
Results
A list of exported results files also appears in the Status window under the <project name> tab.

Exporting an IBIS Model From RLGC Results

You can export RLGC results to an IBIS file.
Restrictions and Limitations
• IBIS model format is available in Fast 3D Solvers only.
• The software exports an IBIS model containing pin and coupled RLC matrix package
information only. See “Sample of Exported IBIS Model File” on page 346.
Procedure
1. In Project Browser, right-click Results and choose the Export Results menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 255

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Exporting an IBIS Model From S-Parameters

The Export Results dialog box opens. You can hover over a dialog box option to display
a tooltip.
2. Specify an output file location.
3. From the Output list, select IBIS.
The File Format sets to IBIS.
4. (Optional) Specify the Data File Precision value, which is the number of places to the
right of the decimal.
5. (Optional) Enable Flip Source and Sink Pin Names.
6. Click Apply to export an IBIS model file.

Exporting an IBIS Model From S-Parameters

You can export S-Parameter results to an IBIS model file.
Restrictions and Limitations
• Exporting S-Parameters to an IBIS model is not available in Fast 3D Solver.
Prerequisites
• S-Parameter results are available in the tool.
Procedure
1. In Project Browser, right-click Results and choose the Export Results menu item.
The Export Results dialog box opens. You can hover over a dialog box option to display
a tooltip.
2. Select the results you want to export from the dropdown list.
3. To specify an S-Parameter output file, click the Browse icon and specify an output file
name and location.
4. Verify that the Output is set to S-Parameters and the format is set to Touchstone.
5. (Optional) Specify the Data File Precision value, which is the number of places to the
right of the decimal.
6. To specify an IBIS wrapper file, click the Browse icon and specify the name of the IBIS
model file, including an .ibs extension.
For example “<project_name>.ibs”.
The software creates an IBIS model from the S-Parameter results and places it in the
wrapper file.
7. Click Save.

256 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Exporting Net Capacitance

8. Click Apply to export an IBIS model file.

The Results Files Exported dialog box displays with a link to the exported results.

Exporting Net Capacitance

Create an output file containing the net capacitance solve results for your model.
Prerequisites
• You have net capacitance solve data available in Object Browser.
Procedure
1. In Project Browser, right-click Results and choose the Export Results menu item.
The Export Results dialog box opens.
2. Choose a simulation name that contains the results to export.
3. Specify a file name and output file location for the results.
The default filename is NetCapacitance.txt.
4. For Output, choose Net Capacitance from the dropdown menu.
5. (Optional) Specify a Data File Precision value, which is the number of places to the right
of the decimal for all result values. The default is 8.
6. Click Apply.

Exporting Results in SPEF Format

You can export an RC netlist in SPEF format.
Restrictions and Limitations
• SPEF format is available in Fast 3D Solver only.
• SPEF format is not available for a simulation when pins are grouped.
Prerequisites
• Results data is available from a model simulation.
Procedure
1. In Project Explorer, right-click Results and choose Export Results.
The Export Results dialog box opens.
2. Select the results you want to export and type in a file name including the complete path.
3. Set the Output Data to SPEF. The File Format automatically sets to SPEF.

HyperLynx® Advanced Solvers User Guide, VX.2.10 257

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Exporting Results in SPEF Format

4. Specify the Data File Precision. This is the number of significant digits to include in the
data floating point values.
5. Set the SPEF options:
a. Type the netlist name to export.
b. Specify the number of stages. The number of stages specifies how the RC ladder is
formed. For example, a 4-stage SPEF output:

c. Specify a naming convention. Valid naming convention keywords are:

o $Net = Net Name
o $Comp = Component Name
o $Pin = Pin Name
If a naming conflict exists, a number is appended to the name. You can also include
a valid fixed string as long as the string does not contain any special characters. For
example, to name the port corresponding to net “SIG[0]” on component “D1” to
“D1_SOMESTRING_SIG[0]”, set the naming convention to
“$Comp_SOMESTRING_$Net”. The default naming convention is $Comp_$Pin.
d. Decide whether to export power and ground nets:

If you want to... Do the following...

use the SPEF extraction for static Check “Export Signal Nets Only” to fold
timing analysis the power and ground nets onto the signal
net.
include partial net parasitics for Uncheck “Export Signal Nets Only” to
signal, power and ground nets include power and ground nets in the SPEF
export file.

6. Click Apply.
Results
The software saves the SPEF file to the directory you specified. You can also export, import,
save or load exporting options. Refer to the tooltips for details.

258 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Exporting a SPICE Netlist From S-Parameters

Exporting a SPICE Netlist From S-Parameters

You can export S-parameters results to a SPICE netlist. You may want to do this to run transient
simulation on your design with a circuit simulator that does not support S-parameters.
Restrictions and Limitations
• Fast 3D Solver does not support this option.
Prerequisites
• To export an equivalent circuit for imported results, such as an S-parameter file, import
them into the Results branch of Project Browser.
• You understand Enforce Reciprocity.
Procedure
1. In Project Browser, right-click Results and choose the Post-Process > Equivalent
Circuit menu item.
The Create New Results dialog box opens.
2. On the Port Data tab, ensure that Operation is set to Equivalent Circuit.
3. In the Selected Results list, select a Simulation that contains results that you want to
export.
4. In the Results Name field, specify a name.
5. In the Generated SPICE area:
a. Click the Browse icon and specify an output file, including one of the listed
extensions.
b. Choose a language compatibility type of Standard syntax or Spectre syntax.
6. Specify how to connect negative terminals in the output circuit to reference:

If you want to... Do the

following...
Short together negative terminals for all ports and set their Select Single.
voltage to 0.
Do not short together negative terminals for ports. Select Multiple.
This enables you to set any of the negative terminals in the
exported equivalent circuit to a non-zero voltage, when you
set up the exported equivalent circuit for use by a circuit
simulator.

7. If reciprocity was not enforced when the imported results were created, enable Enforce
Reciprocity.

HyperLynx® Advanced Solvers User Guide, VX.2.10 259

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Exporting a SPICE Netlist From RLGC Results

8. Specify which frequency points to include from S-parameters results:

If you want to... Do the following...

Include all available frequencies Check Use Original Frequency Points.
Include a different frequency range 1. Uncheck Use Original Frequency
Points.
2. Type the minimum, maximum and
step size for the frequency range to
include.
Note: Do not specify minimum
and maximum frequencies that
are outside of the frequency range
for the source S-parameter results.

9. Click Generate SPICE File.

An information dialog box appears displaying the location of the generated SPICE file
(.sp extension).
10. Click Close.
Results
You can now use the generated SPICE file as input for simulation.
To create a wrapper file (.mod) file, which you can then import into Xpedition AMS as
extracted parasitics, see “Exporting Extracted Parasitics to a SPICE Wrapper File” on page 254.

Exporting a SPICE Netlist From RLGC Results

You can export RLGC results to a SPICE netlist. You may want to do this to run transient
simulation on your design with a circuit simulator that does not support RLGC data. You can
also export a subset of the nets from the results to reduce simulation time.
Restrictions and Limitations
• This option is available in Fast 3D Solver only.
Prerequisites
• If you plan to export a subset of nets, you have selected the nets in Object Browser.
Procedure
1. In Project Browser, right-click Results and choose the Export Results menu item.
The Export Results dialog box opens. You can hover over a dialog box option to display
a tooltip.

260 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Exporting a Huygens Box

2. Click the Browse icon and specify an output file.

3. From the Output list, choose SPICE Netlist.
4. (Optional) In the Precision field, specify the number of places to the right of the decimal
point.
5. To export results in a wrapper file, specify the wrapper filename (.sp or .mod) including
the file path.
6. In the SPICE (RLGC) Options area, click the Basic tab and, if needed, update options.
• To remove any existing subcircuits during extraction, enable Use Flat Netlist.
• To export only the nets selected in Object Browser, enable Export Selected Nets
Only.

Note
If the export involves results from a solve with ports added in a loop (ports
between nets with one end shorted), the SPICE netlist will include the reference
net, even if it is not one of the selected nets.

7. Click the Advanced tab and, if needed, update options.

To speed up the simulation of your exported SPICE file, you can simplify the design by
filtering out non-essential elements.
8. Click Apply to export a SPICE netlist.
Results
The software exports the SPICE file to the specified location. You can now use the SPICE file
with your preferred simulator.

Exporting a Huygens Box

You can convert port or EMI analysis results to a Huygens box file format. This enables you to
reuse radiated emissions results for your design as an external excitation for another design.
Restrictions and Limitations
• An exported Huygens box conforms to the outline of your model layout, even for a non-
rectangular outline. If you want to export a rectangular Huygens box for a non-
rectangular outline, you can use an expert solver option to specify that choice. This
documentation does not define expert options.
Prerequisites
• You have set up and solved a simulation with the solve output set to either port mode or
EMI analysis mode, then enabled the Huygens box option. See “Solving to Measure
Near and Far Fields” on page 200.

HyperLynx® Advanced Solvers User Guide, VX.2.10 261

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Exporting a Huygens Box

Procedure
1. In Project Browser, right-click Results and choose the Export Huygens Box menu
item. The Create New Results dialog box opens.
2. On the Result Creator tab, select Huygens Box in the Data field and select Huygens
Box File in the Result Type field. If needed, select values in the Frequency field.
3. (Optional) If you solved with port analysis mode and you want to change excitations,
click Edit Port Excitations and edit values as needed.
4. Specify output file options:
a. Specify an output folder path and file base name.
b. If you enabled port analysis mode (not EMI analysis mode) prior to solving, specify
port contents:

Note
If you enable EMI analysis mode prior to solving, the software always writes an
output file representing a frequency and all ports.

If you want an output file that represents a Do this...

frequency and...
All ports Uncheck “Per Port Output”.
For example:
<path>/HuygensBox_freq<#>.txt
One port Check “Per Port Output”.
For example:
<path>/HuygensBox_freq<#>_rhs_0.txt
<path>/HuygensBox_freq<#>_rhs_1.txt

5. Click Apply.
Results
The software writes a set of Huygens box files, where each file represents design radiation
emissions for a specific frequency, to the folder you have specified.
You can import Huygens box files into:
• Siemens Simcenter™ 3D High Frequency EM software.
• A HyperLynx Advanced Solvers tool, as an excitation external to a design. See “Adding
an Excitation” on page 123.

262 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Generating an EMI Plot

Generating an EMI Plot

The software can generate an electromagnetic interference (EMI) plot to help you verify that
your design does not exceed radiation limits.
Restrictions and Limitations
• Field plots are available for only Full-Wave Solver and Full-Wave Solver HPC.
Prerequisites
• You have solved a design and created field data. See “Solving to Measure Near and Far
Fields” on page 200.
Procedure
1. In Project Browser, right-click Results and choose EMI Plot.
The Create New Results dialog box opens.
2. On the Result Creator tab, select the following from the data columns:

For this data... Do the following...

Plot Data Select EMI.
Sweep Input Select Frequency.
Sweep Output Select one or more field types.
Plot Type Select 3D Object Plot.
Frequency Select the frequency range to include in the plot.
Direction Select XYZ as the spatial directions of interest.
Shapes Select one or more shapes.
Shapes provide near field data. You can add near field
plots one at a time or in groups. Note that the processing
time increases with each selection you make.
Lines Select one or more of the X and Y constant lines
associated with the Shapes list.

3. Specify Plot Scale options:

a. Set Argument to Magnitude and select a Scale option.

HyperLynx® Advanced Solvers User Guide, VX.2.10 263

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Generating an EMI Plot

4. Specify 3D Plot options as needed:

If you want to... Do the following...

View a raised surface plot 1. Check Generate Surface Plot.
2. Under Surface Plot Options, check Raised
Surface Plot.
3. Specify the following:
• Surface distortion ratio: A multiplier that scales
plot vertices relative to data vertices to make it
easier to see small magnitude results. A larger
number yields a larger distortion.
• Animation steps: Specifies the number of plots
to show during animation. A value of zero
disables animation. A larger number uses more
memory, but gives a better number of distinct
animations. (To animate, check current plots,
right-click checked plots and choose Animate,
then click a blank area in the Model window or
in Object Browser.)
4. Check Allow Value Querying if you want to use
your mouse as a probe to view the value and
patch information.
View the flow direction 1. Check Generate Arrow Plot.
2. Specify Arrow Plot Options as needed.
View the color gradient 1. Check Generate Color Bar.
scale 2. Do one of the following:
• Specify maximum and minimum values for the
color bar.
• Check “Automatically Assign Extents to” have
the software determine the min/max values
based on the available plot values.

Tip
Before any EMI plot planes are added, the extents are not yet known. Once an EMI
plot plane is added, the extents are populated and you can add all of the planes with
individual maximums and minimums. The overall maximum and minimum are then
calculated. You can then add the same planes with the new maximum and minimum,
allowing all the scales to have the same maximum and minimum.

5. Click Apply, then click Close.

264 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Generating an EMI Plot

Results
Object Browser displays plots. Use the check boxes next to each plot to toggle the EMI plots on
and off. Only one color bar scale is visible at a time. Plots display in the model window, along
with the geometry. You can see a geometry and a plot by highlighting the layers or nets of
interest. You can rotate, zoom, and pan a geometry.
If you checked the option “Allow Value Querying” and want to display measurements when
you point to a location in a plot, click .
To delete a plot, select it in Object Browser, right-click a plot and click Delete Selected Plots.
The following figures show EMI plots for a simple patch antenna.
Figure 7-1. Simple Patch Antenna in the Model Window

HyperLynx® Advanced Solvers User Guide, VX.2.10 265

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Generating an EMI Plot

Figure 7-2. Simple Patch Antenna and the EMI Surface Plot for Plane1

Figure 7-3. Simple Patch Antenna and the EMI Surface Plot for Plane2

266 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Generating Port Termination Data

Figure 7-4. Simple Patch Antenna and EMI Arrow Plot for Plane5

Figure 7-5. Simple Patch Antenna and EMI Arrow Plot for Plane5 - Rotated

Generating Port Termination Data

The software-generated S-parameters are terminated by default with 50 ohm terminations.
However, you can change these terminations as a post-processing step on S-parameters to
generate port-terminated S-parameters.
Restrictions and Limitations
• Port termination data is not available in Fast 3D Solver.

HyperLynx® Advanced Solvers User Guide, VX.2.10 267

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Generating Port Termination Data

Prerequisites
• A simulation is setup and run using Port Analysis (SYZ) mode and Hybrid Solver
options set as needed. See “Setting Hybrid Solver Options in Full-Wave Solver HPC”
on page 212.
Procedure
1. In Project Browser, right-click Results and choose the Post Process > Port
Termination Data menu item.
The Create New Results dialog box opens.
2. On the Port Data tab, ensure that Operation is set to Port Termination.
3. Set the Results to use for the conversion and type in the Results Name.
4. Do any of the following to Add, Import, or Delete circuits as needed:

If you want to... Do the following...

Add a circuit model 1. Click Add Circuit.
2. Type the circuit model values for equivalent series
resistance in Ohms, equivalent series inductance in
Henrys, and capacitance in Farads.
3. Click OK.
The new circuit model appears in the Circuit Models
list.
Delete a circuit 1. Click the circuit model you want to delete.
model 2. Click Delete.
The model is removed from the Circuit Models list.
Import a circuit 1. Click Import Model.
model 2. Select the model to import from the browser
window.
3. Click Open.
The imported model appears in the Circuit Models list.
Export a circuit 1. Select the circuit model to export.
model 2. Edit the model name as needed.
3. Click Save.
The software saves the circuit model in the current
simulation directory.

5. Assign models to ports.

a. In the Port Termination area, select the Circuit Model (termination) to use from the
Circuit Models list and select the corresponding Port(s) from the Ports list.

268 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Generating Touchstone 2.0 Data

b. Click Assign Model To Ports.

The port symbol changes and the port displays with a strikethrough and bold to
indicate that a circuit model is assigned to the port. To assign a different circuit
model to a port, select the port and click Clear Model From Ports before assigning
a new circuit model.
c. Repeat for all ports that require termination.
6. Clear models from ports, and keep or remove ports from the S-Parameter model as
needed.
7. Click Apply.
Results
The software creates a plot and table of results from the data.

Generating Touchstone 2.0 Data

The software generates S-Parameters that are terminated by default with 50 ohm terminations.
However, you can change these terminations by generating Touchstone 2.0 S-, Y- and Z-
Parameters from existing S-Parameters.
Restrictions and Limitations
• Port Termination data is not available in Fast 3D Solver.
Prerequisites
• A simulation is setup and run using Port Analysis (SYZ) mode. (In Project Browser,
right-click Solver, choose Edit Solver Options Only and select Port Analysis (SYZ).)
Procedure
1. In Project Browser, do one of the following:
• Right-click Results and choose the Add Results menu item.
• Right-click Results and choose the Post-Process > Touchstone 2.0 Port Data
menu item.
The Create New Results dialog box opens.

HyperLynx® Advanced Solvers User Guide, VX.2.10 269

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Preparing S-Parameter Results for SPICE Simulation

2. On the Port Data tab, ensure that Operation is set to Touchstone 2.0.
3. Select the results to use for the conversion and type in a Results Name.
4. Edit the termination values of each port by clicking on a cell. Repeat this for all of the
ports that require termination.
5. Click Apply.
Results
The Results Plot displays in the Model window. Use Object Browser to change the data that is
displayed in the plot. To view the Results Table, in Project Browser, right-click Results and
choose the View Results Table menu item.

Preparing S-Parameter Results for SPICE

Simulation
Split your S-parameter results into separate Touchstone files based on the coupling between
ports to isolate the ports of interest and reduce SPICE simulation time.
Restrictions and Limitations
• Fast 3D Solver does not support port parameter splitting.

270 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Preparing S-Parameter Results for SPICE Simulation

Prerequisites
• You have run a solve and S-Parameter results are available in the tool, or you have
loaded an existing results file (File > Open Results File).
Procedure
1. In Project Browser, right-click Results and choose the Post-Process > Port Parameter
Splitter menu item.
The Create New Results dialog box opens with the Operation field set to Port Parameter
Splitter.
2. Specify an output folder for your splitter results.
3. (Optional) Specify the parameters for the split:

If you want to... Do the following...

Split the results into Specify a minimum frequency.
files using port The software uses values at or above this frequency to
coupling based on a determine if ports are coupled.
minimum frequency
Split the results into Specify a maximum frequency.
files using port The software uses values at or below this frequency to
coupling based on a determine if ports are coupled.
maximum frequency
Split the results into Specify a coupling cutoff threshold in decibels (dB).
files using port Default is -60dB.
coupling based on a Only ports with coupling greater than this value are
coupling cutoff included.

4. Click Apply.
Results
The software processes the results and creates the following files:
• PortData.sNp, where N is the number of ports in the design
• PortData.sNp.Connections, which shows port connections. Typical connections are 1-2,
3-4, and so on. This file displays in a browser after processing. White squares indicate a
connection while black squares indicate no connection.
• PortData.sNp.Coupling, which shows the port coupling and the strength of the coupling.
This file displays in a browser after processing. The software ignores self entries (1-1, 2-
2, and so on) and the connections. Higher values indicate stronger coupling.
• A set of s-parameter files that contain the port coupling based on the options you
specify.

HyperLynx® Advanced Solvers User Guide, VX.2.10 271

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Preparing S-Parameter Results for SPICE Simulation

If the software generates files with too many ports, increase the threshold. For example, use a
value of -40dB or -20dB.
Note
The software determines connectivity and associates the ports in pairs (in/out) so that if a
port A is coupled to another port B, then both of the in/out ports related to B are also
included. This ensures that s-parameters are based on an even number of ports.

Examples
This section contains an example of a connections and a coupling file.

Figure 7-6. Splitter Connections File

272 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Enforce Reciprocity

Figure 7-7. Splitter Coupling File

Enforce Reciprocity
The software supports anisotropic systems in which the transmission/energy loss is the same
regardless of the direction of energy flow. For S-parameters, this means S(i,j) = S(j,i). If the
directional losses are not identical, the software enforces reciprocity by taking the average of
the two losses and assigning the value to both directions.
Non-reciprocity can come from numerical residual error, measurement uncertainty, or an
anisotropic design or model.

Running a Passivity Check/Enforcement

Run a passivity check/enforcement to ensure the model does not create energy. Non-passive
results can cause convergence issues.
Restrictions and Limitations
• Passivity check is not available in Fast 3D Solver.

HyperLynx® Advanced Solvers User Guide, VX.2.10 273

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Enforcing Passivity

Prerequisites
• A simulation is setup and run using Port Analysis (SYZ) mode. (In Project Browser,
right-click Solver, choose Edit Solver Options Only, and select Port Analysis (SYZ)
mode.).
Procedure
1. In Project Browser, right-click Results and choose Post-Process > Check/Enforce
Passivity.
2. In the Create New Results dialog box, ensure Operation is set to Passivity.
3. Select the results to use and provide the filepath for the S-parameter file you want to
generate.
4. Click Check Passivity of Selected Results.
5. Click Apply.
Results
If results are passive, the message “PASSED passivity check on energy criterion” appears.
Otherwise, frequencies where results are not passive display.

Enforcing Passivity
You may need to enforce passivity to ensure that the model does not create energy. Non-passive
results can cause convergence issues.
Restrictions and Limitations
• Passivity enforcement is not available in Fast 3D Solver.
Procedure
1. In Project Browser, right-click Results, and choose Post-Process > Check/Enforce
Passivity.
2. In the Create New Results dialog box, ensure Operation is set to Passivity.
3. Set Selected Results to Results or Port Data.
4. Select the results to use and provide the filepath for the S-parameter file you want to
generate.
5. Choose an output file name in Generated S-Parameters.
6. Select whether to enforce reciprocity.
7. In some cases, passivity enforcement magnifies glitches seen at the output. If this is true
for your design, enable Apply Smoothing Filter to avoid this issue and maintain a
passive result.

274 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Viewing and Processing Results
Enforcing Passivity

8. Select the range of frequencies for the output file.

If you want to... Do the following...

Use the frequency points Enable Use original Frequency Points
found in the simulation
results
Use a new frequency range 1. Uncheck “Use original Frequency Points”.
2. Type in the minimum and maximum
frequency, and the frequency step size to
include in the calculation.
Note: For Full-Wave Solver, Full-Wave
Solver HPC and Hybrid Solver, ensure the
minimum frequency is no less than the minimum
frequency of the original S-parameter results.
Similarly, set the maximum frequency to no more
than the maximum frequency of the original S-
parameter results.

9. Click Enforce Passivity and Generate S-Parameters.

10. Click Apply.
Results
When completed, a dialog box displays “Passive S-Parameters Calculated Successfully” along
with the location of the newly generated S-Parameter file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 275

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Viewing and Processing Results
Enforcing Passivity

276 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 8
GUI Overview

The software GUI consists of a main window and several child windows.

You can drag and drop, resize, and move dockable windows to any location within the main
window. To restore the default windows layout, from the main window toolbar, click Options,
then choose the Restore Window Geometry menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 277

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview

Table 8-1. Main Window Contents

Sub-window Description
Project Browser In Project Browser, a project is the top-level container for everything
related to a particular design, and a simulation is a specific analysis,
usually focused on a subset of the design. One project can include
multiple simulations, allowing layout reuse across several analyses.
Project(s), simulation(s), and their contents each have a status associated
with them, which you can use to see what is left to complete a project.
Properties Table Displays detailed information about the selected item. Click any object in
Object Browser or Model window to see details in tabular form. Use
Find/Select Objects (Ctrl-Shift-F) or graphically pick individual Shapes,
Bond Wires, Solder Balls, and so on to display in the Properties Table.
Model Window Displays the layout, mesh, and the 3D results. This area also displays:
• Results Plot Window - displays the 2D Results in plot form
• Results Table Window - displays the results in tabular form
• Text Editor Window - displays all circuit netlist data.
Object Browser, Lists the objects in the current Model window. To access different Model
Results Plot windows, double-click the item in Object Browser. These items include
Layers, Nets, Pins, Bond Wires, Solder Balls, Ports, Circuit Ports, and so
on.
When you display results, this window displays all result items so you
can select which results to display.
Status Messages Logs each operation, displays a progress bar, provides a way to abort
each operation and displays the operation time stamp. Information,
Warning, and Error messages display in this window. You can control
which type of messages display by clicking the icons on the right side of
the Status Messages window.
Tabs separate status messages by project.
You can copy or remove a message by selecting the message, right-
clicking, and selecting the appropriate item from the menu.
Additionally, if an error message appears in the Status Messages window
during meshing that identifies a specific mesh element, you can view the
element in the display by double-click the error message. The meshing
element responsible for the error highlights in the display.

Each item in Project and Object Browser has its own context menu, which you can access by
right-clicking an item.

278 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Project Browser

Project Browser
Project Browser provides access to the parts of a project. A project is the top-level container for
everything related to a particular design, while a Simulation is a specific analysis, usually
focused on some small subset of the original design.
One project can include multiple Simulations, allowing layout reuse across several analyses. In
Project Browser, the project(s), simulation(s), and their child items each have a status associated
with them, which you can use to tell what is left to complete a project. Each item in Project
Browser has its own context menu that you can access by right-clicking an item or by double-
clicking an item to perform the default action (highlighted action in the menu).
Topic Description
Project Perform save and file operations on a project, add a simulation and run a
Actions solve through this context menu.
Technology Edit the stackup and materials of your design, as well as add package
Actions connections through the Technology dialog box.
Layout In Project Browser, use context menus in the Layout branch to manipulate
Actions your model. For example, you can use context menus to add an external
reference or crop a layout.
Simulation Edit notes, extract nets, choose an analysis theme, launch a solve or view a
Actions simulation summary from the Simulation menu.

Project Actions
Perform save and file operations on a project, add a simulation and run a solve through this
context menu.

Project
Operation Description
Save Operations (Save >)
Save Project Saves the Project to the system disk at the Project file location.
Performs a “Save Project As” operation if the Project file name
is not specified. See “Saving a Project” on page 37.
Save Project As Opens the Save Project As dialog box to choose a save location
for the current Project. Then saves the Project to the system
disk.
Save Project Report Saves the project report, an HTML-style report of the Project
properties, to the system disk at the Project report file location.
Performs a “Save Project Report As” operation if the Project
report is not specified.

HyperLynx® Advanced Solvers User Guide, VX.2.10 279

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Project Actions

Operation Description
Save Project Report As Opens the Save Project Report As dialog box to choose a save
location for the current Project report. Then saves the Project
report to the system disk.
Save Project as Older Version Saves the project in a different software version (5.1.1 or newer)
so you can open the project in an previous version on the
software.
Save Compressed Project Saves the project as an .nimzip file.
Save Compressed Project as Saves the project as an .nimzip file in a different software
Older Version version (5.1.1 or newer) so you can open the project in an
previous version on the software.
File Operations (File >)
Reload Project Reloads the project from the files on the disk.
Edit Notes Opens a text editor so you can add a note to the project. See
“Adding a Note to a Project” on page 36.
Extract Results to Project Copies all result files to the Project directory for easy access
Directory when exporting to external tools. Make sure to save the Project
first to obtain all results files.
Open Results in Touchstone Opens all Touchstone files from the project’s simulation
Viewer directories in the Touchstone Viewer.
Explore Project Directory Opens the project directory in a browser.
Clean Project Directory Deletes any unnecessary folders or files in the project folder.
For example, folders left over from a deleted simulation.
View Project Log File Opens the log file inside a text editor outside of the tool.
Solve Operations (Solve >)
Solve Runs the project in console mode, (in the background), solving
all simulations. Progress is reported in the Status Messages
window, where you can abort the simulation as needed. Results
are loaded automatically. Use this option to continue work in
the GUI while a simulation runs in the background. See “Main
Window Contents” on page 278.
Distributed Solve Solves all simulations with job distribution, by using the
Distributed Solve dialog box. You can use this dialog box for
solving with local mode or a supported third-party job
distribution technology that has already been set up. See “Job
Distribution” on page 375.
Run All Simulations Runs all simulations in the selected project.
Run All Simulations in Runs all simulations in the selected project in partitioned mode.
Partitioned Mode

280 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Technology Actions

Operation Description
Solve from Job Distribution Solves all simulations using job distribution, by using the
UI HyperLynx Job Distribution dialog box. You can use this dialog
box to set up and solve with all supported job distribution
technologies. See “Job Distribution” on page 375.
Project Operations
Add Simulation Adds a simulation to the project. Each simulation has its own
(You manually import design model, mesher, solver and results. See “Adding a Simulation to
information into a new a Project” on page 72.
model.)
Add Simulation using Project
Model
(The software automatically
imports design information
into a new model.)
Launch Scripting Starts an interactive scripting environment where you can
Environment automate processes.
Copy Model to All Copies the Model at the Project level to all simulations. Use this
Simulations option to update existing simulation models with contents from
the Project level model.
Copy Technology to All Copies the Technology at the Project level to all the simulations.
Simulations Use this option to make changes to the Layers, Materials, Bond
(Unavailable for designs wires, and so on in all simulations. See “Technology” on
containing multiple stackups, page 350.
such as a design with rigid
and flexible areas.)
Rename Project (Default Action) Changes the name of the project.
Delete All Mesh Data Deletes all mesh data from the project.
Delete All Solver Data Deletes all solver data from the project.
Delete All Results Data Deletes all result data from the project.
Close Project Closes the selected project.
Show Help Opens Help.

Technology Actions
Edit the stackup and materials of your design, as well as add package connections through the
Technology dialog box.

HyperLynx® Advanced Solvers User Guide, VX.2.10 281

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Layout Actions

Technology
Action Description
Edit Technology Opens the Technology dialog box to edit the Technology
(Layers, Materials, Bond Wires, Solder Balls, Solder Bumps,
Leads, and so on). See “Technology” on page 350.
Edit Stackup Areas Opens the Technology dialog box to verify the location, rigid or
(Unavailable for Hybrid flexible type, and set of layers for each region (that is, “stackup
Solver and Fast 3D Solver.) area”). See “Editing Stackup Areas” on page 358.

Import Technology Opens an Open Technology File dialog box to choose a

Technology file to import (Technology.tech).
Export Technology Opens the Save Technology File dialog box where you can
export the current Technology to the file you specify.
Note: The software does not export stackup area
information for a design with multiple stackups.
Edit Layers Opens a specific tab on the Technology dialog box. See
Edit Materials “Technology” on page 350.
Edit Bond Wires
Edit Solder Balls
Edit Solder Bumps

Layout Actions
In Project Browser, use context menus in the Layout branch to manipulate your model. For
example, you can use context menus to add an external reference or crop a layout.

Layout

Note
See tooltips for information about Project Browser items and context menu items.

This section provides information to supplement tooltips.

282 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Layout Actions

File Menu

Item Description
Import Design File(s) Imports a design file into a project layout.
(Available for a project Caution: If a project layout already exists, an imported design
layout.) file replaces an existing project layout.
Export Design File Saves your model as it appears in the Model window for later use.
See “Exporting a Model” on page 338.

View Menu

Item Description
Find/Select Objects Opens the Find Objects dialog box to search for objects in the
selected layout. See “Finding an Object” on page 36.
Show Model Summary Opens a dialog box that displays a numerical summary of the
contents of a model.
Show Matched Boundary Highlights the matched boundary shapes in the model when the
Boundary is set in the Cropping dialog box. See “Cropping a
Model” on page 74.

Edit Menu

Menu Item Description

Edit External References Opens the External References dialog box to add or edit external
references used for bond wires, solder balls, or general top (die)
and bottom (board) references. See “Adding an External
Reference” on page 84.
Crop by Nets Opens the Cropping dialog box to crop selected nets. See
“Cropping a Model” on page 74.
Edit Layout Options Opens the Layout Options dialog box to modify layout units,
extents, circle segmentation, grid options, and so on. See
“Manually Creating a Model Layout” on page 312.
Edit Padstack Database Opens the Padstack Editor dialog box to modify padstacks and
via-related pad shapes. See “Editing a Padstack Database” on
page 331.
Remap Layers Opens the Layer Remap dialog box to perform Boolean
operations on layers. You can merge layers, convert layers to
holes, copy shapes to other layers, create holes, and so on. See
“Remapping a Layer” on page 59.

HyperLynx® Advanced Solvers User Guide, VX.2.10 283

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Layout Actions

Menu Item Description

Open Transform Dialog Opens the Transform dialog box, where you can move, expand,
rotate, scale, or mirror a selected model layout object or an
entire model layout. See “Moving, Resizing, Rotating, or
Mirroring Objects” on page 322.

Tools Menu
Please rely on tooltips for information about menu items that are not described in the following
table.
Menu Item Description
Convert to Legacy Model A legacy model type supports only designs with a single stackup.
Convert to Multistack Model Object Browser columns for a legacy model type look similar to
this figure:

A multistack model type supports designs with a single stackup

OR multiple-stackups. Object Browser columns for a multistack
model type look similar to this figure:

For backwards compatibility, you can convert a multistack model

type to a legacy model type, but only for designs with a single
stackup.
You convert a legacy model type to a multistack model type to
enable a more-capable Object Browser.
Convert to 3D Model Converts a layout from a layered representation to a 3-D
(Supported by legacy, volumetric representation used by meshing.
single-stackup, models.) This option can help troubleshooting or debugging efforts by
creating a persistent form of a model that is normally created
automatically and discarded when you mesh a model.
Create Valid Nets with Breaks apart all nets in the model that are not physically
Propagation touching. Nets are propagated through connected geometry.
Use this option if you imported an ODB++ design that contains
metal existing only in <EMPTY_NET>. The software breaks up
the metal in <EMPTY_NET>, groups the geometries that are
touching and creates new nets from those groups.

284 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Layout Actions

Menu Item Description

Update Dielectric Performs an operation on the layout that updates the extents of
Boundaries the dielectric materials to match the convex shape of the
geometry.
Copy Dielectric To Matched Copies the layer dielectric shapes to the matched boundary
Boundary shapes on each layer.
Use this option if you cropped your model before adding
dielectric shapes.
Copy Matched Boundary To Copies the matched boundary shapes to the layer dielectric
Dielectric shapes on each layer.
Use this option if you cropped your model without enabling the
matched boundary option. Creating a matched boundary adds
shapes to remove artificial noise from the crop boundary.

Draw Menu

Menu Item Description

Create New 3D Layout Opens the Layout Options dialog box to create a brand new
Layout from scratch.
Show Finalized Model Creates a temporary view of the model with overlapping shapes
“healed” together into connected polygons. The software uses
this model for Meshing.
Show 3D Model For Creates a copy of the model in a 3-D volumetric representation
Meshing used by meshing, instead of a layered representation normally
(Supported by legacy, single- displayed by the layout window, then adds it to Object Browser.
stackup, models.) This option can help troubleshooting or debugging efforts by
creating a persistent copy of a model in a form that is normally
created automatically and discarded when you mesh a model.
Add Solve Region Opens the Add Solve Region dialog box where you can define a
solve region using automatic cropping or net tunneling. See
“Solving in Partitioned Mode to Characterize Interconnect and
Signal Vias” on page 164.

Simplify Menu
Refer to tooltips for information about menu items that are not described in the following table.

HyperLynx® Advanced Solvers User Guide, VX.2.10 285

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Simulation Actions

Menu Item Description

Clean Geometry For Fixes common problems prior to meshing. Searches for locations
Meshing where pins may be placed between a connective object (e.g. bond
wire/solder ball/solder bump) and a conductor layer. In such cases
the pin is moved to the opposite side of the layer, ensuring that the
pin and connective object do not conflict.
Fix Geometry Problems Looks for any issues with Ports, Circuits, or Pins and tries to fix
them.
Break Up Path Shapes Converts all Paths into single-segment paths to fix shorting issues
on cases with rounded ends.
Remove Small Edges Performs an operation on the Layout that reduces small edges in
the model, thus allowing for fewer mesh elements to be used.
Recover Arc Information Converts circular polygons into circles for polygons and paths/
traces that contain arc-like segments in them. Specify the points
tolerance and minimum number of segments to use when
identifying the arc.
Recover Hatch Information Converts hatched traces that produce a hatched plane pattern into
polygons with a hatched area fill.
To recover an area, specify values for the following parameters:
• Minimum number of traces
• Percentage of area covered by traces
• Minimum number of holes
Cluster Vias Performs an operation on the Layout that combines very small,
clustered shapes into a larger shape, thus allowing for fewer mesh
elements to be used.
Group Traces Combines very small, parallel traces (shapes) into a larger trace
(shape), which reduces the number of mesh elements for the
model.
Reduce Model Reduce solving runtime by automatically deleting floating nets,
(For a model with ports.) cropping geometries, and so on.

Simulation Actions
Edit notes, extract nets, choose an analysis theme, launch a solve or view a simulation summary
from the Simulation menu.

Simulation

286 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Simulation Actions

Menu Item Description

File Operations (File >)
Edit Notes Opens a text editor so you can add a note to the project. See
“Adding a Note to a Project” on page 36.
Explore Simulation Opens the simulation directory in a browser.
Directory
View Simulation Log File Opens the log file inside a text editor outside of the tool.
Copy File(s) to Simulation Opens a browser where you can select files to copy to the
Directory simulation directory.
Solve Operations (Solve >)
Solve Runs the solve in an external process (console mode) instead
of in the GUI. Allows use of the GUI while the solve runs to
edit other simulations or the project model.
Note: Do not make changes to the running simulation.
Distributed Solve Solves a simulation with job distribution, by using the
Distributed Solve dialog box. You can use this dialog box for
solving with local mode or a supported third-party job
distribution technology that has already been set up. See “Job
Distribution” on page 375.
Solve in GUI Runs the solve in the foreground. You cannot continue to
work in the GUI while the solve runs. The solve takes longer
with this option.
Solve in Partitioned Mode Solves specified areas of the model using Full-Wave Solver
and solves remaining areas using Hybrid Solver.
Solve from Job Distribution Solves a simulation using job distribution, by using the
UI HyperLynx Job Distribution dialog box. You can use this
dialog box to set up and solve with all supported job
distribution technologies. See “Job Distribution” on
page 375.
Operations
View Layout Model Displays a model layout. If you open a previously-solved
project, the software displays the results by default. This
menu item provides quick access to the model layout.
Choose Analysis Theme Opens a dialog box where you can choose a structure type
and analysis type. The software sets mesh and solve options
based on the combination you choose.
This option is available for Full-Wave Solver and Full-Wave
Solver HPC only.

HyperLynx® Advanced Solvers User Guide, VX.2.10 287

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Simulation Actions

Menu Item Description

Edit Simulation Options Opens the Simulation Options dialog box to modify the
speed and accuracy options for the simulation. See “Solving
a Design” on page 137.
Extract Selected Nets From Copies the nets that are selected at the project level layout to
Project the simulation level layout, replacing the existing simulation
level layout.
Add Selected Nets From Copies the nets that you selected from the project layout to
Project the Simulation Layout.
Extract All Nets From Copies all nets at the project level layout to the simulation
Project level layout, replacing the existing simulation level layout.
Copy Simulation Copies the model, ports, circuits, excitations, mesh options,
mesh, and solver options to a new simulation.
Copy Simulation to a New Opens the Save Project As dialog box where you can specify
Project a unique project name. The software creates a new project,
copies the simulation into the new project along with the
associated technology and layout information, and opens the
project in Project Browser.
Copy Mesh Options to Copies all mesh options from the current simulation to all
Other Simulations other open simulations within the same project.
Copy Solve Options to Copies all solve options from the current simulation to all
Other Simulations other open simulations within the same project.
Rename Simulation Change the name of the simulation.
Delete Simulation Deletes the simulation from the project. Perform a “Clean
Project Directory” (at the project level) to delete the
simulation from the disk.
Show Simulation Summary Displays the details of a simulation run, including time
requirements, frequencies, and memory used for each
frequency point.

288 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Model Actions

Model Actions
View or copy model information.

Model
Menu Item Description
View Layout Model Displays the Model window for the selected Model. See “Model
Window” on page 296.
Copy Model From Project Copies the Model (Technology and Layout) at the Project level
layout to the Simulation level, replacing the existing Simulation
level Model.
Copy Technology From Copies the Technology at the Project level to the Simulation
Project level, replacing the existing Simulation level Technology and
applying the Technology to the existing Layout.
Copy Layout From Project Copies the Layout at the Project level to the Simulation level,
replacing the existing Simulation level Layout and applying the
Layout to the existing Technology.
Copy Model To Project Copies the Model (Technology and Layout) at the Simulation
level layout to the Project level, replacing the existing Project
level Model.
Copy Technology To Project Copies the Technology at the Simulation level to the Project
level, replacing the existing Project level Technology and
applying the Technology to the existing Layout.
Copy Layout To Project Copies the Layout at the Simulation level to the Project level,
replacing the existing Project level Layout and applying the
Layout to the existing Technology.

Circuits Actions
View, create, and edit circuit models by assigning circuit ports.

Circuits
Menu Item Description
Edit Circuit Netlists (Default Action) Opens the Circuit Netlist dialog box to edit the
circuit port information (circuit models and components). You
can edit components in this dialog box. See “Adding a Circuit
Model” on page 111 and “Adding a Component” on page 327.
View Circuit Ports Shows the Model window for the selected circuits item and the
circuit ports.

HyperLynx® Advanced Solvers User Guide, VX.2.10 289

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Ports Actions

Menu Item Description

View All Circuit Netlists Opens all the text files for the circuit models.
Show Help Opens Help.

Ports Actions
Add, edit, and view probe ports, and edit and group pins.

Ports
Menu Item Description
Edit Ports Opens the Port Definition dialog box to create and edit the Port
Information. See “Adding Ports to a Model” on page 90.
View Port Model Shows the Model window for the selected Circuits item and the
Ports.
Import Port File Opens the Port File browser where you can load an existing port
file.
Export Port File Opens the Save Port File browser so you can save the current
port settings for later use.
Edit Pin Groups Opens the Pin Grouping dialog box to create and edit the Pin
Groups. See “Grouping Pins” on page 319.
Group Selected Pins Groups the currently selected pins, asking for a name for the Pin
Group in the process.
Add Pins to Model Opens the Pin Adding dialog box to allow pins to be created on
Terminations Bond Wires, Solder Balls, Solder Bumps, and Leads at the
Support or Termination side. See “Pins” on page 317.
Remove Disconnected Ports Removes all ports that do not have a complete return path.
(Fast 3D Solver)

Excitation Actions
Create, edit and view stimulus for your simulation.

Excitation
Menu Item Description
Edit Excitations Opens the Excitation dialog box to create and edit port and
external excitations. See “Adding an Excitation” on page 123.

290 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Mesher Actions

Menu Item Description

View Excitation Model Shows the model layout for the selected excitation.

Mesher Actions
Change mesh options and create meshes before solving.

Mesher

After a mesh completes, a symbol may appear next to Mesher in Project Browser. If one of
these symbols appears in Project Browser, right-click Mesher and choose Show Mesh
Diagnostics for details.
Symbol Description
** Indicates that the Expert Options are modified from the Default.
+ Indicates that the mesh was created using different options than given, due to
meshing errors. A mesh number appears depending on the mesh performed:
<no mesh number> indicates a single mesh
“1” indicates a DC/volume mesh
“2” indicates a surface mesh.

Menu Item Description

Edit Simulation Options (Default Action, without a mesh) Opens the Simulation Options
dialog box to edit the mesh refinement options for the simulation.
Options include mesh frequency, cells per wavelength, and
various advanced options. See “Solving a Design” on page 137.
Edit Mesh Options Only Opens the Mesh Options dialog box to edit the mesh refinement
options for the simulation. Options include mesh frequency, cells
per wavelength, and various advanced options. See “Preparing to
Mesh a Design” on page 129.
Check Model Validity for Runs checks on the Model and Mesh Options to look for any
Meshing problems. Checks for valid mesh options, technology, ports, pin
placement, flattening on adjacent conductor layers and on via
layers, nets (overlap, splits, and so on), and port size.
Create Mesh Creates a mesh of the Simulation model with the given mesh
options.

HyperLynx® Advanced Solvers User Guide, VX.2.10 291

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Mesher Actions

Menu Item Description

Show Mesh Information Displays the mesh number and type, and the count details of the
Mesh, including the number of elements, nodes, ports, and does a
mesh quality check.
Mesh type is either Surface (for AC) or Volume (for DC). A
surface mesh uses flat surface elements such as triangle and
quadrilateral shapes, while a volume mesh uses prisms.
Show Mesh Diagnostics Displays details about the Mesh diagnostics, including a quality
report, quality histogram, and edge length histogram.
Get Detailed Mesh Performs a detailed check of the model and mesh options for any
Diagnostics problems. Also checks an existing mesh for problems with mesh
elements that can cause solver inaccuracies.
Create Mesh Visuals Creates one mesh display for each layer in the mesh.
Create Diagnostic Mesh Creates one mesh display for each net, plus many mesh displays
Visuals per Layer, mostly for internal debugging and use, with different
levels of details, e.g.: depth, element normal vectors, front/back
materials, and so on.
View Mesh (Default Action, when mesh exists) Displays the Model window
for the selected Mesher item and the Mesh.
View Mesh Only Displays the selected Mesher item and the Mesh in the Model
window, turning off the Layout visibility for the model.
Save Mesh Statistics to File Enables the writing of important mesh statistics to a file on the
disk.
Report Modified Mesh Reports all nets and layers with a mesh density set to non-default
Density value. (Default is 1.0.)
Reset Mesh Density Resets the mesh density to 1.0 (default) for all nets and layers.
Display Mesh Element Enables you to zoom to a specific mesh element in the Model
window.
Display Mesh Net Elements Enables you to display the mesh for a specific net in the Model
window.
Show Mesh Matched Finds the matched boundary mesh in the model.
Boundary This option is only available if mesh visuals are present. To create
mesh visuals, in Project Browser, click Mesher and choose either
the Create Mesh Visuals or Create Diagnostic Mesh Visuals menu
item.

292 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Solver Actions

Menu Item Description

Search Mesh Visuals Opens the Search String dialog box where you can locate a
specific mesh element or patch to help you debug meshing errors.
This option is only available if mesh visuals are present. To create
mesh visuals, in Project Browser, click Mesher and choose either
the Create Mesh Visuals or Create Diagnostic Mesh Visuals menu
item.
Delete Mesh Data Deletes the existing mesh and the mesh visuals.

Solver Actions
Edit simulation and solver options, estimate memory consumption and run a solve.

Solver
Menu Item Description
Edit Simulation Options (Default Action) Opens the Simulation Options dialog box to
edit the solver options for the simulation. Options include
Outputs, Frequency, Engine, and various advanced options. See
“Solving a Design” on page 137.
Edit Solver Options Only Opens the Solver Options dialog box to edit the solver options
for the simulation. Options include Outputs, Frequency, Engine,
and various advanced options.
Perform Validity Check for Runs checks on the model and solver options to look for any
Solving problems. Verifies that the model is not empty, mesh frequency
< highest solve frequency, enough memory is available to run
simulation, and if re-meshing is required. Also checks for
missing ports in port analysis mode, PEC materials for resistance
solves and the EMI/EMC solution for DC solver.
Solve (Simulate) Runs the simulation with the given Solver options. See “Solving
a Design” on page 137.
Solve using Console Runs the Project in Console Mode (in the background), solving
only the given Simulation. Progress is reported in the Status
Messages window, where you can abort the simulation as
needed. Results are loaded automatically. Use this option to
continue work in the GUI while a simulation runs in the
background.
Solve using Job Distribution Opens the job distribution GUI to run the simulation on
(JD) networked machines, solving only the current simulation. See
“Job Distribution” on page 375.

HyperLynx® Advanced Solvers User Guide, VX.2.10 293

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Results Actions

Menu Item Description

Estimate Memory Shows the projected memory requirement estimate for the
current simulation with the given settings.
Show Simulation Summary Displays the details of the simulation run, including time
requirements, frequencies, and memory used for each frequency
point.
Clean Buffer Data Deletes the existing solver buffer file (backup data) from the
disk.
Delete Solver Data Deletes the existing solver object and data.
Show Help Opens Help.

Results Actions
View, export and import results. Create additional data and plots from solve data.

Results
Menu Item Description
View Results Plot Displays the results data as a plot for the selected simulation.
(Default action when results are available for the current
simulation.
View Results Table Displays the results data in a table for the selected simulation.
See “Viewing and Processing Results” on page 237.
Export Results Opens the Export Results dialog box to export the simulation
data to a file on the disk.
Import Results (Default action when no results are found for the current
simulation.)
Edit Plot Options Specify the titles, font, style and scale for plots.
Add Results Opens the Create New Results dialog box where you can create
plots from available solve results or post-process solve results to
create the data you need. See “Viewing and Processing Results”
on page 237.
Current Plot Displays current distribution flowing on conductor surfaces at
frequencies you specify. See “Creating Current Plots” on
page 246.
EMI Plot Plots EMI (near field) results. See “Viewing and Processing
Results” on page 237.

294 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Results Actions

Menu Item Description

Export Huygens Box Convert port or EMI analysis results into a Huygens box format,
so you can import radiation emission results for your design into
Siemens Simcenter 3D High Frequency EM software. See
“Exporting a Huygens Box” on page 261.
Post-Process menu
Check/Enforce Passivity Runs a passivity check/enforcement to ensure the model does not
create energy.
Equivalent Circuit Creates a circuit netlist for transient analysis from the available
data. See “Exporting a SPICE Netlist From S-Parameters” on
page 259.
Mixed-Mode Port Data Creates mixed-mode S-parameters from single-ended results.
See “Generating Mixed-Mode S-Parameters” on page 252.
Open Results in Touchstone Opens the selected results in the Touchstone Viewer.
Viewer
Port Termination Data Creates port-terminated S-parameters. See “Generating Port
Termination Data” on page 267.
Touchstone 2.0 Port Data Creates S-, Y- and Z-Parameters that you can open in the
Touchstone Viewer. See “Generating Touchstone 2.0 Data” on
page 269.
Delete Results Data Deletes all loaded results data.
Show Help Opens Help.

HyperLynx® Advanced Solvers User Guide, VX.2.10 295

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Model Window

Model Window
The Model window displays the Layout, Mesh, and 3D Results.
Access menu options using the toolbar or by right-clicking in the Model window.

Figure 8-1. Model Window Displaying a Sample Geometry

Topic Description
Edit Actions Use Edit actions to save your model.
Tools Actions Use Tool actions to manipulate your model.
Draw Actions Use Draw actions to add shapes to your model.
Select Actions Use Select actions to select items in your model.

296 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Edit Actions

Edit Actions
Use Edit actions to save your model.

Icon Action (Shortcut) Description

Undo (Ctrl+Z) Undoes the previous edit.

Redo (Ctrl+Y) Redoes the previously undone edit.

Create Backup Creates a backup of the current Model.

(Ctrl+Shift+B)
Clear Model History Clears the undo and redo history for the Model.
(Ctrl+Shift+Z)
Backup Before Fast Edit Checked, click Fast Edit to trigger a Model
backup.

Tools Actions
Use Tool actions to manipulate your model.

Icon Action (Shortcut) Description

Rotate (R) Right mouse button always rotates. Hold X, Y, or Z
on the keyboard to rotate around that axis only. X =
X Axis; Y = Y Axis; Z = Z Axis.
Pan (A) Mouse wheel button always pans. Click and drag to
pan. Hold X, Y, or Z on the keyboard to pan on that
axis only.
Zoom Box (B) Rolling the mouse wheel always dynamic zooms.
Double-click the middle mouse button to zoom to the
mouse cursor (hold Ctrl or Shift to zoom out). Hold
D for dynamic zooming. Hold X, Y, or Z on the
keyboard to zoom that axis only.
Select (S) Double-clicking always selects. Click and drag to
window select multiple objects.
Crop (C) Choose a shape from the shape drawing menu to
begin the crop. Use Esc to cancel.
Crop Rectangle Crop with a rectangle shape. Sets the tool to crop and
(Ctrl+Shift+R) the shape to rectangle. Use Esc to cancel.
Crop Polygon (Ctrl+Shift+P) Crop with a polygon shape. Sets the tool to crop and
the shape to polygon. Use Esc to cancel.

HyperLynx® Advanced Solvers User Guide, VX.2.10 297

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Draw Actions

Icon Action (Shortcut) Description

Draw (D) Choose a shape from the shape drawing menu to
begin drawing. Use Esc to cancel.
Fast Edit (E) Click an object (bond wires, solder balls/bumps, and
vias) and drag in the Model window to edit the
object. Does not do a backup between edits, but
creates a backup when first clicked and after clicking
another action. Use Create Backup in the edit menu
to save intermediate edits.
Query Model (Q) Use to hover over objects and show information.
Choose objects to select (Nets, Layers, Objects
[Shapes, Bond Wires, Vias, and so on], Pins, or
Ports) from the Select menu.
Measure Tool (M) Click and hold to start the measurement; drag and
release to finish; Esc to cancel. Hold Shift to snap the
coordinates along the X, Y, or at a 45 degree angle.
Use Ctrl+M to delete all measurements.

Draw Actions
Use Draw actions to add shapes to your model.

Icon Action Description

Add Input Shape (Shift+I) Opens the Add New Shape dialog box to add a
shape to a layer. See “Creating or Editing a Model
Layout” on page 311 for details.
Rectangle Drawing Tool Click and hold to start the rectangle; drag and
(Shift+R) release to finish the rectangle. Use Esc to cancel.
See “Creating or Editing a Model Layout” on
page 311 for details.
Polygon Drawing Tool Click to start the polygon; click again to add points.
(Shift+P) Finish the polygon by double-clicking or pressing
Enter/Return. Hold Shift to snap the coordinates
along the X, Y, or at a 45 degree angle. Use
backspace to remove a point and Esc to cancel. See
“Creating or Editing a Model Layout” on page 311
for details.

298 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Draw Actions

Icon Action Description

Path Drawing Tool Click to start the path/wire shape; click again to add
(Shift+A) points. Finish the path/wire shape by double-
clicking or pressing Enter/Return. Hold Shift to
snap the coordinates along the X, Y, or at a 45
degree angle. Use Backspace to remove a point and
Esc to cancel. See “Creating or Editing a Model
Layout” on page 311 for details.
Circle Drawing Tool (Shift + Click and hold to start the circle; drag and release
C) to finish the circle. Use Esc to cancel. See
“Creating or Editing a Model Layout” on page 311
for details.
Add Input Structure (Alt+I) Opens the Add New Structure dialog box to add a
structure (bond wire, solder ball, via, and so on).
See “Vias” on page 363 for details.
Via Drawing Tool (Shift+V) Double-click to place a via (brings up the Via
Adding dialog box). For precision, click once to get
the coordinates and press Enter/Return to place the
via at the chosen coordinates. See “Vias” on
page 363 for details.
Bond Wire Drawing Tool Click to start the bond wire segment; drag and click
(Shift + W) again to specify the end point.
Lead Drawing Tool (Shift + Click to start the lead segment; drag and click again
L) to specify the end point.
Text Drawing Tool Double-click a location in a model layout to open a
dialog box where you can specify text content and
location.
Add Bond Wire (Alt+B) Opens the Input Structure dialog box to add a bond
wire. See “Technology” on page 350 for details.
Add Solder Ball (Alt+S) Opens the Input Structure dialog box to add a
solder ball. See “Technology” on page 350 for
details.
Add Solder Bump (Alt+U) Opens the Input Structure dialog box to add a
solder bump. See “Technology” on page 350 for
details.
Add Via (Alt+V) Opens the Input Structure Dialog to add a via. See
“Vias” on page 363 for details.
Pin Drawing Tool (Shift+N) Toggles between Drawing Pins (Checked) and
Drawing Regular Shapes (Unchecked). See “Pins”
on page 317 for details.

HyperLynx® Advanced Solvers User Guide, VX.2.10 299

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Select Actions

Icon Action Description

Shape / Hole Switch Toggles between Shape Drawing (Unchecked) and
(Shift+H) Hole Drawing (Checked).
Draw Solve Region (H) Choose a shape from the shape drawing menu to
begin drawing. Use Esc to cancel.
Add Pin Opens the Add New Pin dialog box to add a pin to a
layer. See “Pins” on page 317 for details.
Add Pin Group Opens the Pin Grouping dialog box to add a pin
group from existing pins. See “Grouping Pins” on
page 319 for details.
Add Component (Alt+P) Opens the Component dialog box to add a
component. See “Adding a Component” on
page 327 for details.
Add Capacitor (Alt+C) Opens the Component dialog box to add a
capacitor. See “Adding a Component” on page 327
for details.
Add Inductor (Alt+L) Opens the Component dialog box to add a inductor.
See “Adding a Component” on page 327 for
details.
Add Resistor (Alt+R) Opens the Component dialog box to add a resistor.
See “Adding a Component” on page 327 for
details.
Add Heat Sink (Alt+H) Opens the Heat Sink dialog box to add a heat sink.

Add Enclosure (Alt+E) Opens the Enclosure dialog box to add an

enclosure.

Select Actions
Use Select actions to select items in your model.

Icon Action (Shortcut) Description

Select Nets (N) Sets the left mouse button action to select nets.

Select Layers (L) Sets the left mouse button action to select layers.

Select Objects (O) Sets the left mouse button action to select objects
(shapes, bond wires, solder balls, and so on).
Select Pins (P) Sets the left mouse button action to select pins.

300 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Object Browser

Icon Action (Shortcut) Description

Select Ports (T) Sets the left mouse button action to select ports.

Find/Select Objects Opens the Find Objects Dialog to search for objects.
(Ctrl+Shift+F) Select an object type and click Add. Click Clear to
empty the Found Objects column. Filter shapes, pins,
bond wires, solder balls, leads, and so on by name,
net, layer, and so on.
Use this dialog to locate similar vias, shapes and
components. Also filter vias by padstack (using
<Other Filter> field), and components by part number
(using <Other Filter> field). See “Finding an Object”
on page 36 for details.
Open Find Objects Dialog Checked, the Find Objects dialog box opens after a
on Window Select window select.
Show Tool Tip On Hover Checked, information for the object under the cursor
displays after a short time.

Object Browser
Object Browser provides access to model information and analysis results.
Note
See tooltips for information about Object Browser fields, items, and context menu items.

This topic provides information to supplement tooltips.

The software supports two Object Browser formats:

Format Description
Multiple stackup (multistack) Used for designs with
multiple stackups.

HyperLynx® Advanced Solvers User Guide, VX.2.10 301

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Object Browser

Format Description
Single stackup (legacy) Used for designs with single
stackups.
Note: Topics in this
book refer only to the
contents and structure for the
multiple stackup Object
Browser. If needed, refer to a
VX2.8 or older book for
information about the single
stackup Object browser.

Model Information
To access: From Project Browser, from the Project or Simulation > Model branch, double-
click Layout.

302 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Object Browser

The following figure highlights some key capabilities:

For example, if you want Object Browser to show ports for a net named “S-”, do the following:

1. Ensure that Object Browser displays the Type and Nets columns.
2. In the Type column, type port.

HyperLynx® Advanced Solvers User Guide, VX.2.10 303

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Results Plot

3. In the Net column, type s-. For this example, Object Browser shows two ports and hides
all other model information.

You can also use a dialog box to find and show objects. See “Finding an Object” on page 36.

Analysis Results
To access: From Project Browser, from the Project or Simulation > Models branch, double-
click Results (a green check mark must be next to Results).

The following figure highlights a key capability:

Note
When displaying analysis results, Object Browser does not provide filtering and sorting
capabilities.

Results Plot
Object Browser provides access to result plots.
Note
See tooltips for information about Object Browser fields, items, and context menu items.

This topic provides information to supplement tooltips.

304 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 GUI Overview
Results Plot

Simulation Results Plot

Action Description
Delete Selected Results Removes the selected results from the Simulation. Result
files remain in the Simulation directory until you delete
them.
Save Ports Description to File Saves port mappings and the names of the original ports.
This option is only available for mixed-mode results
created using differential ports.

HyperLynx® Advanced Solvers User Guide, VX.2.10 305

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
GUI Overview
Results Plot

306 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 9
Support Information

Solving involves technical concepts that sometimes require additional explanation. Refer to this
information as needed.

Topic Description
3D Graphics Certain systems may need help with graphics settings.
The software provides a script that finds the optimal
settings for you.
Creating or Editing a Model Layout The model layout for your design consists of shapes,
complex structures (such as vias or bond wires), pins,
and so on.
CAPLIB File Format The CAPLIB decoupling capacitor library file format
describes a custom set of capacitors that the software
considers when running PDN decoupling optimization.
Components A component is a capacitor, inductor, resistor, BGS,
die, or relay that you can add to your model.
Console Operation You can run solving, meshing, distributed computing,
and other tasks from a console and with the
hlasConsole executable file.
Creating a Default Port Configuration If you have a Touchstone file to use in the PDN
File Capacitor Optimizer, but no port definition file, you can
create one.
Editing a Padstack Database After creating a project-level model, edit the Padstack
Database on an existing layout model before meshing.
Example Engine Options Usage Interactions among solver engine options, computer
hardware, and operating systems can sometimes be best
summarized by example. Understanding solver engine
options can help you obtain optimal solve run times for
your computer configuration.
Exporting a Model Save your model as it appears in the Model window for
later use.
Guidance for Solving RL and GC When setting Advanced Output Solve options in the
Together Fast 3D Solver, trade-offs exist that affect solve time,
memory usage and the accuracy of solve results.

HyperLynx® Advanced Solvers User Guide, VX.2.10 307

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information

Topic Description
Launching the Scripting Environment Use the scripting environment to run a script to query
From the GUI and modify the design without leaving the GUI
environment. When you save the modified project from
the python environment, the software loads the updated
project automatically.
Opening HyperLynx Advanced Open HyperLynx Advanced Solvers to observe signal
Solvers Tools on Linux integrity or power integrity for your design.
Padstack Via Types The Padstack Editor provides a way to define the type
of via in your design.
PDN Decoupling Optimizer Over-engineering a PDN by adding too many
decoupling capacitors can add to the cost of a design.
The PDN Decoupling Optimizer identifies decoupling
capacitors that you can safely remove from your design
to reduce overall cost.
Planes A plane is a rectangular section in space broken into
smaller discrete rectangles.
Product Licenses You can use the License Information dialog box to
display the license(s) that you have checked out, and
the location of your license file or floating license
server.
Sample of Exported IBIS Model File This example provides the file contents you can expect
to see when you export an IBIS model from HyperLynx
Fast 3D.
Solder Mask Layer Modeling - You can model a solder mask layer by specifying a
Conformal Coat conformal layer type in the Technology dialog box.
Technology Technology consists of a Stackup (Layers), Materials,
Bond Wires, Solder Balls, and other design properties.
Use Pin Area If you enable Use Pin Area, the spreading inductance is
smaller since the current does not have to concentrate
into one point. Instead, the current flows to the
perimeter of the pin. However, using this option
increases the size of the port to the furthest points
between two pins, which can reduce the bandwidth of
the port.
Using the Solve Queue When more than one solve is running, you can add or
remove other simulations to or from the solve queue.
Vias A via is a structure that has a start and end layer and
consists of pads (positive shapes), anti-pads (hole
shapes), thermal relief pads, and other shapes on layers,
with or without a drill shape.

308 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
3D Graphics

3D Graphics
Certain systems may need help with graphics settings. The software provides a script that finds
the optimal settings for you.

Topic Description
Setting Up 3D Graphics Run a graphics test to find and save the correct
graphics setting for your environment.
Verifying Current 3D Graphic Settings Use this procedure to test your current graphic
settings without altering them.

Setting Up 3D Graphics
Run a graphics test to find and save the correct graphics setting for your environment.
Note
To test your current settings, see “Verifying Current 3D Graphic Settings” on page 310.

Prerequisites
• You have run the Graphics > Reset Graphics Settings menu item and restarted the
tool, but you continue to have a problem with the 3D graphics.
Procedure
1. From the toolbar, choose the Graphics > Automatically Determine Graphics Settings
menu item.
2. The test displays a set of spinning cubes.

Note
If an error message appears any time during the text, click OK to resume the test.

If you... Do the following...

Can see a set of spinning cubes with red, 1. Click Yes when prompted.
blue, green, and yellow sides 2. Click OK.
Cannot see a set of spinning cubes, or you Click No.
can see cubes, but they are not spinning or The test repeats until the correct
have sides with no color settings are found.
Note: If an OpenGL Error dialog
box appears, click OK to resume
the test.

HyperLynx® Advanced Solvers User Guide, VX.2.10 309

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Verifying Current 3D Graphic Settings

3. When the test is complete, a dialog box appears. Click OK.

4. Restart the software to activate the new settings.
Results
The test saves the values required to properly display in the 3D window. You only need to run
this test one time to set the correct values.

Verifying Current 3D Graphic Settings

Use this procedure to test your current graphic settings without altering them.
Procedure
1. From the toolbar, choose the Graphics > Run Graphics Test menu item.
2. If you can see a set of spinning cubes with transparent (but not clear), click Yes when
prompted. If the spinning cubes do not appear, see “Setting Up 3D Graphics” on
page 309 to find and save the correct settings for your environment.

310 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Creating or Editing a Model Layout

Creating or Editing a Model Layout

The model layout for your design consists of shapes, complex structures (such as vias or bond
wires), pins, and so on.

Topic Description
Manually Creating a Model Layout In many cases, you import a post-layout design and the
software creates a model layout for you. You can also
manually create a model layout.
Adding Shapes You can add rectangles, circles, and other shapes to a
model layout. For some shapes, you can start by
drawing a shape outline (in the X,Y plane) in a model
layout. For any shape, you can start by opening a dialog
box.
Adding Shapes From a Script The software supports adding shapes by using a python
script.
Adding a Complex Structure Add a via, bond wire, solder ball, solder bump, or lead
frame to your model layout.
Pins Pins are connections or terminals defined on the
geometry that are used to define ports.
Adding Internal Pads for Vias By default, internal pads for Vias are suppressed for
many design files (this is common practice). If internal
pads are necessary (for example, if Nets are split after a
“Create Valid Nets” operation), you can turn on the
internal pads in the Model.
Editing Shapes You can edit shapes located on various layers for a
model layout.
Moving, Resizing, Rotating, or Move, expand, rotate, scale, or mirror a selected model
Mirroring Objects layout object or an entire model layout.
Duplicating Objects Duplicate (or copy) objects on an existing layout to
perform “what-if” simulations.
Maximum Deviation The maximum deviation is the maximum difference in
the dimensions that an “approximate shape” can be
from the “true shape”. The software uses the maximum
deviation and the number of segments to define the
shape used during simulation.

HyperLynx® Advanced Solvers User Guide, VX.2.10 311

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Manually Creating a Model Layout

Manually Creating a Model Layout

In many cases, you import a post-layout design and the software creates a model layout for you.
You can also manually create a model layout.
Prerequisites
• You have created a technology with one or more stackup layers. See “Technology” on
page 350.
Procedure
1. In Project Browser, right-click Layout and choose the Draw > Create New 3D Layout
menu item.
The Layout Options dialog box opens.
2. On the Layout tab:
a. Choose the units for the project.
b. Specify extents to define the size of the layout.
Make the values a good approximation of the size of the layout to provide the best
size for viewing. For example, if you want to create a 1.0 cm microstrip line in the x
direction, make the left and right extent values such that shapes are visible (left
extent * -0.5, right extent * 0.5, with units * cm).
c. Set the Grid Options by enabling/disabling snap to grid and specifying a grid snap
distance.
3. On the Refinement tab:
a. Set the number of segments to use when rendering circles as polygons and the
Maximum Deviation.
b. Small Edge Removal Options section, used to apply some corrections to polygons
and their edges.
4. On the Port tab:
a. Pin Group options section, used at solving time.
5. On the Other tab:
a. Healing Options section for setting the healing distance used in finalization.
b. Anti-pad Options sections used in finalization.
6. Click Apply to generate the layout from the Technology and specified parameters.
7. Examine the contents of the Object Browser (double-click the Layout item) to verify the
new layout. The layers in the Technology display here, as well as any Bond Wire, Solder
Ball, or Solder Bump Layers added.

312 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Adding Shapes

To open the Layout Options dialog box for an existing layout or geometry, in Project
Browser, right-click Layout and choose the Edit > Edit Layout Options menu item.
Results
You can now add shapes and complex structures (such as a via or bond wire) to your model
layout. See “Adding Shapes” on page 313 and “Adding a Complex Structure” on page 315.

Adding Shapes
You can add rectangles, circles, and other shapes to a model layout. For some shapes, you can
start by drawing a shape outline (in the X,Y plane) in a model layout. For any shape, you can
start by opening a dialog box.
Note
A shape can represent the absence of a material, such as an anti-pad or void within a metal
area.

Prerequisites
• You have created a technology with one or more stackup layers. See “Technology” on
page 350.
• You have defined a layout. See “Manually Creating a Model Layout” on page 312.
Procedure
1. (Available for some shapes) Draw with your mouse a shape outline (in the X,Y plane) in
a model layout:

If you want to add Do this...

a...
Rectangle 1. From the model window, choose one of the following
Circle menu items:
• Draw > Rectangle Drawing Tool
• Draw > Circle Drawing Tool
2. In the model window, click (and drag) the mouse to
draw the shape in the X,Y plane, then release the
mouse button to complete the shape.

HyperLynx® Advanced Solvers User Guide, VX.2.10 313

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Adding Shapes

If you want to add Do this...

a...
Polygon 1. From the model window, choose one of the following
Path menu items:
• Draw > Polygon Drawing Tool
• Draw > Path Drawing Tool
2. In the model window, click (and release), then move
the mouse to draw a line segment in the X,Y plane.
3. Click to end a line segment and start another. Repeat
as needed to draw the shape.
4. Double-click to complete the shape.
The Add New Shape dialog box opens. Go to step 3.
2. (Available for any shape) Specify a shape with a dialog box:
• From the model window, choose the Draw > Add Input Shape menu item.
The Add New Shape dialog box opens.
3. Specify layer, shape, net, substance, and type values.
4. Specify shape and remaining parameters. Tooltips provide option and syntax
information. Also see the guidelines below:

Note
If you edit shape outline or center parameters, the model layout immediately
displays an updated shape. You may have to move the dialog box away from the
model window to see your changes.

• “Angle” is with respect to the X-axis. For example, if you change the angle value
from zero degrees to ten degrees, the shape rotates ten degrees counterclockwise
from the X-axis.
• (If available) “Override Arc Discretization” defines the granularity of line segments
that form an arc shape. For information, refer to tooltips and “Maximum Deviation”
on page 323.
• (If available) In the “Expand / Contract” area, typing a negative number (such as
-0.000001) in the Distance field changes the Expand button to a Contract button.
• “Create Array” duplicates a shape to create an array of shapes.
5. Click Add, then Close.
6. (Optional) Verify the added shape by doing any of the following in Object Browser:
• The correct Nets branch displays the added shape.

314 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Adding Shapes From a Script

• Double-click the added shape to verify that the model layout highlights it at the
correct location.
Results
After the model contains the needed shapes, you can add pins. If needed, you can also add
complex structures, such as vias and bond wires. See “Pins” on page 317 and “Adding a
Complex Structure” on page 315.
Related Topics
Editing Shapes
Moving, Resizing, Rotating, or Mirroring Objects
Duplicating Objects
Adding Shapes From a Script

Adding Shapes From a Script

The software supports adding shapes by using a python script.
See “Model Functionalities” in HyperLynx Advanced Solvers Scripting Help Documentation.

Adding a Complex Structure

Add a via, bond wire, solder ball, solder bump, or lead frame to your model layout.
Restrictions and Limitations
• If you plan to add a via, you have added the padstack information to the model. See
“Editing a Padstack Database” on page 331.
Procedure
1. In the Model window, click Draw and choose the Add Input Structure menu item.
The Add New Structure dialog box opens.
2. Choose a structure type.
3. Choose a net that connects the structure to the model. If needed, create a new net.
4. Specify the parameters for the structure.
Refer to tooltips for information.
To set center coordinates, click in the Model window. To set start/end points, click and
drag in the Model window.

HyperLynx® Advanced Solvers User Guide, VX.2.10 315

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Adding a Complex Structure

Note
When you set backdrill parameters for a via structure, the stop layer you specify is
not included in the backdrill.

5. To create an array, check the box and add the array parameters:

Parameter Description
X/Y Pitch The center-to-center distance between objects in the X or Y
direction.
X/Y Count The number of objects in the X or Y direction.

6. Click Apply, then Close.

Results
Example via array:

316 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Pins

Pins
Pins are connections or terminals defined on the geometry that are used to define ports.

Topic Description
Adding Pins You can add a pin to a model layout. A pin shape can be a
rectangle, polygon, and so on. For some pin shapes, you can
start by drawing a shape outline in the X,Y plane in a model
layout. For all pin shapes, you can start by opening a dialog
box.
Grouping Pins Group pins to enable creating ports with multiple sinks or
sources.

Adding Pins
You can add a pin to a model layout. A pin shape can be a rectangle, polygon, and so on. For
some pin shapes, you can start by drawing a shape outline in the X,Y plane in a model layout.
For all pin shapes, you can start by opening a dialog box.
Prerequisites
• You have created a technology with one or more stackup layers. See “Technology” on
page 350.
• You have defined the geometry for a model layout. See “Manually Creating a Model
Layout” on page 312.
Procedure
1. (Available for some shapes) Draw a pin shape outline in the model layout with your
mouse:

If you want to add a... Do this...

Rectangle 1. From the model window, choose one of
Circle the following menu items:
• Draw > Rectangle Drawing Tool
• Draw > Circle Drawing Tool
2. From the model window, choose the
Draw > Pin Drawing Tool menu item.
3. In the model window, click (and drag)
the mouse to draw the shape in the X,Y
plane, then release the mouse button to
complete the shape.

HyperLynx® Advanced Solvers User Guide, VX.2.10 317

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Pins

If you want to add a... Do this...

Polygon 1. From the model window, choose one of
Path the following menu items:
• Draw > Polygon Drawing Tool
• Draw > Path Drawing Tool
2. From the model window, choose the
Draw > Pin Drawing Tool menu item.
3. In the model window, click (and
release) and move the mouse to draw a
line segment in the X,Y plane.
4. Click to end a line segment and start
another. Repeat as needed to draw the
shape.
5. Double-click to complete the shape.
The Add New Pin dialog box opens. Go to step 3.
2. (Available for all shapes) Specify a pin with a dialog box:
• From the model window, choose the Draw > Add Pin menu item.
The Add New Pin dialog box opens.
3. Specify layer, shape and net values. Ensure that the value for Substance is Pin.
An Edge shape usually produces a pin that covers one side of a component.
A Point shape produces a pin with only X,Y coordinates. The model layout displays this
kind of pin as a dot with a fixed size that does not change when zooming the view.
4. Specify pin and remaining parameters. Tooltips provide option and syntax information.
Also see the guidelines below:

Note
If you edit shape outline or center parameters, the model layout immediately
displays the updated shape. You may have to move the dialog box to see model
layout changes.

• “Angle” is with respect to the X-axis. For example, a 10 degree angle rotates a shape
10 degrees counterclockwise from the X-axis.
• (If available) “Override Arc Discretization” defines the granularity of line segments
that form an arc shape. For information, refer to tooltips and “Maximum Deviation”
on page 323.
• (If available) In the “Expand / Contract” area, typing a negative number (such as
-0.000001) in the Distance field changes the Expand button to a Contract button.
• “Create Array” duplicates a shape to create an array of shapes.

318 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Pins

5. Click Add, then Close.

6. If you selected “Create New Component...” for the Component option, a dialog box
opens. Specify a unique name for the new component and click OK.
7. (Optional) Verify the added pin by doing any of the following in Object Browser:
• The correct Nets branch displays the added pin.
• Double-click the added pin to verify that the model layout highlights it at the correct
location.
Results
After you add pins, you can include them in pin groups and in ports. See “Grouping Pins” on
page 319 and “Adding Ports to a Model” on page 90.

Grouping Pins
Group pins to enable creating ports with multiple sinks or sources.
Restrictions and Limitations
• Pins in a pin group belong to the same net.
Prerequisites
• The model contains pins. See “Adding Pins” on page 317.

HyperLynx® Advanced Solvers User Guide, VX.2.10 319

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Adding Internal Pads for Vias

Procedure
Do any of the following:

If you want to create a Do the following...

pin group...
Manually 1. Do any of the following:
• In Project Explorer, right-click Ports, then choose
the Edit Pin Groups menu item.
• In Object Browser, right-click Pin Groups, then
choose the Pin Groups > Edit Pin Groups menu
item.
The Pin Grouping dialog box opens.
2. Select pins to include in a group.
Use the filters at the bottom of the Pins area to locate
pins. Point a filter field to display a tooltip that
provides filter syntax.
3. Click Add Pin Group From Selected Pins. A dialog
box opens.
4. Specify a pin group name and click OK.
5. Click Apply, then Close.
Automatically Do any of the following:
Note: The software • In Object Browser, right-click Pin Groups, then
creates pin groups for choose the Pin Groups > Create Pin Groups
all components with three Automatically menu item.
or more pins, and where • In Project Explorer:
more than one pin exists a. Right-click Ports, then choose the Edit Pin
for a given net. Groups menu item.
The Pin Grouping dialog box opens.
b. Click Create Pin Groups Automatically.
c. Click Apply, then Close.

Adding Internal Pads for Vias

By default, internal pads for Vias are suppressed for many design files (this is common
practice). If internal pads are necessary (for example, if Nets are split after a “Create Valid
Nets” operation), you can turn on the internal pads in the Model.
Restrictions and Limitations
The Padstack Database can only be edited prior to meshing a model.

320 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing Shapes

Procedure
1. Open the Padstack Editor (Project Explorer > Layout > Edit > Edit Padstack
Database).
2. On the Database tab, change the value for “Internal Pads (Entire Model)”.

If you want to... Set the value to...

Apply whichever of the four other options is Default
currently default.
Use the pads defined on the start and end layers of No internal pads
the via. All other layers use Drill.
Use the pads defined on the start and end layers of Internal plane pads only
the via, while all other layers use Drill.
On plane layers, use the specified pad, if defined.
The pad is selected in the following order
(depending on what is defined); plane pad, then
unconnected pad, then pad.
Use pads only that connect vias to traces in the Pads intersecting Routing
layout by removing NFPs (non-functional pads).
Use all explicitly defined pad stacks All pads

3. Click OK.

Editing Shapes
You can edit shapes located on various layers for a model layout.
Prerequisites
• You have created a technology with one or more stackup layers. See “Technology” on
page 350.
• You have defined a model layout. See “Manually Creating a Model Layout” on
page 312.

HyperLynx® Advanced Solvers User Guide, VX.2.10 321

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Moving, Resizing, Rotating, or Mirroring Objects

Procedure
1. Do any of the following:

If you want to navigate to a Do this...

shape using the...
Model layout window 1. From the model layout window, choose the
Select > Select Objects menu item, then
select a shape so that it is highlighted.
2. In the model layout window, right-click
over the selected shape, then choose the
Shapes > Edit Selected Shape menu item.
Object Browser From Object Browser, right-click a shape, then
choose the Shapes > Edit Selected Shape
menu item.

The Edit Shape dialog box opens.

2. Modify the shape as needed.
3. Click Apply, then Close.

Moving, Resizing, Rotating, or Mirroring Objects

Move, expand, rotate, scale, or mirror a selected model layout object or an entire model layout.
Prerequisites
• Your model layout contains shapes.
Procedure
1. If you want to manipulate specific shapes (instead of an entire model layout), highlight
shapes to manipulate in either Object Browser or the model layout window.
2. Do either of the following:
• In Object Browser, right-click and choose the Edit > Translate (Move) Objects or
Transform (Expand, Scale, Rotate) Objects menu item.
• In Project Browser, right-click and choose the Layout > Edit > Open Transform
Dialog menu item.
The Transform Model dialog box opens.
3. Select an operation and specify parameters.
To perform an operation on every shape in the model layout, uncheck “Selected Objects
Only”.

322 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Duplicating Objects

4. Click Apply, then Close.

Duplicating Objects
Duplicate (or copy) objects on an existing layout to perform “what-if” simulations.
Prerequisites
• You have a project with a defined layout. See “Adding Shapes” on page 313 for detailed
instructions on how to define a layout and select an object.
Procedure
1. In Object Browser, highlight the shapes you want to copy. You can copy a Shape, Bond
Wire, Solder Balls/Bump, Lead, and Pin.
2. In Object Browser, right-click a selected object and choose the Edit > Duplicate
Selected Objects menu item.
Results
The software copies the selected objects in place and highlights them.

Maximum Deviation
The maximum deviation is the maximum difference in the dimensions that an “approximate
shape” can be from the “true shape”. The software uses the maximum deviation and the number
of segments to define the shape used during simulation.

HyperLynx® Advanced Solvers User Guide, VX.2.10 323

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Maximum Deviation

Figure 9-1. Maximum Deviation

For example, in Figure 9-1, for a circle of radius 1000 um, the true shape is the green circle. The
red hexagon is an approximate shape with the maximum deviation set to 140 and the total
segments per 360 degrees set to 6. Alternatively, the blue circle (a closer approximation of the
original circle) is an approximate shape with the maximum deviation is set to 50 and the number
of segments is set to 10.

324 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
CAPLIB File Format

CAPLIB File Format

Used by: PDN Decoupling Optimizer
The CAPLIB decoupling capacitor library file format describes a custom set of capacitors that
the software considers when running PDN decoupling optimization.
Format
A CAPLIB file is a text file in CSV format, with a .caplib extension.

You can add additional data to the file to help you filter the capacitor library. The software does
not use the additional data for analysis. For example, you can add PARTNUMBER or HEIGHT
data to the file so you can sort for specific capacitors within the library to include to limit the
capacitors available during the analysis.

The file must conform to the following formatting and syntax rules:

Parameters

Keyword Description Example Value

NAME Unique name 0.1UF_TANT_AXIAL_35V
MODEL TYPE Model type RLC, SPICE, or
TOUCHSTONE
MODEL R, L, and C values or SPICE or R26.0;L2e-09;C1e-07
Touchstone model filename SPICE_filename.sp
Note: Model files must be in the Touchstone_filename.s2p
same folder as the .caplib file.
FOOTPRINT Size of the capacitor AXIAL
RADIAL
0805
1210
CAPACITANCE Value of capacitance 0.000022
Value must be greater than zero. 1e-8
PRICE Price per capacitor 0.02
Value must be greater than or equal
to zero.

HyperLynx® Advanced Solvers User Guide, VX.2.10 325

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
CAPLIB File Format

Keyword Description Example Value

MATERIAL Material TANT
(Optional) C0GNP0
Note: Provide a value if you X5R
want to use this data to filter the
list of capacitors in the library when
selecting capacitors to include in
analysis. This data is not used by the
software in analysis.
VOLTAGE Voltage 10V
(Optional) Value can be empty. 16V
Note: Provide a value if you
want to use this data to filter the
list of capacitors in the library when
selecting capacitors to include in
analysis. This data is not used by the
software in analysis.
TOLERANCE Capacitance Tolerance +10;-10
(Optional) Value can be empty.
Note: Provide a value if you
want to use this data to filter the
list of capacitors in the library when
selecting capacitors to include in
analysis. This data is not used by the
software in analysis.

Examples
Example 1:

Related Topics
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers
PDN Decoupling Optimizer

326 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Components

Components
A component is a capacitor, inductor, resistor, BGS, die, or relay that you can add to your
model.

Topic Description
Adding a Component Add a component to your model as an object
connected by pins. You can add a component at the
Project or Simulation level.
Verifying Added Components After adding all of the components to your design,
verify the added components in the model.

Adding a Component
Add a component to your model as an object connected by pins. You can add a component at
the Project or Simulation level.
Prerequisites
• You have imported or created a Layout and verified the Layout. See “Opening and
Verifying a Design” on page 29.
• You have defined pins in your Layout. See “Adding Pins” on page 317.
Procedure
1. From the Model window, click Draw and choose the Add Component menu item.
The Component dialog box opens.
2. Choose a component to add:
a. On the Component tab, choose the component type from the dropdown list.
b. Specify the component name. The unique name can be any string you specify, as
long as the string is not empty.
c. (Optional) Attach a circuit model to the component:
i. Choose an available circuit model from the dropdown list.
To add a circuit model, see “Adding a Circuit Model” on page 111.
ii. Enable Attach Circuit to create circuit ports and attach the circuit model to the
component.

HyperLynx® Advanced Solvers User Guide, VX.2.10 327

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Adding a Component

d. Specify the parameters for the component:

Enter the component parameters as floating point numerical values in standard units
(Farad, Ohm, or Henry). You can also enter standard SI Units (for example, m =
milli, u = micro, n = nano, p = pico).
o For a replay, list the terminals and click Connect or Disconnect as needed.
o For UNKNOWN, reassign the component based on your design.

Note
The software assigns the component type UNKNOWN when it cannot
determine the component type upon import.

3. Define the geometry for the component:

a. On the Geometry tab, choose the component footprint from the dropdown list.
See the tooltip for help selecting a footprint.
b. Choose the Layer to place the component from the dropdown list.
c. Choose the nets to connect to the component from the dropdown list of the available
nets in the model.
For a two-terminal component (capacitor, inductor, or resistor), the software defines
a component by terminals from left to right, assuming a horizontal placement. For a
two-terminal component, Net 1 attaches to Terminal 1 and Net 2 attaches to
Terminal 2. (See tooltip).
d. Specify the remaining parameters for the geometry.

Note
When specifying an angle of rotation, the software rotates the component at
Terminal 1, which the software defines as the left terminal assuming a horizontal
placement. For example, a 90 degree rotation places Terminal 1 at the bottom of the
component and Terminal 2 at the top of the component after rotation.

4. On the Pins tab, specify the component pins. Map pins to the terminals by selecting a
terminal and a pin and clicking Add in the Mappings section.
You must assign at least one pin for each component. Capacitors, inductors, and
resistors require exactly two pins.
5. Click Apply to add the component to the model.
Results
Verify the new component. See “Verifying Added Components” on page 329.

328 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Verifying Added Components

Verifying Added Components

After adding all of the components to your design, verify the added components in the model.
Procedure
1. In Project Browser, double-click Layout.
2. In Object Browser, expand the Components branch and visually verify that all of the
components that you added appear in Object Browser.
You can also verify the added components in the Model window. Selected Components
highlight in the selection color (white).

3. Verify the component properties.

a. In Object Browser, click a component and review the parameters list in the
Properties table located under Project Browser.
b. To edit a value in the Properties table, right-click the component in Object Browser
and choose the Components > Edit Selected Components menu item.
4. To change a Component color, right-click the component, then choose the
Color > Change Color of Selected Objects menu item.
Unselected Components display in the Component color; the default of which is brown.

Console Operation
You can run solving, meshing, distributed computing, and other tasks from a console and with
the hlasConsole executable file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 329

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Creating a Default Port Configuration File

Executable
The hlasConsole executable file location is \MentorGraphics\<release>\SDD_HOME\Nimbic\
bin.

To see reference information for hlasConsole options, run hlasConsole -h from a command
line.

The hlasConsole executable file supports all the available tools. Use the -tool “<name>” option
to specify a tool. For example, run hlasConsole -tool “Full-Wave Solver”
<additional_options>.

Enclose the exact tool name with double quotation marks. The tool name in the above example
contains spaces.

Licensing
Console operation requires you to identify the location of your product licenses with both the
MGLS_LICENSE_FILE and SALT_LICENSE_SERVER environment variables. Console
operation does not support the LM_LICENSE_FILE environment variable.

For information about licensing environment variables, see “Environment Variables for
Licensing” in the Mentor Standard Licensing Manual.

Creating a Default Port Configuration File

If you have a Touchstone file to use in the PDN Capacitor Optimizer, but no port definition file,
you can create one.
Note
Any touchstone file generated from Advanced Solvers has an associated port configuration
file (.pdn) saved in the same location as the Touchstone file. Check the directory to ensure
you do not already have a .pdn file before performing the steps in this topic.

Prerequisites
• You know which port of the Touchstone file is for the DUT(s) and VRM (if any).
Procedure
1. From the HyperLynx Advanced Solvers Dashboard, click PDN Decoupling Optimizer.
The PDN Decoupling Optimizer opens.
2. Import capacitor library files:
You can import a single .decap or .caplib capacitor library file, or all capacitor library
files in a folder.

330 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing a Padstack Database

a. On the Library Setup tab, click Import or Import Folder.

b. Select the capacitor library file or folder and click Open.
The capacitor library table populates with the files you selected.
Review the table to ensure that it contains all capacitors that you want to be available
during decoupling capacitor optimization.
c. To add additional capacitors to the list, click Append and select a capacitor library
file.
3. On the Model Setup tab, load the Touchstone file.
a. Load an impedance profile:
i. For Bareboard Impedance Profile, click Browse and navigate to a Touchstone
file that contains the impedance profile you want to use.
ii. Click Open.
The Port Configuration spreadsheet remains empty because no data exists.
4. Click Create Default.
A default port definition appears.
The default setup assumes the DUT is the first port and assigns a default impedance
requirement, and assumes all the other ports are capacitors with a footprint of 0603 and
an ‘open’ termination.
5. Edit the port configuration as needed.
6. Export the port configuration.
Results
You can now use the port configuration file for additional PDN decoupling capacitor
optimization.
Related Topics
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers
PDN Decoupling Optimizer

Editing a Padstack Database

After creating a project-level model, edit the Padstack Database on an existing layout model
before meshing.

HyperLynx® Advanced Solvers User Guide, VX.2.10 331

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing a Padstack Database

Note
To import a Padstack Database, click Import on the Database tab of the Padstack Editor
dialog box.

Restrictions and Limitations

• You can only edit the Padstack Database prior to meshing a model.
• You cannot edit a Padstack Database for a layout model for a simulation.
Prerequisites
• A layout exists. See “Creating or Editing a Model Layout” on page 311 for instructions
on defining a Layout.
• A valid Technology (with at least one valid Stackup Layer) exists within the geometry.
See “Technology” on page 350 for instructions on creating a Technology.
Procedure
1. In Project Browser, right-click Layout and choose the Edit > Edit Padstack Database
menu item.
The Padstack Editor dialog box opens.
2. On the Padstacks tab, select a padstack to view and edit. When you select a padstack, a
3-D image of the selection displays to the right.
3. For the selected padstack, specify the padstack parameters:

Parameter Description
Type Specifies the type of via to use in the padstack. Choices
include buried, blind, through, backdrill_top and
backdrill_bottom. For descriptions, see Padstack Via Types.
Internal Pads Applies selection to the internal pads of a single specified
padstack. Top and bottom pads are not affected.
Top/Bottom Pad Specifies the pad to use at the start and end layers of the via. If
blank, the via uses the pad defined for the specific layer of the
pad stack.

4. For the selected padstack, set the drill parameters:

Parameter Description
Drill Type NO_DRILL: All shapes on all layers are explicitly defined.
Drill is not implemented.
SOLID: Use the drill shape on each layer. This is a solid shape
with no internal hole.

332 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing a Padstack Database

Parameter Description
Drill Outer The shape (listed in the Pad Shapes tab) to use for the drill
Shape shape.
Drill Offset The drill offset from the via center in the format
(<X_Coordinate>,<Y_Coordinate>).
5. For the selected padstack, specify a shape for a given layer in the Pad Shapes tab by
clicking the cell for a layer and choosing a pad shape from the available shapes as
needed.
6. Use the Tapered Shapes [TSV] tab to add or delete materials to each layer of the
padstack:

If you want to... Do the following...

Add a material 1. Select the layer name.
2. Click Add Material.
3. Choose a material to add from the dropdown list and click
OK.
Each material adds a Shape and Angle column to the
spreadsheet in the Tapered Shapes tab.
The corresponding columns appear in the spreadsheet.
4. Click in the new columns and add new values by either
choosing a value from the dropdown list or typing in a value.
5. Repeat steps 1, 2 and 3 until all materials are added.
Delete a material 1. Select the layer name.
2. Click Delete.

7. In the main Pad Shapes tab, edit a shape:

a. In the Model window, select a shape, right-click and choose a viewing option.
b. Set the parameters to define the padstack shape.

Parameter Description
Shape Type Specify the pad shape: circle / square / rectangle / oblong /
octagon / polygon / undefined
Shape Offset X Set the shape offset from the center of the via (X
coordinate).
Shape Offset Y Set the shape offset from the center of the via (Y
coordinate).

c. Set additional shape parameters for the shape you selected.

HyperLynx® Advanced Solvers User Guide, VX.2.10 333

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing a Padstack Database

For example, a circle is defined by a radius and a number of segments (the segments
do not display in the 3D rendering).
After all parameters are set, the pad shape dynamically updates to reflect the new
parameters.
8. (Optional) On the Database tab, specify padstack database options including renaming
a database, and importing or exporting a database.
To specify internal pads default settings, consider the following:

Parameter Description
Internal Pads Applies selection to the internal pads of every padstack in the entire
(Entire Model) model. Top and bottom pads are not affected.
Default: Uses Pads intersecting routing.
No internal pads: No pads appear on any internal layers.
Internal plane pads only: Pads appear only on internal plane layers.
Pads intersecting routing: Pads appear on the specified layer where
traces intersect.
All pads: Pads appear on each conductor layer, exactly as defined in the
model.
Internal Pads Applies selection to the internal pads of every padstack in the entire model
(Global for all new designs. Top and bottom pads are not affected.
Default) See Internal Pads (Entire Model) for setting definitions.

9. View and edit padstack parameters in the Padstack Parameters tab.

To change units, do the following:
a. In Project Browser, right-click Layout and choose the Edit > Edit Layout Options
menu item.
b. Select a new unit from the Length dropdown list.
c. Click Apply.

Note
The scale parameter is a multiplier associated with the units. For example, 1
indicates meters and 0.001 indicates millimeters.

10. (Optional) Right-click the Model window of the Padstacks tab for a context menu with
additional options.

Option Description
Rotate/Pan/Zoom Manipulate the view in the Model window.

334 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Example Engine Options Usage

Option Description
Reset View/Front View/ Manipulate the view in the Model window.
Top View/Side View
Colors > The padstacks take the color of the layers from the
Reset Colors to Default Technology dialog box. Use these options to change
the color selection.
Change Background Color
Change Gradient
Background Color
Change Foreground Color
Change Selection Color
Draw Transparent Toggle transparency on/off
Show Text Toggle text display on/off
Change Pad Shape Color Change padstack color from basic colors or create a
custom color to apply.
Rescale Pad Shape Extents Shapes are scaled relative to all other shapes in the
Model window. If shapes vary greatly in size,
rescale the Pad Shape Extents.
Update Pad Shape Redraws the 3D view in the Padstack Editor.
Drawing
Run Graphics Performance Spins the padstack in the 3D view and displays the
Test number of frames per second (FPS).
Animate View Spins the padstack in the 3D view. Toggles on/off.
Show Performance Details Displays the number of times the display refreshes
per second.
11. Click OK.
Results
You are now ready to add a via to your model. See “Adding a Complex Structure” on page 315.
Related Topics
Padstack Via Types

Example Engine Options Usage

Interactions among solver engine options, computer hardware, and operating systems can
sometimes be best summarized by example. Understanding solver engine options can help you
obtain optimal solve run times for your computer configuration.

HyperLynx® Advanced Solvers User Guide, VX.2.10 335

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Example Engine Options Usage

Engine Option Terminology

• Logical processor — The smallest unit of a CPU that can run a sequence of instructions
(thread).
• Non-uniform memory access (NUMA) node — A set of logical processors with
identical memory access times. If a thread switches from one NUMA node to another, it
can experience different memory access times and increase the overall thread run time.
Some computers, such as a server computer, can support more than one NUMA node in
the following ways:
o A CPU socket can support one or more NUMA nodes.
o A computer can have more than one CPU socket.
• Thread affinity — Ability to schedule a thread on a specific logical processor, which can
decrease the overall thread run time.
o Spread — Evenly distribute threads across logical processors for all specified
NUMA nodes.
Use spread thread affinity unless you have evidence that close thread affinity
provides shorter solve run times.
o Close — Assign threads across logical processors and specified NUMA nodes that
are close to the logical processor running the master thread.
• Hyper-threading — Intel®’s implementation of simultaneous multi threading (SMT).
Other CPU vendors use different terminology to represent SMT.
Hyper-threading adds one or more program counters, busses, and logic that enable two
or more threads to run on one physical core. These additional resources can make one
physical core act like it has two or more logical processors.

Assumptions for Engine Options Usage Examples

• You want to run solves on a server computer with four NUMA nodes and eight logical
processors per NUMA node. This server computer configuration supports 32 threads.
• Let us say that the software can efficiently run a solve with 16 threads when a computer
has multiple NUMA nodes. Additional threads provide no or diminishing returns.
Examples in this topic limit a solve to 16 threads.
• A solve requires many repetitive math operations, and hyper-threading usually does not
reduce solve run time. Examples in this topic omit hyper-threading capabilities.

Single Solve Example

When a solve starts to run, the operating system can assign threads to any combination of
NUMA nodes and logical processors. While a solve runs, the operating system can re-assign a

336 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Example Engine Options Usage

thread to a logical processor located on a different NUMA node, which incurs longer memory
access and thread run times. To avoid this thread migration, you can:

• Specify the NUMA node(s) to use for a solve.

• Specify the thread affinity to use for a solve.
Here is one way to distribute 16 threads for a solve on this server computer:

• Use NUMA nodes 1, 2, 3, and 4.

• Use spread thread affinity.
Result: Each NUMA node runs four threads.

Here is another way to distribute 16 threads for a solve on this server computer:

• Use NUMA nodes 1 and 2.

• Use spread thread affinity.
Result: NUMA nodes 1 and 2 each run eight threads. NUMA nodes 3 and 4 each run zero
threads.

Multiple Solve Example - Solve With GUI

You want to run solves for two different projects at the same time on a server computer. Some
server computers do not natively do a good job of load balancing and can send all threads for
both solves to one NUMA node. You can ensure optimal solve run time by forcing threads for
the first solve to use one set of NUMA nodes and forcing threads for the second solve to use a
different set of NUMA nodes.

Here is one way to distribute threads for the two solves:

• First solve:
o Use only NUMA nodes 1 and 2.
Result: NUMA nodes 1 and 2 each run eight threads.
• Second solve:
o Use only NUMA nodes 3 and 4.
Result: NUMA nodes 3 and 4 each run eight threads.

Multiple Solve Example - Solve With Job Distribution

You want job distribution to run four solves at the same time on a server computer. You can
accomplish this by defining a cluster with four machines, each using its own NUMA node.

HyperLynx® Advanced Solvers User Guide, VX.2.10 337

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Exporting a Model

Exporting a Model
Save your model as it appears in the Model window for later use.
Prerequisites
• A project is loaded and a model is displayed in the Model window.
Procedure
1. In the Model window, click File and choose the Export Model to File menu item.
The Export Design File dialog box opens.
2. Navigate to the save directory and specify a filename for the model you want to export.
3. Choose a format for your export. File formats include Siemens EDA CCE (.cce), and 3D
formats SAT (.sat), STL Stereo Lithography (.stl), and VTP VTK PolyData (.vtp).
4. Click Save.

Guidance for Solving RL and GC Together

When setting Advanced Output Solve options in the Fast 3D Solver, trade-offs exist that affect
solve time, memory usage and the accuracy of solve results.

Solving for Resistance and Inductance

Consider the following information before deciding whether to solve R and L together or
separately.
Description Solve R and L Solve R and L Comments
Separately Together
Solve Strategy Solve resistance and Solve resistance Inductance dominates solve time.
inductance and inductance Resistance is very fast in
separately together comparison.
Solve Time Faster Slower Relative to each other.
Memory Uses half of the No resistance Inductance dominates the memory
Required memory solve, but matrix solve requirements. Solving R and
requirement of R solution takes L together requires both real and
and L together. twice the amount imaginary parts which double the
of memory as R memory requirements.
and L separately.

338 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Guidance for Solving RL and GC Together

Description Solve R and L Solve R and L Comments

Separately Together
Accuracy Can underestimate More accurate Inductance minimizes current loop
AC resistance and representation of while resistance maximizes current
DC inductance. the combined spread. The most realistic results
effects. considers both interactions at the
same time.
Ease of Use/ Easier More difficult Solving separately makes the
Understanding results easier to compare and
creates simpler circuit model
representations.
Circuit Use Convergence is Convergence can Mutual resistance (dense versus
easier be more difficult diagonal) of R and L together
makes the circuit interactions
between nets much more complex
than simpler R and L separate.
Circuit Faster Slower More complex models take longer
Simulation Time to solve, often with incremental to
negligible increase in accuracy and
representation.

Solving for Conductance and Capacitance

Conductance (G) comes from the dielectric conductance. If the loss tangent of a dielectric is
greater than zero, then the loss tangent has a frequency dependent conductance loss that
conductance captures (by approximation). Solving Conductance and Capacitance is not often
performed because it:

• makes the SPICE circuit more complex (complexity makes convergence more difficult
and run times longer
• has an insignificant affect on capacitance results
• takes longer to solve and doubles the memory usage
• The conductance is frequency dependent while this value is only valid at a certain
frequency.

Note
Conductance losses become more severe at high frequencies. If you have a large model and
need high frequency results, using the Fast3D solver is not recommended.

HyperLynx® Advanced Solvers User Guide, VX.2.10 339

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Launching the Scripting Environment From the GUI

Launching the Scripting Environment From

the GUI
Use the scripting environment to run a script to query and modify the design without leaving the
GUI environment. When you save the modified project from the python environment, the
software loads the updated project automatically.
The Advanced Solvers scripting environment is based on Python. You can access this
environment from any of the tools.

Prerequisites
• You understand how to use Python. A tutorial is available at python.org under
Documentation.
• You have a Project open and a Model loaded.
Procedure
1. In Project Browser, right-click the Project and choose the Launch Scripting
Environment menu item.
The HyperLynx Scripting Environment launches in a command window. The software
loads the relevant nimbictools utilities.
“Ready!” displays to indicate the scripting environment is now available for use.
2. (Optional) Type help() to enter the interactive Python help utility. Press the Enter key to
exit the help utility.
Results
You can now run scripts to streamline the setup and solve process.
Note that you can also open the scripting environment without first loading a project. From the
main toolbar, click Launch and choose the Open Scripting Environment menu item.
Launching with this option also requires you to manually load your Project and Model, and is
therefore, not recommended. However, if you choose this method, type the following at the
option to load your Project and Model:
controller = ncore.Controller("Full-Wave Solver HPC")
projectFile = "path/to/project.phys"
project = controller.readProjectFile(projectFile)
model = project.getModel()

340 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Opening HyperLynx Advanced Solvers Tools on Linux

Opening HyperLynx Advanced Solvers Tools

on Linux
Open HyperLynx Advanced Solvers to observe signal integrity or power integrity for your
design.
Prerequisites
• Install and configure licensing. Refer to the Installation and Administration Manual for
HyperLynx for this software release.
Procedure
1. Run the following Linux command:
.../MentorGraphics/<release>/SDD_HOME/Nimbic/bin/hlas.sh

2. From the HyperLynx Advanced Solvers dialog box, select a license type, select a tool,
then click OK.

Padstack Via Types

The Padstack Editor provides a way to define the type of via in your design.

HyperLynx® Advanced Solvers User Guide, VX.2.10 341

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Padstack Via Types

Designator Via Type Description

Backdrill_Bottom A via that is drilled from the top layer to remove a via
stub.
The via structure spans from via start to via end. The
software fills layers from the top of design to the higher
of the start/end layer with the drill shape. This represents
a padstack with a through-type via, but with the lower
section removed.
Note: A Backdrill_Bottom via type is functionally
equivalent to a Blind via.
Backdrill_Top A via that is drilled from the bottom layer to remove a via
stub.
The via structure spans from via start to via end. The
software fills layers from bottom layer of design to the
lower of start/end layer with the drill shape. This
represents a padstack with a through-type via, but with
the upper section removed.
Blind A via connecting a trace on a surface PCB layer to a trace
on an inner PCB layer.
The via structure spans from via start to via end. The
software fills the layers from top layer of design to the
higher of start/end layer with the drill shape.
This represents a via barrel that is drilled from the top of
the design through the bottom of the via, then filled with
metal.
Buried A via completely contained within the inner layers of a
board and that does not penetrate either surface of the
PCB.
The via spans from the start layer to end layer that you
specify in the Input Structure dialog box.
To edit start/end layers, in Object Browser, right-click a
via, then choose the Vias > Edit Selected Vias menu
item.
Through A via that runs through all layers of the board.
The via structure spans from via start to via end. The
software fills layers outside the start/end layer range with
the drill shape. This represents a via barrel that is drilled
from the top layer of the design through the bottom layer
of the design, then filled with metal.

342 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
PDN Decoupling Optimizer

Related Topics
Editing a Padstack Database

PDN Decoupling Optimizer

Over-engineering a PDN by adding too many decoupling capacitors can add to the cost of a
design. The PDN Decoupling Optimizer identifies decoupling capacitors that you can safely
remove from your design to reduce overall cost.
The PDN Decoupling Optimizer provides three types of results:

• Analysis (Baseline Analysis in Model Setup tab) which evaluates the current state of
the PDN by checking current impedance vs. target vs. best case impedance and
computes the loop inductance for every cap in the design.
• Synthesis (Run tab) which starts with a “blank” PDN with no capacitors and
algorithmically adds to a single solution using a specific strategy to meet the target
impedance.
Six synthesizers and a via specific synthesizer provide a variety of strategies:
Synthesizer/ Capacitor Selection Criteria
Strategy
StompPeaks Capacitor with the lowest impedance at the frequency where
the Zo margin is worst.
BiggerIsBetter Largest capacitor available.
High2Low Capacitor with the lowest impedance at the highest
frequency where Zo is above the target impedance.
Low2High Capacitor with the lowest impedance at the lowest frequency
where Zo is above the target impedance.
EndsIn Capacitor with the lowest impedance at the frequency F,
where F is the frequency closest to Fmin or Fmax and Zo is
greater than the target impedance.
CenterOut Capacitor with the lowest impedance at frequency F, where F
is the frequency closest to (Fmin + Fmax)/2 and Zo is greater
than the target impedance.

• Optimization (Run tab using the genetic algorithm, or using the recommended flow
with Run Optimizer enabled) runs an algorithm to optimize the capacitor selection.
Related Topics
Optimizing PDN Decoupling Capacitors - HyperLynx Advanced Solvers
CAPLIB File Format

HyperLynx® Advanced Solvers User Guide, VX.2.10 343

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Planes

Planes
A plane is a rectangular section in space broken into smaller discrete rectangles.
You can edit the Name, Orientation (the axes that is parallel to the plane), Location, Steps1
(number of discrete steps in the first axis), Steps2 (number of discrete steps in the second axis),
Min1 (minimum value for the first axis), Min2 (minimum value for the second axis), Max1
(maximum value for the first axis), and Max2 (maximum value for the second axis).

Figure 9-2. Example of a Near Field Plane Values in Space

Product Licenses
You can use the License Information dialog box to display the license(s) that you have checked
out, and the location of your license file or floating license server.
Note
The License Information dialog box is available only from solver tools, such as HyperLynx
Full-Wave Solver HPC, from the Options > License Information menu item.

The table below defines product capabilities enabled by specific atomic licenses.

344 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Product Licenses

Note
The table below does not define atomic licenses associated with “station licensing”. Atomic
licenses related to Station licensing have names starting with “avstn”, such as avstn401.
Contact a Siemens representative to learn about specific product capabilities enabled by Station
licensing.

Use the HyperLynx Advanced Solvers dialog box, also known as the product launch dialog box,
to choose between standard licensing and station licensing.

Product Capability Atomic License Tool

3D Explorer GUI nbgeomexplorer All
3D Meshing (Spatial) nbgeomcore3d All
Advanced Solvers Console nbpackconsole All
Advanced Solvers GUI nbpack All
Advanced Solvers Solve nbpacksolve All
CPM Circuit Reading nbnoisefmt1 All
CPP File Writing nbheaderfmt1 All
Distributed Solves (1 per worker) nbsecinstances Full-Wave Solver, Full-Wave
Solver HPC, Fast 3D Solver
Fast 3D Solver Console nbapexconsole Fast 3D Solver
Fast 3D Solver GUI nbapex Fast 3D Solver
Fast 3D Solver Solve nbapexsolve Fast 3D Solver
Full-Wave Solver Console nbwaveltconsole Full-Wave Solver
Full-Wave Solver GUI nbwavelt Full-Wave Solver
Full-Wave Solver Solve nbwaveltsolve Full-Wave Solver
Full-Wave Solver HPC Console nbwaveconsole Full-Wave Solver HPC
Full-Wave Solver HPC GUI nbwave Full-Wave Solver HPC
Full-Wave Solver HPC Solve nbwavesolve Full-Wave Solver HPC
Hybrid Solver GUI nbvolt Hybrid Solver
Hybrid Solver GUI nbsys Hybrid Solver
Hybrid Solver Solve nbsyssolve Hybrid Solver
Hybrid Solver Solve nbvoltsolve Hybrid Solver
Hybrid Solver Console nbsysconsole Hybrid Solver
Hybrid Solver Console nbvoltconsole Hybrid Solver

HyperLynx® Advanced Solvers User Guide, VX.2.10 345

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Sample of Exported IBIS Model File

Product Capability Atomic License Tool

Partitioned Solve Mode nbhybrid Full-Wave Solver
PDN Decoupling Optimizer nbdecapoptim PDN Decoupling Optimizer
PDN Decoupling Optimizer nbdecapoptimcore PDN Decoupling Optimizer
XFL File Reading nblayoutfmt1 All

Sample of Exported IBIS Model File

This example provides the file contents you can expect to see when you export an IBIS model
from HyperLynx Fast 3D.

346 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Sample of Exported IBIS Model File

|*****************************************************************
|
| Package Model For mPort.nApex.Solved_pkg
|
|*****************************************************************
|
[IBIS Ver] 4.1
[File Name] ibis.ibs
[File Rev] 1.0
[Date] 2017/10/10
[Source] HyperLynx Fast 3D Solver from Siemens EDA.
[Notes]
[Disclaimer]
[Copyright]
|
[Component] BGA
[Package Model] mPort.nApex.Solved_pkg
[Manufacturer] unknown
[Package]
|
| variable typ min max
R_pkg 43.1516m 6.47993m 63.097m
L_pkg 1.45957nH 0.275674nH 2.20227nH
C_pkg 0.573998pF 0.432129pF 0.848976pF
|
[Pin] signal_name model_name R_pin L_pin C_pin
B11 RXDATA0+ NC 59.8779m 1.90077nH 0.440889pF
B12 RXDATA0- NC 63.097m 2.20227nH 0.432129pF
A12 VSS GND 6.47993m 0.275674nH 0.848976pF
| D8
| D9
| E9
| E10
|
|
[Define Package Model] mPort.nApex.Solved_pkg
[Manufacturer] unknown
[OEM] unknown
[Description] package model for mPort.nApex.Solved
[Number of Pins] 3
[Pin Numbers]
|[Pin Name] NetName Pins in Net
B11 |RXDATA0+ B11
B12 |RXDATA0- B12
A12 |VSS A12
|D8
|D9
|E9
|E10
|
|
[Model Data]
|
|
|
|
[Resistance Matrix] Sparse_matrix
[Row] B11

HyperLynx® Advanced Solvers User Guide, VX.2.10 347

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Solder Mask Layer Modeling - Conformal Coat

B11 0.0598779
[Row] B12
B12 0.063097
[Row] A12
A12 0.00647993
|
|
[Inductance Matrix] Sparse_matrix
[Row] B11
B11 1.90077e-009
B12 8.28874e-010
A12 1.50982e-010
[Row] B12
B12 2.20227e-009
A12 1.31364e-010
[Row] A12
A12 2.75674e-010
|
|
[Capacitance Matrix] Sparse_matrix
[Row] B11
B11 4.40889e-013
B12 -8.09634e-014
A12 -3.52351e-013
[Row] B12
B12 4.32129e-013
A12 -3.42064e-013
[Row] A12
A12 8.48976e-013
[End Model Data]
[End Package Model]
[END]

Solder Mask Layer Modeling - Conformal Coat

You can model a solder mask layer by specifying a conformal layer type in the Technology
dialog box.
A solder mask is manufactured as a conformal coating, meaning the solder mask conforms to
the surface of the board. When the software meshes a model that includes a layer specified as a
conformal coat (type CONFORMAL), the software splits top or bottom-layer-routed traces into
two layers. The software models the inner section of the trace as metal, with thickness equal to
the conformal coat layer, surrounded by the conformal coat dielectric. The software does not

348 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Solder Mask Layer Modeling - Conformal Coat

change the outer part of the trace, but adds an additional layer to model the conformal coating
on top of the trace as an embedded dielectric.

Related Topics
Remapping a Layer
Editing Stackup Layers

HyperLynx® Advanced Solvers User Guide, VX.2.10 349

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Technology

Technology
Technology consists of a Stackup (Layers), Materials, Bond Wires, Solder Balls, and other
design properties.

Topic Description
Importing a Technology From a File Read an existing technology definition into
your design.
Editing a Technology Edit the materials, layers, stackup areas, and
package connections for a given design,
project, or simulation.
Editing Stackup Layers Use the Layers and Materials tabs of the
Technology dialog box to modify the stackup
in a given Technology.
Editing Stackup Areas If your design has multiple stackups, such as a
combination of rigid and flexible areas, verify
the properties and location of each stackup
area.
Defining Package Connections Add solder bumps, solder balls, bond wires, or
lead frames to your model to include the
effects of these connections during a solve.

Importing a Technology From a File

Read an existing technology definition into your design.
Prerequisites
• You have a project open. See “Opening and Verifying a Design” on page 29.
Procedure
1. In Project Browser, right-click Technology and choose the Import Technology menu
item.
2. Select the file (or files) to import.
3. Click Open.
Results
The software loads the selected Technology file and populates the dialog box values. For details
on editing a technology file, see “Technology (TECH) File Format” on page 417.

350 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing a Technology

Editing a Technology
Edit the materials, layers, stackup areas, and package connections for a given design, project, or
simulation.
For details on editing technology files, see “Technology (TECH) File Format” on page 417.

Prerequisites
• You have imported and verified your design model. See “Importing a Design” on
page 41 and “Verifying That the Software Correctly Recognizes Your Design” on
page 35.
Procedure
1. In Project Browser, right-click Technology and choose the Edit Technology menu
item.
The Technology dialog box opens.
2. On the Materials and Layers tabs, edit the stackup layers as needed. See “Editing
Stackup Layers” on page 352.
3. To unify the materials of adjacent dielectric layers to decrease the time it takes to mesh
and solve your model:
a. On the Materials tab, click Combine Materials.
The Enter Tolerance dialog box opens.
b. Specify a tolerance as a percentage to use when comparing materials.
The software compares the dielectric material model value of adjacent layers using the
tolerance to determine which adjacent layers to combine into a single layer dielectric. If
the materials on adjacent layers are within the specified tolerance, the software changes
the dielectric materials of both layers according to the following criteria:
• Use the material with higher loss tangent.
• If loss tangents are the same, use the material with the higher dielectric constant.
• If the loss tangent and dielectric constant are identical, use the material by name in
alphabetic order.

Note
The criteria does not account for frequency-dependent properties.

4. Set additional parameters that affect the technology:

a. Click the Other tab.
b. Adjust the length units as needed. Note that changing the units in the Properties
section also updates the Table units.

HyperLynx® Advanced Solvers User Guide, VX.2.10 351

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing Stackup Layers

c. Set the background material and optionally enable Force Background Material.
Enabled, the software replaces all dielectrics in the model with the background
dielectric to reduce memory/simulation time for a design that has different
dielectrics across layers by minimizing interface meshing and flattening plane
reference layers.
Unchecked, the software meshes the design without altering the specified dielectrics.
Use this option when your design contains microstrip signal routing.
Forcing background dielectrics in a microstrip signal routing design lowers
impedance and increases delay.
d. To include surface roughness for all layers in the model, check Enable Surface
Roughness and choose a model and measurement type.
To assign layer-by-layer surface roughness models, set the model to Custom and
click the Roughness column for each layer to assign a model. See “Editing Stackup
Layers” on page 352 for surface roughness model descriptions.
e. To include or remove the effects of trace etching in the solve, enable or disable
“Enable Etching (Trapezoidal Shapes)”.
5. To manipulate the 3D view, right-click in the Model window and choose an option from
the context menu. You can rotate, pan, zoom, change the view and layer colors, and
animate the view.

Editing Stackup Layers

Use the Layers and Materials tabs of the Technology dialog box to modify the stackup in a
given Technology.
Prerequisites
• You have imported and verified your design model. See “Importing a Design” on
page 41 and “Verifying That the Software Correctly Recognizes Your Design” on
page 35.
• You have a manufacturer data sheet that provides surface roughness and trace etch
information.
Procedure
1. In Project Browser, right-click Technology and choose the Edit Technology menu
item.
The Technology dialog box opens.
2. Click the Layers tab.

352 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing Stackup Layers

3. To edit multiple layers at a time, do the following:

a. Enable List View (option is located below the table of stackup layers).
b. Select the layers to include in the edit.
c. Edit layer properties as needed.
d. Click Apply.
e. Disable List View to view the Layers table.
4. Manipulate the stackup layers as needed:

If you want to... Do the following...

Add a layer to the stackup 1. Select a layer.
2. Click one of the following:
• Add Layer

• Insert Layer Below

• Insert Layer Above

Add a pair of layers to the 1. Select a layer.
stackup 2. Click one of the following:

• Insert Layer Pair Below

• Insert Layer Pair Above

Remove a layer from the 1. Select a layer.
stackup
2. Click Remove Selected Layers .
Move layers within the 1. Select a layer.
stackup 2. Click one of the direction arrows to move the
selected layer up, down, or to the top or
bottom of the stackup.

5. Modify values as needed:

If you want to edit... Do the following...

Layer Name 1. Click the cell of the layer name.
2. Type a new name.
The software updates the layer name in any bond wires,
solder balls, or solder bumps in which it appears.

HyperLynx® Advanced Solvers User Guide, VX.2.10 353

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing Stackup Layers

If you want to edit... Do the following...

Layer Type Click the cell and choose the new layer material from
Conductor Material the dropdown list. Choices include conductor,
dielectric, plane, ground plane and conformal.
Dielectric Material
Note: A conformal layer is a conformal coating or
solder mask that you place above the top layer or
below the bottom layer.
Conformal coat material is added as an embedded
dielectric in solder mask layer.
Thickness Click the Thickness cell for the layer, then type a
floating point number.
Elevation A read-only column that represents the stackup
thickness, starting from the bottom layer and ending at
the top of the selected layer. The value is the sum of the
layer thicknesses.
Layer Color Click the Layer Color cell, which opens the Color
dialog box, where you can change the color of the
selected layer.
6. Click the Other tab.
7. To include surface roughness in the model, enable “Enable Surface Roughness”, then
select a model and measurement type to apply to all layers.
You can specify properties for a specific layer on the Layers tab.
8. To model trace cross sections as trapezoids (caused by etching), enable “Enable Etching
(Trapezoidal Shapes)”.
9. Click Apply.
10. Click the Layers tab.
11. To model surface roughness properties for a layer:
a. Double-click a Roughness cell to open the Roughness dialog box.
b. Select one of the following roughness model types to assign a model to the top, side,
and/or bottom of the layer:

Note
To view a definition of a roughness model, select the model and hover over the
selection parameters.

354 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing Stackup Layers

To use a... Do this...

Hammerstad model 1. Choose HAMMERSTAD from the
pulldown list.
2. Specify the height (RMS).
Huray model 1. Choose HURAY from the pulldown list.
2. Specify the height of the hemisphere, the
base diameter of the hemisphere and the
distance between the peaks.
Advanced Cannonball model 1. Choose
CANNONBALL_ADVANCED from
the pulldown list.
2. Specify the Height, Area of Unit Cell,
and the Number of Nodules Per Unit
Cell.
Hammerstad Correction 1. Choose
model HAMMERSTAD_CORRECTION
from the pulldown list.
2. Specify the height in RMS to include in
the model and a scaling factor to account
for especially rough surfaces. Use this
model if the height is large.
Cannonball model 1. Choose CANNONBALL from the
pulldown menu.
2. Specify the average peak to peak height
from your manufacturer data sheet.
Groisse model 1. Choose GROISSE from the pulldown
list.
2. Specify the height of the jagged surface.

c. Click OK.
12. To specify trace etching properties for a layer:
a. Specify an etch type, which defines the trace surface located next to the etch resist
material and exposed to the etching chemical the longest.
Specify NONE to not model trace etching for a layer.
b. Specify the etch factor.
The etch factor is a ratio of X/T where:
X is the widest width of the trace minus the smallest width of the trace (W-W2).

T is the height of the trace.

HyperLynx® Advanced Solvers User Guide, VX.2.10 355

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing Stackup Layers

c. click Apply.
13. To view the Stackup Layers, including Bond Wires, Solder Balls, and Solder Bumps in
the opposite order, click Reverse Stackup.
14. On the Materials tab, modify the material properties in the given Technology:

Note
Internal materials are initially hidden. To view all materials present in the model,
enable Show All Materials.

a. To change a material name, click the cell of the material name and type the new
name. The software updates the material name in any Layers, Bond Wires, Solder
Balls, or Solder Bumps in which it appears.
b. To change a property value, click the cell and type in a new floating point number.
c. To add a dielectric model to a material:
i. Double-click the Material Type column and choose the DIELECTRIC menu
item.
ii. In the Conductivity column, specify a non-zero value in Siemens per meter (S/
m).
iii. Double-click the Dielectric Model column to open the Dielectric Model dialog
box. The dialog box contains examples for how to specify a model that includes
Dk (dielectric constant), Df (loss tangent), and an optional frequency.
Specify a model in the Value box using one of the examples, then click OK.
iv. For semiconductors, double-click the Doping Type column and choose N-Type
or P-Type; then specify a doping concentration in the Concentration column.
d. To add a new material to the materials list:
i. Verify that Use Materials From Database is enabled and the path to the file is
present.
ii. (Optional) To ensure that any dielectric materials read from an external file are
causal, enable Use Causal Materials Model.

356 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Editing Stackup Layers

Note
A materials model is causal if the materials are defined by a dielectric
constant and a loss tangent (rather than conductivity), a frequency
dependence is also specified. If no frequency is found, this option sets the
frequency to 1Ghz.

iii. Click Add From Database to access all materials in the Materials database.
iv. Select a material to add and click Apply.
The material now appears as a choice on the Materials tab. Edit the material values
as needed.

Note
The material properties listed in the Materials Database are not editable. To edit
the properties for any material, you must first add the material in the Materials
tab.

e. Click Apply.
15. Add or edit solder bumps, solder balls, bond wires or lead frames as needed. See
“Defining Package Connections” on page 359.
16. To unify the materials of adjacent dielectric layers to decrease the time it takes to mesh
and solve your model:
a. Click Combine Materials.
The Enter Tolerance dialog box opens.
b. Specify a tolerance as a percentage to use when comparing materials.
The software compares the dielectric material model value of adjacent layers using the
tolerance to determine which adjacent layers to combine into a single layer dielectric. If
the materials on adjacent layers are within the specified tolerance, the software changes
the dielectric materials of both layers according to the following criteria:
• Use the material with higher loss tangent.
• If loss tangents are the same, use the material with the higher dielectric constant.
• If the loss tangent and dielectric constant are identical, use the material by name in
alphabetic order.

Note
The criteria does not account for frequency-dependent properties.

17. To export the Technology definition for use in another simulation:

a. Click Export (in the Other Actions section of the dialog box).

HyperLynx® Advanced Solvers User Guide, VX.2.10 357

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Editing Stackup Areas

b. Navigate to the directory to save the Technology file.

c. Type the File name, then click Save.
The software writes the technology definition to the specified location in the technology
file format. For details on editing a technology file, see “Technology (TECH) File
Format” on page 417.
Results
If your design has multiple stackups, such as a combination of rigid and flexible areas, verify
the location and set of layers for each area (that is, “stackup area”). See “Editing Stackup Areas”
on page 358.
With the stackup defined, the next step is to set up your model for a solve. See “Preparing to
Solve a Design” on page 71.
Related Topics
Solder Mask Layer Modeling - Conformal Coat

Editing Stackup Areas

If your design has multiple stackups, such as a combination of rigid and flexible areas, verify
the properties and location of each stackup area.
Note
This topic assumes that you have imported a post-layout design with existing stackup area
information, and that you want to verify or edit the properties of stackup areas.

Restrictions and Limitations

• Hybrid Solver and Fast 3D Solver do not support a design containing multiple stackups,
such as a design with rigid and flexible areas.
Prerequisites
• You have verified your overall stackup. For a design with multiple stackups, an overall
stackup includes layers for all stackup areas. See “Editing Stackup Layers” on page 352.
Procedure
1. In Project Browser, right-click Technology, then choose the Edit Stackup Areas menu
item.
The Technology dialog box opens.
2. Select a stackup area to edit.
The model layout highlights the location of the selected stackup area.

358 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Defining Package Connections

The 3D View area near the bottom of the dialog box highlights the layer thicknesses for
the selected stackup area.
3. In the Properties area:
a. Specify whether a stackup area has rigid or flexible layers.
b. Verify the location of a stackup area boundary in the model layout. If needed, you
can use the Shape menu (and the field below it), Expand/Contract buttons, and other
options to edit it.

Tip
You can toggle between an Expand button and a Contract button by entering a
positive or negative value in the Distance field.

4. In the Layers area, specify the set of layers to include in a stackup area.
5. Click Apply, then click Close.

Defining Package Connections

Add solder bumps, solder balls, bond wires, or lead frames to your model to include the effects
of these connections during a solve.
Prerequisites
• You have imported and verified your design. See “Importing a Design” on page 41 and
“Verifying That the Software Correctly Recognizes Your Design” on page 35.
Procedure
1. In Project Browser, right-click Technology and choose Edit Technology.
The Technology dialog box opens.

HyperLynx® Advanced Solvers User Guide, VX.2.10 359

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Defining Package Connections

2. Add package connections to your design:

If you want to add... Do the following...

Bond wires 1. On the Bond Wires tab, click “+”.
2. In the Name cell, type a unique name in the cell.
3. To change the direction, click the Direction cell and
select a new direction from the pull-down menu.
Similarly, you can change the Model Type, the
Support Layer, and the Termination Layer.
4. To change the Diameter, Loop Height (Loop Ht.),
Die Height (Die Ht. (H2)), Alpha, and Beta of each
bond wire, click in the cell and type a positive
floating point number.
5. To change the color of each Bond Wire, click the
Color cell and select a new color in the Color dialog
box.
6. To remove a Bond Wire, select a Bond Wire and
click “-”.
Solder balls 1. On the Solder Balls tab, click “+”.
2. In the Name cell, type a unique name.
3. To change the Diameter (D), Pad Diameter (D1),
Port Diameter (D2), or Height (HT) of each Solder
Ball, click the cell and type any positive floating
point number.
4. To change the Support Layer, click the Support
Layer cell and select the new Support Layer from the
pull-down menu. Similarly change the Termination
Layer and the Material.
5. To change the color of each Solder Ball, click the
Color cell and select a new color in the Color dialog
box.
6. To remove a Solder Ball, select a Solder Ball and
click “-”.

360 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Use Pin Area

If you want to add... Do the following...

Solder bumps 1. On the Solder Bump tab, click “+”
2. In the Name cell, type a unique name.
3. For solder bump dimensions, you can:
• Enable the software to adjust a solder bump size to
support the connected pin pad size. In the Auto
Update column, select Yes.
• Manually specify the Diameter (D), Pad Diameter
(D1), Port Diameter (D2), and Height (HT) of
each Solder Bump. Click in the cell and type a
positive floating point number.
4. To change the Support Layer, click the Support
Layer cell and select a new Support Layer from the
pull-down menu. Similarly change the Termination
Layer and the Material.
5. To change the color of each Solder Bump, click the
Color cell and select a new color in the Color dialog
box.
6. To remove a Solder Bump, select a Solder Bump and
click “-”.
Lead frame 1. On the Lead Frames tab, click “+”.
2. In the Name cell, type a unique name.
3. To change the Length, Height, Thickness, %
(Percent) Top, and % (Percent) Bottom of each Lead
Frame, click in the cell and type a positive floating
point number.
4. To change the Support Layer, click the Support
Layer cell and select the new Support Layer from the
pull-down menu. Similarly change the Termination
Layer and the Material.
5. To change the color of each Lead Frame, click the
Color cell and select a new color in the Color dialog
box.
6. To remove a Lead Frame, select a Lead Frame and
click “-”.
3. Click Apply.

Use Pin Area

If you enable Use Pin Area, the spreading inductance is smaller since the current does not have
to concentrate into one point. Instead, the current flows to the perimeter of the pin. However,

HyperLynx® Advanced Solvers User Guide, VX.2.10 361

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Using the Solve Queue

using this option increases the size of the port to the furthest points between two pins, which can
reduce the bandwidth of the port.
This option has no effect on resistance because the pin area is “painted” with a PEC (perfect
electric conductor)-like material, so there is no resistive drop along its surface. See Figure 9-3
where the white circles represent the pins.

Figure 9-3. Use Pin Area Examples

Using the Solve Queue

When more than one solve is running, you can add or remove other simulations to or from the
solve queue.
Prerequisites
• More than one solve is running.
Procedure
In Project Browser, do one of the following:

If you want to... Do the following...

View the solve queue 1. Select a Simulation.
2. Type Shift+Q.

362 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Support Information
Vias

If you want to... Do the following...

Add a simulation to the solve queue 1. Right-click Simulation and choose Add
to Solve Queue.
Or
1. Select a Simulation.
2. Type Shift+S.
Remove a simulation to the solve • Right-click Simulation and choose
queue Remove from Solve Queue.
Or
1. Select a Simulation.
2. Type Shift+D.

Vias
A via is a structure that has a start and end layer and consists of pads (positive shapes), anti-pads
(hole shapes), thermal relief pads, and other shapes on layers, with or without a drill shape.
Define a via by first editing the Padstack database. A padstack is the description of how a via is
constructed. A padstack contains pad shapes and additional parameters.

HyperLynx® Advanced Solvers User Guide, VX.2.10 363

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Support Information
Vias

364 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Chapter 10
Reference - Dialog Boxes

This chapter describes the dialog boxes for the software.

Topic Description
Configuration Options Dialog Box The Configuration Options dialog box
provides a way to set various options in the
software.
Create New Results Dialog Box Use this dialog box to post-process solve
results.

HyperLynx® Advanced Solvers User Guide, VX.2.10 365

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Reference - Dialog Boxes
Configuration Options Dialog Box

Configuration Options Dialog Box

The Configuration Options dialog box provides a way to set various options in the software.
Access: Options > Configuration

Topic Description
Configuration Options Dialog Box, Set directory locations for the software.
General Tab
Configuration Options Dialog Box, EDA Specify options when importing Cadence, Zuken, or
Link Tab DXF designs.
Configuration Options Dialog Box, Save Set options for how and what to save when saving project
Data Tab data.
Configuration Options Dialog Box, Set options to control how items display in the Model
Display Tab window and the Results Plotter.
Configuration Options Dialog Box, Gives you the option to use a causal materials model and
Advanced Tab clean nets before meshing. You can also reset all saved
settings.

366 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Reference - Dialog Boxes
Configuration Options Dialog Box, General Tab

Configuration Options Dialog Box, General Tab

Access: Choose Options > Configuration, click General tab.
Set directory locations for the software.
Objects

Field Description
General Options
Project Directory Specifies the directory path to your project files.
Temporary Files Path Specifies the directory path to all temporary files.
User Files Path Specifies the directory path to any user files that you need
access to for a solve, such as...
Keep Temporary Files (for Checked, temporary files remain in the specified location until
debugging purposes) you manually delete them.
Unchecked, the software removes all temporary files after ....
Log File Path Specifies the directory path to the log file.
Append To Log File Checked, appends all messages in the Status Messages
window to the project log file.
Unchecked, creates a new file each time the tool is starts,
wiping out all previous messages.
Databases
Material Database File Specifies the file the software uses to access material
information for your projects. Include the complete path when
specifying a file.
Use Materials From Database Checked, uses materials from the materials database file when
importing a design.
Unchecked, uses the materials list included in the design file
(often incomplete).
Circuit Models Folder Specifies the location of the circuit model files that display in
the Circuit Netlist dialog box and the Component dialog box.

HyperLynx® Advanced Solvers User Guide, VX.2.10 367

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Reference - Dialog Boxes
Configuration Options Dialog Box, EDA Link Tab

Configuration Options Dialog Box, EDA Link Tab

Access: Choose Options > EDA Link.
Specify options when importing Cadence, Zuken, or DXF designs.
Objects

Field Description
Cadence Options
See “Preparing to Import an Allegro Design” on page 55.
Allegro Install Directory Specify the full filepath that contains your copy of Allegro
software.
Allegro Extracta File The software locates the extracta executable file based on the
directory you specified for the Allegro installation.
Zuken Options
Zuken Install Directory Specify the full filepath that contains your copy of Zuken
software.
Zuken Executable File The software locates the extracta file based on the directory
you specified for the Zuken installation.
DXF to GDS Executable Specify the full filepath of your d2g.exe executable file.

368 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Reference - Dialog Boxes
Configuration Options Dialog Box, Save Data Tab

Configuration Options Dialog Box, Save Data Tab

Access: Choose Options > Save Data Options.
Set options for how and what to save when saving project data.
Fields

Field Description
Save Options
Automatically Save Project Checked, saves the project in a file before creating the
Before Meshing mesh.
Unchecked, you must manually save a copy of the project
data.
Automatically Save Project Checked, saves the project and mesh data in a file before
Before Solving starting a solve.
Unchecked, you must manually save a copy of the project
data.
Automatically Save Project After Checked, saves the project, mesh, and results in a *.snp file
Solving in simulation directory with the simulation name as part of
the filename.
Unchecked, you must manually save a copy of the project
and solve data.
Save Solver Data as Text File Checked, saves solver data in a text file.
(Unchecked will Save in Binary Unchecked, saves solver data in a binary file.
File)
Save Project File Images Checked, saves an image of the rendering that appears in
the 3D Model window at the time of the save.
Unchecked, the software discards the project file images.
Automatically Clean the Project Checked, the software deletes any unused simulation
when Saving folders.
Unchecked, the software saves all existing simulation
folders.
Undo/Redo Options
Maximum Undo/Redo Operations Specifies the number of times you can perform an undo/
redo operation.
Data Options
Data File Precision Specifies the number of significant digits to the right of the
decimal for simulation data.

HyperLynx® Advanced Solvers User Guide, VX.2.10 369

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Reference - Dialog Boxes
Configuration Options Dialog Box, Display Tab

Configuration Options Dialog Box, Display Tab

Access: Choose Options > Display Options.
Set options to control how items display in the Model window and the Results Plotter.
Objects

Field Description
Model Display Options (Model 3D View)
Note: If you do not enable any of the Draw options, the model renders as solid, which uses both
faces and wire frames.
Draw Solid Objects (faces and Only faces display without wire frames.
wire outlines)
Draw Wire Frame Outlines Only Checked, the model displays using outlines only for the selected
(Do not Tessellate the Model) nets.
Unchecked, the model displays with tessellation.
Draw Faces of Objects Only (no Checked, renders the model using solid shapes (faces).
wire outlines) Unchecked, enables selection of Draw Wire Frame Outline Only
option.
Draw Flat 2D Layers (Layers Checked, model renders with outline only.
appear with no thickness) Unchecked, model renders in 3D.
Accurate Tessellation (accuracy Checked, uses a complex algorithm when rendering holes in
over speed) shapes for better accuracy, prioritizing accuracy over speed.
Unchecked, uses a simpler algorithm that takes less time to
render the model, prioritizing speed over accuracy. Unchecked
is recommended for designs containing more than 30 vias or
more than 30 shapes per layer.
Show Sub-Shapes in Object Checked, displays composite sub-shapes (boundaries and holes)
Browser individually in the Object Browser and 3D view.
Unchecked, displays only composite shapes in Object Browser
and 3D View. Recommended for large models.
Low Memory Option Checked, the software takes steps to free up graphics memory
during a solve to save space in memory on the installed machine.
See tooltip for details.
Unchecked, solve uses available memory.
Create Mesh Visuals when Checked, displays mesh elements as the model loads, if
Loading available, or after console solve.
Unchecked, does not automatically display mesh, even if data is
available.

370 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Reference - Dialog Boxes
Configuration Options Dialog Box, Display Tab

Field Description
Results Display Options (Results Plotter)
Update Results Display While Checked, displays results in Model window during solve.
Solving Unchecked, displays Results data in Model window after solve
is complete.
Use port names instead of port Checked, displays data using port names.
numbers in Results Display Unchecked, displays data using port numbers.
Enable High DPI Scaling Checked, the GUI scales based on the DPI (resolution) of the
monitor.
Unchecked, the GUI scales by the operating system.
If scaling problems occur with large monitors, uncheck this
option.

HyperLynx® Advanced Solvers User Guide, VX.2.10 371

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Reference - Dialog Boxes
Configuration Options Dialog Box, Advanced Tab

Configuration Options Dialog Box, Advanced Tab

Access: Choose Options > Configuration.
Gives you the option to use a causal materials model and clean nets before meshing. You can
also reset all saved settings.
Objects

Field Description
Use Causal Materials Model Checked, ensures that any dielectric materials read from an
external file are causal: if the materials are defined by a
dielectric constant and a loss tangent (rather than
conductivity), a frequency dependence is also specified. If no
frequency is found, this option sets the frequency to 1Ghz.
Unchecked, the model read from an external file is not
modified in any way.
Model Resolution Units Sets the minimum display resolution in the Model window.
Affects the solve precision.
Set this option to a larger scale when importing a large
design.
Reset All Saved Settings Resets all saved settings to default values.

372 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Reference - Dialog Boxes
Create New Results Dialog Box

Create New Results Dialog Box

Access: In Project Browser, right-click Results, choose Add Results.
Use this dialog box to post-process solve results.
Objects

Section Description
Plot Data, Sweep Input, The software uses each of these lists to determine the
Sweep Output, Plot Type, data to create.
Frequency, Direction,
Shapes, Lines, and another
Lines section
Plot Data Specifies the results data to create (in this case, EMI or
EMC data).
Sweep Input Specifies the input variable to sweep over (in this case,
Frequency or Position data).
Sweep Output Specifies the output to plot (in this case, Electric Field
or Magnetic Field data).
Plot Type Specifies the type of results to create (in this case, a 2D
Rectangular Plot or 3D Object Plot).
Frequency Specifies the Frequency range to include in the plot.
Direction Specifies the spatial directions of interest (in this case,
XYZ, X, Y, Z, or Horizontal directions).
The remaining three sections contain data specific to the EMI Near field shapes.
Shapes Specifies the different shapes used (in this case, Plane
shapes 1 through 9).
Lines Specifies the constant lines associated with the Shapes
list (in this case, the constant X and Y Lines).
Near Field plots You can add Near Field plots one at a time or in groups.
Select one or more options from each list.

HyperLynx® Advanced Solvers User Guide, VX.2.10 373

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Reference - Dialog Boxes
Create New Results Dialog Box

374 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Appendix 11
Job Distribution

The software can send work (jobs) to other computers to complete the work in less overall time
or to free up your computer for other work.
Note
The Distributed Solve dialog box supports these technologies: LSF, AWS, HPC, local
mode.

Topic Description
Solving With LSF Job Distribution You can run a solve with a cluster based on IBM®
Spectrum LSF® (load sharing facility)
technology.
Solving With AWS Job Distribution You can run a solve with a cluster based on
Amazon Web Services (AWS) technology. More
specifically, the software supports clusters that
are implemented as an Amazon Virtual Private
Cloud™ (Amazon VPC™).
Solving With HPC Job Distribution You can run a solve with a cluster based on
Windows HPC technology.
Solving With HyperLynx Job Distribution You can run a solve with a cluster based on
HyperLynx technology.
Solving With Local Mode — Linux You can run a solve with a remote Linux
computer, especially one that is more powerful
than your own computer. If your own computer
has at least eight cores and 16 GB memory, you
can shorten solving run time by using multiple
program (hlasConsole) instances.
Solving With Local Mode — Windows If you are using a Windows-based computer, you
can run a solve with a remote computer that is
also Windows-based, especially one that is more
powerful than your own computer. If your own
computer has at least eight cores and 16 GB
memory, you can shorten solving run time by
using multiple program (hlasConsole) instances.
Script Operation You can run a script to run jobs with job
distribution.

HyperLynx® Advanced Solvers User Guide, VX.2.10 375

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With LSF Job Distribution

Topic Description
Supporting Information for Job Distribution Job distribution involves tasks and technical
concepts that sometimes require additional
explanation. Refer to this information as needed.

Solving With LSF Job Distribution

You can run a solve with a cluster based on IBM® Spectrum LSF® (load sharing facility)
technology.
Prerequisites
• You have logged into either a:
o Linux computer that belongs to the LSF cluster that you plan to use.

Tip
If you open HyperLynx Advanced Solvers software using a Linux computer that
belongs to the LSF cluster, you perform fewer steps in the procedure that
follows.

Tip
To verify the LSF environment, run the following shell command to see if it
successfully submits a job to a queue:
bsub echo Hello

o Windows computer or Linux computer that does not belong to an LSF cluster.
• You know the name of a Linux computer that belongs to the LSF cluster that you
plan to use. In step 9.d, you specify this computer name.
• Your login must have permission to log into a Linux computer that belongs to
the LSF cluster that you plan to use. In step 9.b, you specify your login password
to create an SSH (secure shell) private key that provides your password to the
LSF cluster.
• You have installed the Linux version of HyperLynx Advanced Solvers to a network
folder that is available to the LSF cluster that you plan to use. The software release
installed to a network folder should match the release that was used to create the project
that you plan to solve.
• Your project has one or more simulations that are ready to solve. This includes a model
for each simulation, and mesh and solver option settings. Job distribution meshes
models for you.

376 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With LSF Job Distribution

• You have copied your project to a network folder that is available to the LSF cluster and
your computer. To ensure a complete copy, open your project, then choose the File
> Save Project As menu item.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From your computer, open one or more projects that are located in a network folder that
is available to the LSF cluster.
2. In Project Browser, right-click a simulation or project (to solve all of its simulations),
then choose the Solve > Distributed Solve menu item.
The Distributed Solve dialog box opens. Refer to tooltips for detailed information for
dialog box options.
3. On the Options tab, specify the number of frequencies, number of ports-per-frequency,
and number of simulations (if your project contains more than one simulation) that you
want to solve in parallel.
4. If needed, specify scheduler, simulator, and submit options.
To see available scheduler and simulator options, run the following shell command:
\MentorGraphics\<release>\SDD_HOME\Nimbic\bin\hlasConsole -h

To see available submit options, refer to IBM Platform LSF documentation. Your LSF
administrator may recommend specific options and values. For example, an
administrator may want you to solve with a specific queue (-q <queue_name>).
5. In the Clusters table, select an LSF cluster.
6. Click Apply.
7. If you have opened multiple projects, click the Projects tab, enable the projects to solve,
then click Apply.
8. If you have opened HyperLynx Advanced Solvers from a Linux computer that belongs
to an LSF cluster, click Solve.
Solving begins and this procedure has no more steps for you to perform.
9. If you have opened HyperLynx Advanced Solvers from a Windows computer or a Linux
computer that does not belong to an LSF cluster:
a. Click the SSH tab.
b. Specify the path to a network folder that contains an SSH private key:

Note
A private key has no filename suffix and a public key has a .pub filename suffix.

HyperLynx® Advanced Solvers User Guide, VX.2.10 377

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With LSF Job Distribution

If you... Do this...
Do not have an SSH 1. Ensure that the SSH Key Path field is empty.
private key 2. Click Generate Key Pair and type your login
password for the Linux computer that belongs
to the LSF cluster.
The software creates an SSH key pair and adds its
path to the SSH Key Path field.
On a Windows computer, the software saves the
key pair to <drive>:\Users\<login>\.hlcluster\ssh
folder.
Have an SSH private Click Browse, then specify a path.
key

c. Specify the simulator path to a network folder that contains hlas.sh.

For example /home/<user>/MentorGraphics/<release>/SDD_HOME/Nimbic/bin.
d. Next to the Available Linux Hosts field, click Add Host, specify the name for a
computer that belongs to the LSF cluster, then select it.
e. Next to the Path Mapping field, click Add, then specify the local path (valid for your
computer) and remote path (valid for a computer in an LSF cluster) to a network
folder that contains the project(s) (.phys files) that you want to solve.
If your local computer runs Windows, here are example path pairs:
Local Windows Path Remote Linux Path
//home/dfs/<user>/MentorGraphics/ /home/<user>/MentorGraphics/
<release>/SDD_HOME/Nimbic/ <release>/SDD_HOME/Nimbic/
examples examples
X:/MentorGraphics/<release>/ /home/<user>/MentorGraphics/
SDD_HOME/Nimbic/examples <release>/SDD_HOME/Nimbic/
Where you have mapped drive X: to \\ examples
home\dfs\<user>\

Note
If you specify a path with a backward slash character (\), the software
automatically changes it to a forward slash character (/).

378 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With AWS Job Distribution

f. In the Bash Initialization Commands field, use Linux Bash shell syntax to specify
the following information:
o Your license servers. For example:
-submit-common
env:MGLS_LICENSE_FILE:<port>@<server>.<your_company>.com;SALT
_LICENSE_FILE:<port>@<server>.<your_company>.com

o Path to an LSF configuration file. For example:

source /<path>/lsf/conf/profile.lsf

g. Click Apply.
h. Click Test SSH. Fix any reported problems.
i. Click Solve via SSH.
Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.

Solving With AWS Job Distribution

You can run a solve with a cluster based on Amazon Web Services (AWS) technology. More
specifically, the software supports clusters that are implemented as an Amazon Virtual Private
Cloud™ (Amazon VPC™).
Prerequisites
• You have created an AWS cluster. See “Creating a Cluster - AWS” on page 405.
• Your project has one or more simulations that are ready to solve. This includes a model
for each simulation, and mesh and solver option settings. Job distribution meshes
models for you.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From your computer, open one or more projects.
2. In Project Browser, right-right a simulation or project (to solve all of its simulations),
then choose the Solve > Distributed Solve menu item.
The Distributed Solve dialog box opens. Refer to tooltips for detailed information for
dialog box options.

HyperLynx® Advanced Solvers User Guide, VX.2.10 379

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With HPC Job Distribution

3. On the Options tab, specify the number of frequencies, number of ports-per-frequency,

and number of simulations (if your project contains more than one simulation) that you
want to solve in parallel.
4. If needed, specify scheduler and simulator options.
To see available scheduler and simulator options, run the following shell command:
\MentorGraphics\<release>\SDD_HOME\Nimbic\bin\hlasConsole -h

Note
The software ignores submit options.

5. In the Clusters table, select an AWS cluster.

6. Click Apply.
7. If you have opened multiple projects, click the Projects tab, enable the projects to solve,
then click Apply.
8. Click Solve.
Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.
When you are done running job distribution, you may want to stop the cluster to reduce fees.

Solving With HPC Job Distribution

You can run a solve with a cluster based on Windows HPC technology.
Prerequisites
• On a computer that belongs to the Windows HPC cluster that you plan to use, you have
done the following:
o Logged in.
o Stored your login password, to make it available to the cluster.
To do this from Windows PowerShell, enter the following command, type your
password, then type Y to enable the cluster to remember your password:
job submit echo hello

If the Windows HPC cluster computer reboots, store your login password again.
o Installed the Windows version of HyperLynx Advanced Solvers.

380 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With HPC Job Distribution

• You have a project with one or more simulations that are ready to solve. This includes a
model for each simulation, and mesh and solver option settings. Job distribution meshes
models for you.
• You have copied a project to either:
o A folder on a computer that belongs to the Windows HPC cluster and that you have
logged into.
o A network folder that is accessible to the Windows HPC cluster.

Note
To ensure a complete copy, choose the File > Save Project As menu item.

• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From a computer that belongs to a Windows HPC cluster, open one or more HyperLynx
Advanced Solvers projects.
2. In Project Browser, right-click a simulation or project (to solve all of its simulations),
then choose the Solve > Distributed Solve menu item.
The Distributed Solve dialog box opens. Refer to tooltips for detailed information for
dialog box options.
3. On the Options tab, specify the number of frequencies, number of ports-per-frequency,
and number of simulations (if your project contains more than one simulation) that you
want to solve in parallel.
4. If needed, specify scheduler, simulator, and submit options.
To see available scheduler and simulator options, run the following shell command:
\MentorGraphics\<release>\SDD_HOME\Nimbic\bin\hlasConsole -h

To see available submit options, refer to Microsoft HPC documentation.

5. In the Clusters table, select an HPC cluster.
6. Click Apply.
7. If you have opened multiple projects, click the Projects tab, enable the projects to solve,
then click Apply.
8. Click Solve.
Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.

HyperLynx® Advanced Solvers User Guide, VX.2.10 381

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With HyperLynx Job Distribution

Solving With HyperLynx Job Distribution

You can run a solve with a cluster based on HyperLynx technology.
Prerequisites
• You have configured machines to work with a job distribution cluster. You have the
same HyperLynx Advanced Solvers release on your computer and worker computers.
See “Configuring a Machine for a HyperLynx or LSF Cluster” on page 406.
• You have configured and started a cluster. See “Creating a Cluster - HyperLynx or LSF”
on page 402.
• One or more simulations are ready to solve. This includes a model for each simulation,
and setting mesh and solver options. Job distribution meshes models for you.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. Load one or more projects into a HyperLynx Advanced Solver tool.
2. Open the HyperLynx Job Distribution dialog box:

If you want to open it with... Do the following...

Project Browser Right-click a simulation or project, then choose
the Solve > Solve from Job Distribution UI
menu item.
Other access methods See “Opening the HyperLynx Job Distribution
Dialog Box” on page 414.

3. Specify the project(s) to solve:

On the Solve tab, below the Project Files field, click ADD PROJECTS, then browse to
one or more project files.
4. In the Application field, choose the same HyperLynx Advanced Solver tool that you
used to prepare the simulation(s) that you will solve.
5. In the Cluster field, choose a cluster.

382 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With HyperLynx Job Distribution

6. In the Properties table, specify how to divide the work into jobs:

If you want to... Do the following...

Solve more than one Double click the Value cell for Number of
Simulation at once Parallel Simulations and type a number.
Note: The maximum number of parallel jobs
= (number of machines in cluster) - 1.
Subtract one because the cluster leader does not
run jobs.
Solve more than one Double-click the Value cell for Parallel
frequency at once Frequency Jobs per Simulation and type a
number.
Note: The maximum number of parallel jobs
= (number of machines in cluster) - 1.
Subtract one because the cluster leader does not
run jobs.
Solve more than one port at Double-click the Value cell for Parallel Port Jobs
once per Simulation and type a number.
This capability is helpful when you have a large
project with many ports.
Note: The maximum number of parallel jobs
= (number of machines in cluster) - 1.
Subtract one because the cluster leader does not
run jobs.
Solve all frequency and port 1. Double click the Value cell for Number of
jobs on one machine (this is Parallel Simulations and type 1.
similar to a batch mode of 2. Double-click the Value cell for Parallel Port
operation) Jobs per Simulation and type 1.
Solve only with a specific Double-click the Value cell for “Common bsub
subset of machines in an LSF Options” and type
cluster -m “<machine1> ... <machineN>”
Where <machine#> is one or more machine
system names separated by a space and enclosed
by double quotes.

7. Start solving:

If you want to... Do the following...

Solve all simulations Click SOLVE ALL SIMULATIONS.

HyperLynx® Advanced Solvers User Guide, VX.2.10 383

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With Local Mode — Linux

If you want to... Do the following...

Solve a specific simulation 1. Click the down arrow next to the SOLVE
(Available when you have ALL SIMULATIONS button, and select a
opened only one project.) Simulation name.
2. Click Solve <simulation_name>.

Results
The Jobs Status field displays job progress. You can use filters in the Jobs tab to display status
for specific jobs.
You can open the project file (PHYS) to see results.
To terminate all jobs before they complete, click Stop Job.
If necessary, you can download and review a log of the process (such as if the process
terminates unexpectedly and you want to troubleshoot) by typing the following command line:
<path> python.exe (or python3 for Linux) -m hlcluster.cmd.cluster.filemgr
-destination-path ./tmp -collect-logs -cluster-name <cluster name>

Where <path> is the file path to the Scripting folder (usually at MentorGraphics\<version>\
SDD_HOME\Scripting) and <cluster name> is the name of the Job Distribution cluster.
The software creates a zip file containing the logs and places it in the temporary folder (tmp/
<clustername.zip>).

Solving With Local Mode — Linux

You can run a solve with a remote Linux computer, especially one that is more powerful than
your own computer. If your own computer has at least eight cores and 16 GB memory, you can
shorten solving run time by using multiple program (hlasConsole) instances.
Prerequisites
• Your project(s) have one or more simulations that are ready to solve. This includes a
model for each simulation, and mesh and solver option settings. Job distribution meshes
models for you.
• If you plan to solve with a remote Linux computer:
o Your login must have permission to log into a Linux computer that you plan to use.
In step 8.b, you specify your login password to create an SSH (secure shell) private
key that provides your password to the Linux computer.
o You have installed the Linux version of HyperLynx Advanced Solvers to a network
folder that is available to the Linux computer that you plan to use. The software
release installed to a network folder should match the release that was used to create
the project that you plan to solve.

384 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With Local Mode — Linux

o You have copied your project to a network folder that is available to the Linux
computer and your computer. To ensure a complete copy, open your project, then
choose the File > Save Project As menu item.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From your computer, open one or more projects.
2. In Project Browser, right-click a simulation or project (to solve all of its simulations),
then choose the Solve > Distributed Solve menu item.
The Distributed Solve dialog box opens. Refer to tooltips for detailed information for
dialog box options.
3. On the Options tab, specify the number of frequencies, number of ports-per-frequency,
and number of simulations (if your project contains more than one simulation) that you
want to solve in parallel.

Restriction
When you “Solve with SSH”, to run a solve on a remote Linux computer, the
software supports a value of 1 for the following options: Parallel Frequency Jobs per
Simulation, Parallel Port Jobs per Freq, Parallel Simulations.

If needed, specify scheduler, simulator, and submit options.

To see available scheduler and simulator options, run the following shell command:
\MentorGraphics\<release>\SDD_HOME\Nimbic\bin\hlasConsole -h

4. In the Clusters table, select a Local Mode cluster.

5. Click Apply.
6. If you have opened multiple projects, click the Projects tab, enable the projects to solve,
then click Apply.
7. If you want solve with the same computer that you used to open the project(s), click
Solve.
Solving begins and this procedure has no more steps for you to perform.
8. If you want to solve with a remote Linux computer:
a. Click the SSH tab.
b. Specify the path to a folder that contains an SSH private key:

Note
A private key has no filename suffix and a public key has a .pub filename suffix.

HyperLynx® Advanced Solvers User Guide, VX.2.10 385

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With Local Mode — Linux

If you... Do this...
Do not have an SSH 1. Ensure that the SSH Key Path field is empty.
private key 2. Click Generate Key Pair and type your login
password for the Linux computer that belongs
to the LSF cluster.
The software creates an SSH key pair and adds its
path to the SSH Key Path field..
On a Windows computer, the software saves the
key pair to <drive>:\Users\<login>\.hlcluster\ssh
folder.
Have an SSH private Click Browse, then specify a path.
key

c. Specify the simulator path to a network folder that contains hlas.sh.

For example /home/<user>/MentorGraphics/<release>/SDD_HOME/Nimbic/bin.
d. Specify a remote Linux computer to run solves:
i. If you need to add a Linux computer, next to the Available Hosts field, click Add
Host, specify a computer name, then click OK
ii. In the Available Hosts field, select a remote Linux computer.
e. Next to the Path Mapping field, click Add, then specify the local path (valid for your
computer) and remote path (valid for the remote Linux computer) to a network
folder that contains the project(s) (.phys files) that you want to solve.
If your local computer runs Windows, here are example path pairs:
Local Windows Path Remote Linux Path
//home/dfs/<user>/MentorGraphics/ /home/<user>/MentorGraphics/
<release>/SDD_HOME/Nimbic/ <release>/SDD_HOME/Nimbic/
examples examples
X:/MentorGraphics/<release>/ /home/<user>/MentorGraphics/
SDD_HOME/Nimbic/examples <release>/SDD_HOME/Nimbic/
Where you have mapped drive X: to \\ examples
home\dfs\<user>\

Note
If you specify a path with a backward slash character (\), the software
automatically changes it to a forward slash character (/).

386 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With Local Mode — Windows

f. In the Bash Initialization Commands field, use Linux Bash shell syntax to specify
the following information for your license servers. For example:
-submit-common
env:MGLS_LICENSE_FILE:<port>@<server>.<your_company>.com;SALT_LI
CENSE_FILE:<port>@<server>.<your_company>.com

g. Click Apply.
h. Click Test SSH. Fix any reported problems.
i. Click Solve via SSH.
Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.

Solving With Local Mode — Windows

If you are using a Windows-based computer, you can run a solve with a remote computer that is
also Windows-based, especially one that is more powerful than your own computer. If your own
computer has at least eight cores and 16 GB memory, you can shorten solving run time by using
multiple program (hlasConsole) instances.
Prerequisites
• Your project(s) have one or more simulations that are ready to solve. This includes a
model for each simulation, and mesh and solver option settings. Job distribution meshes
models for you.
• If you plan to solve with a remote Windows computer:
o Your login must have permission to log into a Windows computer that you plan to
use.
o You have copied your project to a network folder that is available to the Windows
computer and your computer. To ensure a complete copy, open your project, then
choose the File > Save Project As menu item.
• You have the required licenses. For license requirements, see “Product Licenses” on
page 344.
Procedure
1. From your computer, open one or more projects that are stored in a shared location (such
as a network folder).
2. In Project Browser, right-click a simulation or project (to solve all of its simulations),
then choose the Solve > Distributed Solve menu item.

HyperLynx® Advanced Solvers User Guide, VX.2.10 387

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With Local Mode — Windows

The Distributed Solve dialog box opens. Refer to tooltips for detailed information for
dialog box options.
3. On the Options tab, specify the number of frequencies, number of ports-per-frequency,
and number of simulations (if your project contains more than one simulation) that you
want to solve in parallel.

Restriction
When you “Solve with PSH” to run a solve on a remote Windows computer, the
software supports a value of 1 for the following options: Parallel Frequency Jobs per
Simulation, Parallel Port Jobs per Freq, Parallel Simulations.

If needed, specify scheduler, simulator, and submit options.

To see available scheduler and simulator options, run the following shell command from
the command prompt:
\MentorGraphics\<release>\SDD_HOME\Nimbic\bin\hlasConsole -h

4. In the Clusters table, select a Local Mode cluster.

5. Click Apply.
6. If you have opened multiple projects, click the Projects tab, enable the projects to solve,
then click Apply.
7. (Optional) If you want solve with the same computer that you used to open the
project(s), click Solve.
Solving begins and this procedure has no more steps for you to perform.
8. If you want to solve with a remote Windows computer:
a. Click the SSH tab.
b. Specify the simulator path to the folder on the remote computer that contains the
hlasConsole.exe executable file.
For example C:/MentorGraphics/<release>/SDD_HOME/Nimbic/bin.
c. Specify a remote Windows computer to run solves:
i. If you need to add a Windows computer, next to the Available Hosts field, click
Add Host, specify a Windows computer name, then click OK
ii. In the Available Hosts field, select the remote Windows computer that you want
to use.
d. Next to the Path Mapping field, click Add, then specify the local path (valid for your
computer) that contains the project(s) (.phys files) that you want to solve. Next,
specify a remote path (valid for the remote Windows computer) to a folder where the
software can write temporary files.

388 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Solving With Local Mode — Windows

Here is an example path pair:

Local Windows Path Remote Windows Path
X:/MentorGraphics/<release>/ C:/Users/<user name>/Documents
SDD_HOME/Nimbic/examples
Where you have mapped drive X: to a
network folder.

Note
If you specify a path with a backward slash character (\), the software
automatically changes it to a forward slash character (/).

e. In the Bash Initialization Commands field, use PowerShell script commands to set
the path to the license servers. For example:
$env:MGLS_LICENSE_FILE=’<port>@<server>.<your_company>.com’
$env:SALT_LICENSE_SERVER=’<port>@<server>.<your_company>.com’

f. Click Apply.
g. Click the Advanced tab, then in the Cluster Simulator Options tab, edit the simulator
executable name to remove the .sh extension from “hlasConsole.sh”.

HyperLynx® Advanced Solvers User Guide, VX.2.10 389

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Solving With Local Mode — Windows

h. Click Solve via PSH.

Results
The software produces plots that show return loss, insertion loss, and so on. See “Viewing a Plot
or Table” on page 239.

390 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Script Operation

Script Operation
You can run a script to run jobs with job distribution.

Topic Description
Prerequisites for Running Scripts Ensure that you meet prerequisites before you run
job distribution with a script.
Script Examples and Options You can create a self-contained script that contains
a Python command, a project location, and option
settings. Alternatively, you can create a script that
contains a Python command and the location of an
options file (that contains a project location and
option settings).
Job Operations You can see job status, end a running job, and
perform other tasks.

Prerequisites for Running Scripts

Ensure that you meet prerequisites before you run job distribution with a script.

General
• You have specified a license location:
o Linux — You have set the MGLS_LICENSE_FILE and the
SALT_LICENSE_SERVER environment variables either in your shell environment
or script. If a script does not set these environment variables, job distribution uses
the value from the shell environment.
o Windows — You have set the MGLS_LICENSE_FILE and the
SALT_LICENSE_SERVER environment variables in a script.

Note
Do not specify license information with the LM_LICENSE_FILE environment
variable.

• You have the required licenses for job distribution workers and the solver. Each job
distribution worker actively solving consumes an nbsecinstances license atomic. For
solver license requirements, see “Product Licenses” on page 344.
• You have installed HyperLynx Advanced Solvers software and stored project files at
network locations that are accessible to the job distribution cluster.

HyperLynx® Advanced Solvers User Guide, VX.2.10 391

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Prerequisites for Running Scripts

LSF
On a Linux computer with IBM Platform LSF (load sharing facility) software:

• You have sourced an LSF configuration file from your shell environment. Contact your
LSF administrator to obtain a configuration file that supports the type of shell you use.
• You run job distribution scripts from this computer.

SGE
You have sourced an SGE configuration file from your shell environment. Contact your SGE
administrator to obtain a configuration file that supports the type of shell you use.

Windows HPC
On the head computer for a Windows HPC cluster:

• You have an account with administrator privileges and use it to log in.
• You have opened the HPC Cluster Manager and saved your password when prompted.
• You run job distribution scripts from this computer.

392 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Script Examples and Options

Script Examples and Options

You can create a self-contained script that contains a Python command, a project location, and
option settings. Alternatively, you can create a script that contains a Python command and the
location of an options file (that contains a project location and option settings).
Note
For examples in this section, replace the contents enclosed by angle brackets with values
specific to your environment and project.

Topic Description
Example Scripts - LSF You can run a self-contained script to run a
solve with LSF.
Example Scripts - SGE You can run a self-contained script to run a
solve with Univa® Grid Engine®. Previous
names for this type of cluster are Sun™ Grid
Engine (SGE) and Oracle® Grid Engine.
Example Script - Windows HPC You can run a self-contained script to run a
solve with Windows HPC.
Example Scripts That Use an Options File You can run a script that contains a Python
command and the location of a file (that
contains a project location and option settings).
Descriptions for Script Options You can see descriptions for all script options
by running a command in a shell. You can see
descriptions for a subset of common and
advanced options in this topic.

Example Scripts - LSF

You can run a self-contained script to run a solve with LSF.
Scripts running on a Linux computer inherit license location information from the
MGLS_LICENSE_FILE and the SALT_LICENSE_SERVER environment variables from the
shell environment. Example scripts in this section assume that your shell environment defines
these environment variables.

Note
Option names and values are case-sensitive on Linux. For example, -sim will work and -sIM
will not.

HyperLynx® Advanced Solvers User Guide, VX.2.10 393

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Script Examples and Options

C Shell
#!/bin/csh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.lsf.submit \
<absolute_path_to_project>/<name>.phys \
-tool "<tool>" \
-scheduler \
maxcpu=1 \
freqclustersize=2 \
rhsclustersize=2 \
-simulator \
maxcpu=2

Bash Shell
#!/bin/sh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.lsf.submit \
<absolute_path_to_project>/<name>.phys \
-tool "<tool>" \
-scheduler \
maxcpu=1 \
freqclustersize=2 \
rhsclustersize=2 \
-simulator \
maxcpu=2

Related Topics
Descriptions for Script Options

Example Scripts - SGE

You can run a self-contained script to run a solve with Univa® Grid Engine®. Previous names
for this type of cluster are Sun™ Grid Engine (SGE) and Oracle® Grid Engine.
Scripts running on a Linux computer inherit license location information from the
MGLS_LICENSE_FILE and the SALT_LICENSE_SERVER environment variables from the
shell environment. Example scripts in this section assume that your shell environment has
defined these environment variables.

Note
Option names and values are case-sensitive on Linux. For example, -sim will work and -sIM
will not.

394 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Script Examples and Options

C Shell
#!/bin/csh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.sge.submit \
<absolute_path_to_project>/<name>.phys \
-tool "<name>" \
-submit-common \
l=arch=lx-amd64 \
l=os=redhat7.5 \
-scheduler \
maxcpu=1 \
freqclustersize=2 \
rhsclustersize=2 \
-simulator \
maxcpu=2

Bash Shell
#!/bin/sh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.sge.submit \
<absolute_path_to_project>/<name>.phys \
-tool "<name>" \
-submit-common \
l=arch=lx-amd64 \
l=os=redhat7.5 \
-scheduler \
maxcpu=1 \
freqclustersize=2 \
rhsclustersize=2 \
-simulator \
maxcpu=2

Related Topics
Descriptions for Script Options

Example Script - Windows HPC

You can run a self-contained script to run a solve with Windows HPC.
You specify the MGLS_LICENSE_FILE and SALT_LICENSE SERVER in a Windows HPC
script. Scripts running on a Windows computer do not inherit license location information from
the environment variables from either the Windows PowerShell or Command Prompt
environment.

HyperLynx® Advanced Solvers User Guide, VX.2.10 395

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Script Examples and Options

start "<job_name>" ^
<absolute_path>\MentorGraphics\HLVX<release>\SDD_HOME\Scripting\
python.exe ^
-m hlcluster.xcluster.winhpc.submit %* ^
<absolute_path_to_project>\<name>.phys ^
-tool "<tool>" ^
-submit-common ^
env:MGLS_LICENSE_FILE:<port>@<license_file>;SALT_LICENSE_FILE:<port>@<lic
ense_file>
-scheduler ^
maxcpu=1 ^
freqclustersize=2 ^
rhsclustersize=2 ^
-simulator ^
maxcpu=2

Related Topics
Descriptions for Script Options

Example Scripts That Use an Options File

You can run a script that contains a Python command and the location of a file (that contains a
project location and option settings).

LSF - Bash Shell

#!/bin/sh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.lsf.submit \
"@<absolute_path>/<options_file>"

SGE - Bash Shell

#!/bin/sh
<absolute_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.sge.submit \
"@<absolute_path>/<options_file>"

Windows HPC - Windows PowerShell or Command Prompt

<absolute_path>\MentorGraphics\HLVX<release>\SDD_HOME\Scripting\python ^
-m hlcluster.xcluster.winhpc.submit ^
"@<absolute_path>\<options_file>"

Option File Syntax Requirements

• Every option and option value must be on its own line and start at the beginning of the
line.
• Do not enclose option values with double-quotes or single-quotes.

396 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Script Examples and Options

• An options file does not support comments.

Note
To ensure that an options file contains the correct newline character, create an options file
with a computer running the same platform (Linux, Windows) that you plan to use to run a
script.

Example Option File - Linux

Scripts running on a Linux computer inherit license information from the
MGLS_LICENSE_FILE and SALT_LICENSE_SERVER environment variables from the shell
environment. The example options file in this section assumes that your shell environment
defines these environment variable.

<absolute_path_to_project>/<name>.phys
-tool
<name>
-scheduler
maxcpu=1
freqclustersize=2
rhsclustersize=2
-simulator
maxcpu=2

Example Option File - Windows

You specify the MGLS_LICENSE_FILE and the SALT_LICENSE_SERVER environment
variables in a Windows options file. Scripts running on a Windows computer do not inherit
license information from the environment variables from either the Windows PowerShell or
Command Prompt environment.

<absolute_path_to_project>\<name>.phys
-tool
<name>
-submit-common
env:MGLS_LICENSE_FILE:<port>@<license_server>;SALT_LICENSE_FILE:<port>@<l
icense_server>
-scheduler
maxcpu=1
freqclustersize=2
rhsclustersize=2
-simulator
maxcpu=2

Related Topics
Descriptions for Script Options

HyperLynx® Advanced Solvers User Guide, VX.2.10 397

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Script Examples and Options

Descriptions for Script Options

You can see descriptions for all script options by running a command in a shell. You can see
descriptions for a subset of common and advanced options in this topic.
Self-contained scripts and scripts that specify an options file support the same set of options.

Descriptions for All Options

To see descriptions for all options, run a command:

• Linux shell:
<full_path>/MentorGraphics/HLVX<release>/SDD_HOME/Scripting/bin/
python \
-m hlcluster.xcluster.<cluster_type>.submit -h

• Windows PowerShell or Command Prompt:

<full_path>\MentorGraphics\HLVX<release>\SDD_HOME\Scripting\python
^
-m hlcluster.xcluster.<cluster_type>.submit -h

Where <cluster_type> is lsf, sge, or winhpc.

Descriptions for Common Options

This section describes commonly-used options.

Note
Option names and values are case-sensitive on Linux. For example, -sim will work and -sIM
will not.

• -submit-common env <<value1>;<value2>>

Defines two or more environment variable name and value pairs.
Use “-submit-common env” to define the mgls_license_file and salt_license_server
environment variables. For example:
-submit-common
env:MGLS_LICENSE_FILE:<port>@<license_server>;
SALT_LICENSE_FILE:<port>@<license_server>

• -pingurl
Ends all job distribution processes started by a script when a lead/scheduler or worker
computer becomes unavailable. A cluster computer can become unavailable when it
shuts down or connects to an unreliable or mis-configured network.
• -scheduler <option>

398 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Script Examples and Options

Specifies options for the job distribution lead/scheduler computer.

Example <option> values:
o maxcpu=<number>
Specifies the maximum number of threads for each lead/scheduler computer. If you
omit this option, the software uses two logical processors for each lead/scheduler
computer.
o freqclustersize=<numberF> and rhsclustersize=<numberR>
Specifies the number of workers, resulting by multiplying the number of frequencies
(freqclustersize) and ports (rhsclustersize) that you want to solve in parallel.
• -sim <name>
Specifies whether to solve a named simulation or solve all simulations in a project.

Note
If you omit -sim, the software solves all simulations in project.

Example <name> values:

o Name of the simulation — To solve only that simulation.
o * — To solve all simulations in the project.
• -simulator <option>
Specifies options for a worker computer.
Example <option> values:
o maxcpu=<number>
Specifies the maximum number of threads for each worker. If you omit this option,
the software uses two logical processors for each worker.
• -tool “<name>”
Specifies the HyperLynx Advanced Solver tool to use for solving.
Example <name> (with dashes or spaces) values:
o Full-Wave Solver HPC
VX.2.4 and older versions of scripting referred to this tool as nWave.
o Full-Wave Solver
VX.2.4 and older versions of scripting referred to this tool as nWaveLT.
o Fast 3D Solver

HyperLynx® Advanced Solvers User Guide, VX.2.10 399

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Job Operations

VX.2.4 and older versions of scripting referred to this tool as nApex.

o Hybrid Solver
VX.2.4 and older versions of scripting referred to this tool as nSys.

Descriptions for Pass-Through Options

This section describes script options that enable you to pass cluster-specific options to scheduler
and worker computers in a cluster. Example applications include specifying a job run time limit,
scheduler or worker computer names, memory allocation, and so on. Refer to the
documentation provided by your job distribution vendor for cluster-specific option definitions
and syntax.

Descriptions
• -submit-common <option>
<option> is a cluster-specific option that you want both scheduler and worker computers
to use.
• -submit-scheduler <option>
<option> is a cluster-specific option that you want a scheduler computer to use.
• -submit-simulator <option>
<option> is a cluster-specific option that you want worker computers to use.
Examples
Use these script options to use a scheduler computer named small_machine in:

• An LSF cluster:
-submit-scheduler m=small_machine
• A Microsoft HPC cluster:
-submit-scheduler requestednodes=small_machine

Job Operations
You can see job status, end a running job, and perform other tasks.
Note
For detailed reference information, see documentation provided by the cluster vendor.

400 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Job Operations

LSF

If you want to see... Use this shell command...

Status for a specific job bjobs -l <jobid>
Status for all jobs for a specific user bjobs -u <username>
Status for all running jobs for all users bjobs
Status for all running and completed jobs for all users bjobs -a
Contents of stdout and stderr output channels for a running bpeek <jobid>
job
Detailed status for a queue bqueues -l <queue_name>
Detailed status for a specific job bacct -l <jobid>
Note: This command may not work on some systems.

If you want to... Use this shell command...

Kill a job by its number bkill <jobid>
Kill all jobs for a specific user bkill -u <username> 0

SGE

If you want to see... Use this shell command...

Detailed status for a specific job qstat -j <jobid>
Status for all jobs for a specific user qstat -u <username>

If you want to... Use this shell command...

Delete a job by its number qdel <jobid>
Delete all jobs for a specific user qdel -u <username>

Windows HPC
You can use HPC Job Manager to see job status and cancel jobs.

HyperLynx® Advanced Solvers User Guide, VX.2.10 401

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Supporting Information for Job Distribution

Supporting Information for Job Distribution

Job distribution involves tasks and technical concepts that sometimes require additional
explanation. Refer to this information as needed.

Topic Description
Creating a Cluster - HyperLynx or You can set up a cluster to make machines available to
LSF job distribution based on HyperLynx or LSF
technologies.
Creating a Cluster - AWS You can create a job distribution cluster that uses
machines hosted by Amazon Web Services (AWS). Job
distribution supports clusters that are implemented as a
Virtual Private Cloud (VPC).
Configuring a Machine for a You set up a machine to make it available to a cluster.
HyperLynx or LSF Cluster
Configuring Your Computer to You can enable your computer to access an Amazon
Access an AWS VPC Virtual Private Cloud (VPC) that is hosted by Amazon
Web Services (AWS).
Creating a Secure Shell (SSH) Job distribution uses a secure shell (SSH) private key to
Private Key provide your login password to a worker machine
running Linux.
Creating a Directory Mapping File When a cluster leader runs Windows and LSF worker
for LSF machines run Linux, it requires a directory mapping file
to translate directory names (between Windows and
Linux) for project data on the network.
Machine Configuration Load sharing facility (LSF) requires a machine to support
Requirements for LSF a set of configuration requirements.
Machine Configuration HyperLynx job distribution requires each machine to
Requirements for HyperLynx Job support a set of configuration requirements.
Distribution
Opening the HyperLynx Job There are several ways to open the HyperLynx Job
Distribution Dialog Box Distribution dialog box.
Terminology for Job Distribution Understanding a few key terms can help you understand
the product GUI and documentation.

Creating a Cluster - HyperLynx or LSF

You can set up a cluster to make machines available to job distribution based on HyperLynx or
LSF technologies.

402 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Creating a Cluster - HyperLynx or LSF

Prerequisites
• You have configured machines to work with a job distribution cluster. See “Configuring
a Machine for a HyperLynx or LSF Cluster” on page 406.
• You know the system name for each machine you want add to a cluster.
• If a machine that you add to a cluster has multiple NUMA nodes and you want to ensure
that job distribution runs on more than one of them, see “Multiple Solve Example -
Solve With Job Distribution” on page 337.
Procedure
1. Open the HyperLynx Job Distribution dialog box. See “Opening the HyperLynx Job
Distribution Dialog Box” on page 414.
2. Click the Clusters tab. Notice the left and right sections.
3. To create a cluster:
a. In the left section, click +ADD. The “Adding item” dialog box opens.
b. Type a cluster name.
c. Select a cluster type:

If you want to run cluster technology Do the following...

provided by...
HyperLynx Select Job Distribution.
IBM Platform LSF Select LSF.

d. Save a cluster:

If you want to... Do the following...

Save a cluster and specify Click ADD ITEM.
another
Save a cluster and close the Click ADD ITEM AND CLOSE.
dialog box

4. To add a machine to a cluster:

a. In the left section, select a cluster.
b. In the right section, click +ADD, The “Adding item” dialog box opens.
c. Select a machine, then type the maximum number of logical processors that you
want to make available to job distribution.

HyperLynx® Advanced Solvers User Guide, VX.2.10 403

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Creating a Cluster - HyperLynx or LSF

If you share a machine with a co-worker, you can reduce the number of available
logical processors to make that machine more responsive.
d. (Optional) If a machine has two or more non-uniform memory access (NUMA)
nodes, use the NUMA Nodes field to specify which NUMA nodes are available to
run jobs:

If you want to... Do this...

Manually specify available Select NUMA node(s).
NUMA nodes A selected NUMA node has a gray
background.
Have the operating system specify Deselect all NUMA nodes.
available NUMA nodes

e. Add a machine one or more times to a cluster:

If you want to... Do the following...

Add a machine and specify Click ADD ITEM.
another
Add a machine and close the Click ADD ITEM AND CLOSE.
dialog box

5. To specify the cluster leader, in the right section, select a machine from the “Cluster
leader” list.

Note
A cluster leader manages jobs and does not run solving jobs.

6. To start a cluster, in the left section, click Start Cluster .

7. Click TEST CLUSTER to verify that all machines are running and the cluster is
ready to use.
8. To save cluster information to a file that you or others can later import, click EXPORT
CLUSTER INFO and specify a file location.
Results
You are ready solve a project with job distribution. See “Solving With HyperLynx Job
Distribution” on page 382.
If the cluster leader reboots or you log off from it, stop and restart the cluster when you log back
in.
Stop a cluster to add, remove, or disable machines. You can then restart the cluster.

404 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Creating a Cluster - AWS

You can disable a machine to temporarily make it unavailable to the cluster. You may want to
disable a machine to make it available for other work. To disable a machine, add a check mark
to the Disabled column.

Creating a Cluster - AWS

You can create a job distribution cluster that uses machines hosted by Amazon Web Services
(AWS). Job distribution supports clusters that are implemented as a Virtual Private Cloud
(VPC).
Restrictions and Limitations
• Your computer must remain awake and connected to the network while job distribution
runs on a VPC cluster.
Prerequisites
• You have enabled your computer to access an AWS VPC. See “Configuring Your
Computer to Access an AWS VPC” on page 409.
Procedure
1. Open the HyperLynx Job Distribution dialog box. See “Opening the HyperLynx Job
Distribution Dialog Box” on page 414.
2. Click the Clusters tab. Notice the left and right sections.
3. To create a cluster:
a. In the left section, click +ADD. The “Adding item” dialog box opens.
b. Type a cluster name.
c. Select the AWS cluster type.
d. Save a cluster:

If you want to... Do the following...

Save a cluster and specify another Click ADD ITEM.
Save a cluster and close the dialog box Click ADD ITEM AND CLOSE.

The Define AWS Cluster dialog box opens.

4. To add machines to a cluster:
a. Specify the number of machines.
b. In the left-side table, click a row for the machine instance type you want to use.
c. In the right-side table, click a row for the machine model you want to use.

HyperLynx® Advanced Solvers User Guide, VX.2.10 405

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Configuring a Machine for a HyperLynx or LSF Cluster

d. Click OK to create the cluster.

e. Click OK to return to the HyperLynx Job Distribution dialog box.

5. To start a cluster, in the left section, click Start Cluster . It may take a minute or
more for a cluster to start.
The software automatically adds a machine to serve as cluster leader. A cluster leader
manages jobs, but does not perform jobs.

Note
A running cluster incurs fees until you stop it.
After 60 minutes of inactivity, the software automatically stops a cluster.

6. To save cluster information to a file that you or others can later import, click EXPORT
CLUSTER INFO, then specify a file location.
Results
You are ready solve a project with job distribution. See “Solving With AWS Job Distribution”
on page 379.

Configuring a Machine for a HyperLynx or LSF

Cluster
You set up a machine to make it available to a cluster.
Restrictions and Limitations
• Use your local machine to run the job distribution GUI.
• Job distribution does not use an MGLS_LICENSE_FILE or
SALT_LICENSE_SERVER value that you set with the operating system.
Prerequisites
• Use machines that meet configuration requirements. See “Machine Configuration
Requirements for HyperLynx Job Distribution” on page 414.
If you use a machine that belongs to a cluster running LSF, it must meet additional
requirements. See “Machine Configuration Requirements for LSF” on page 413.
• You know the system name for a machine.
For a machine running Windows, you can verify its system name by entering the
following command in a PowerShell window:
Invoke-Command ComputerName <system name> -ScriptBlock {echo hello}

406 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Configuring a Machine for a HyperLynx or LSF Cluster

If the command displays “hello”, job distribution can use the system name.
If the command does not display “hello”, you may have to remove or add domain
information. For example, if “test-system.company-name.com” fails, try “test-system”.
• You know the Scripting folder path.
Examples:
o Windows — C:\MentorGraphics\<release\SDD_HOME\Scripting
o Linux — <path>/MentorGraphics/<release\SDD_HOME/Scripting
• For a machine running Linux, you have created a secure shell (SSH) private key file and
know its location. See “Creating a Secure Shell (SSH) Private Key” on page 411.
• You know the location of the license server or file.
Procedure
1. Open the HyperLynx Job Distribution tool. See “Opening the HyperLynx Job
Distribution Dialog Box” on page 414.
2. Click the Machines tab.
3. (Optional) Define global, Linux, or Windows default settings:

If you want to define Do the following...

defaults for machines
running...
Linux and Windows 1. In the Machines section, select “Global attributes”.
2. In the “Global attributes” section, type default settings.
Linux 1. In the Machines section, select “Linux attributes”.
2. In the “Linux attributes” section, type default settings.
Usage examples:
• Define the MGLS_LICENSE_FILE and
SALT_LICENSE_SERVER environment variables
for all Linux machines. For syntax information, see
step 9.
• Define an SSH private key file location for all Linux
machines.
Windows 1. In the Machines section, select “Windows attributes”.
2. In the “Windows attributes” section, type default
settings.
Usage example: Define the MGLS_LICENSE_FILE
and SALT_LICENSE_SERVER environment
variables for all Windows machines. For syntax
information, see step 9.

HyperLynx® Advanced Solvers User Guide, VX.2.10 407

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Configuring a Machine for a HyperLynx or LSF Cluster

4. To add a machine:
a. Click +ADD. The Adding item dialog box opens.
b. In the Host field, type the system name.
c. From the OS list, select an operating system.
d. Save a machine:

If you want to... Do the following...

Save a machine and specify Click ADD ITEM.
another
Save a machine and close the Click ADD ITEM AND CLOSE.
dialog box

5. (Linux) To specify a username that is different than the username you are currently
using for your local machine, in the Username field, type the username.
6. (Linux) In the Private Key Field, specify the location of your SSH private key file.
7. (Optional) If a machine has two or more non-uniform memory access (NUMA) nodes,
use the NUMA Node Count field to specify the number of NUMA nodes that are
available to run jobs:

If you want to... Do this...

Manually specify a number Type a number.
Have the operating system Leave the field blank.
identify a number

For information about NUMA node terminology, see “Engine Option Terminology” on
page 336.
8. In the Adv Solver Scripting Path row, double-click the Value field, then specify the
location of the HyperLynx Scripting folder:
Examples:
• Linux — <path>/MentorGraphics/<release\SDD_HOME/Scripting
• Windows — C:\MentorGraphics\<release\SDD_HOME\Scripting

408 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Configuring Your Computer to Access an AWS VPC

Note
You can use either forward or backward slashes.
The software interprets C:\MentorGraphics\<release\SDD_HOME\Scripting the
same as C:/MentorGraphics/<release/SDD_HOME/Scripting. If you type backward
slashes, the software changes them to forward slashes when you save changes.

9. In the Environment Variables row, double-click the Value field, then add the following:
“MGLS_LICENSE_FILE=<license>:SALT_LICENSE_FILE=<license>”
<license> can specify either:
• <port>@<license server name>
• <file path>
When the environment variable contains two or more items, separate them with a colon
character (Linux) or a semicolon character (Windows).
10. To enable a machine that belongs to an LSF cluster:
a. Check LSF Host.
b. If needed, in the “Linux LSF bash script” field, type a shell command that sources a
file that defines the LSF operating environment.
For example:
source /home/userid_1/configfiles/profile.lsf

11. Click SAVE ATTRIBUTES.

12. In the HyperLynx Job Distribution dialog box, click TEST MACHINE.
Results
You can now add machines to a cluster. See “Creating a Cluster - HyperLynx or LSF” on
page 402.

Configuring Your Computer to Access an AWS VPC

You can enable your computer to access an Amazon Virtual Private Cloud (VPC) that is hosted
by Amazon Web Services (AWS).
Note
The software supports a VPC with multiple users, but this topic describes a VPC with only
one user.

HyperLynx® Advanced Solvers User Guide, VX.2.10 409

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Configuring Your Computer to Access an AWS VPC

Prerequisites
• You have an AWS account with the following permissions:
o AWS CloudFormation™
o Elastic IP (EIP)
o Amazon Elastic Compute Cloud ™(Amazon EC2™)
• You know the following credentials for your AWS account:
o Access key ID
o Secret access key
• You have submitted a service request with Siemens EDA customer support to associate
your “Access key ID” with a supported Amazon Machine Image (AMI). For
information, see KB article MG611799 on Support Center.
Procedure
1. On the Windows task bar, right-click the Job Distribution Monitor icon, then choose
the Save AWS Credential menu item. The AWS Job Distribution Settings dialog box
opens.

Note
On a computer running Linux, the Job Distribution Monitor icon appears on a
system tray or tool bar.

If you do not see this task bar icon, the Job Distribution Monitor may have automatically
closed. You can start the monitor by opening the Job Distribution dialog box, then
closing it. See “Opening the HyperLynx Job Distribution Dialog Box” on page 414.
2. On the Credential tab, enter your information in the Access Key ID and Secret Access
Key fields, click Save, then click Verify Credential.
3. On the Firewall tab:
a. Use the default pair of port numbers unless your network administrator wants you to
use a specific pair of port numbers that can exchange HTTP traffic.
b. Click Get Public IP, then copy the IP address to the Public IP field.
The software configures the AWS firewall to make your VPC accessible to only this
IP address.
This procedure assumes that your public IP address has permission to contact a
VPC.
c. Click Save.

410 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Creating a Secure Shell (SSH) Private Key

d. If the software prompts you to restart a VPC, click the VPC tab, type the VPC name,
click Delete VPC, then see step 4 to create a VPC.
4. On the VPC tab:
a. Type a name into the VPC Name field. Typically this is your network login name.
b. Verify the software displays the latest AMI ID (in the format of “<release> Latest
AMI”). You normally do not need to select another value unless a Siemens
representative instructs you to do so.
c. Click Create VPC.
d. When the VPC is ready, click OK.
5. Click Close.
Results
You are ready to create a cluster that uses machines in an AWS VPC. See “Creating a Cluster -
AWS” on page 405.
When you install a new HyperLynx release, you will need to configure your computer again.

Creating a Secure Shell (SSH) Private Key

Job distribution uses a secure shell (SSH) private key to provide your login password to a
worker machine running Linux.
Note
If you use the Distributed Solve dialog box, you can use its built-in capability to create an
SSH key. See “Solving With LSF Job Distribution” on page 376 and “Solving With Local
Mode — Linux” on page 384.

Prerequisites
• Your Windows and Linux machines are on the same network.
• You have login permissions to the remote Linux machine.

HyperLynx® Advanced Solvers User Guide, VX.2.10 411

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Creating a Directory Mapping File for LSF

Procedure
1. Open the Generate SSH Key Pair dialog box using one of the following methods:

If you want Do the following...

to...
Open the In the Windows system tray, right-click the Job Distribution Monitor icon
dialog box and choose the Generate SSH Keys menu item.
using Note: If the icon does not appear in the tray, you may have to open the
Windows Job Distribution tool first. See “Opening the HyperLynx Job
functions Distribution Dialog Box” on page 414.
Open the Type the following in Windows:
dialog box C:\MentorGraphics\<version>\SDD_HOME\Nimbic\bin\
from a hlclustermonitor.exe keygen
command line
Or type the following in Linux:
./<version>/SDD_HOME/Nimbic/bin/hlclustermonitor keygen

2. In the Generate SSH Key Pair dialog box, type the name of the remote Linux worker in
the Host Name box.
3. Click Generate Key Pair.
When the software completes the key generation process, the SSH Key Path box
displays the file path to the private key.
4. Click OK.
5. Copy your private and public key files to a network location that your Linux worker
machines can access.

Creating a Directory Mapping File for LSF

When a cluster leader runs Windows and LSF worker machines run Linux, it requires a
directory mapping file to translate directory names (between Windows and Linux) for project
data on the network.
The directory names represent an entry point and you use the Job Distribution tool to specify the
full path. For example, you may specify an entry point of \\home\ProjectDataA\ with a directory
mapping file and a full path to the project file (PHYS) of \\home\ProjectDataA\project8\
test3.phys\.

The mapping file syntax is:

<machine_name>:
<any_name>: <path>/

412 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Machine Configuration Requirements for LSF

Note
The file requires forward slashes and each path must end with a forward slash.

For example, when a Windows cluster leader maps the T:\ drive to \\home\ProjectDataA:

Windows-Lead-Computer:
Path1: T:/

Linux-LSF-Computer-1:
Path1: /home/ProjectDataA/

Linux-LSF-Computer-2:
Path1: /home/ProjectDataA/

Procedure
1. Sign into your Windows cluster leader.
2. Open, as Administrator, a Command Prompt window or a Windows PowerShell
window.
3. Change the directory to \MentorGraphics\<release>\SDD_HOME\Scripting\.
4. Enter the following Windows command to create a default file:
python -m hlcluster.utils.directorymapping -init

A text editor automatically opens the directorymapping.py file.

5. If needed, add directory mapping information for additional machines and project data
locations.
Results
The command stores the file at \MentorGraphics\<release>\SDD_HOME\Scripting\Lib\
site-packages\hlcluster\config\directorymapping.py. Keep the file in this location.

Machine Configuration Requirements for LSF

Load sharing facility (LSF) requires a machine to support a set of configuration requirements.
• A machine that belongs to an LSF cluster and runs jobs:
o Runs Linux.
o Is licensed to run IBM Platform LSF.
o Has been configured to run with an LSF cluster.
o May need a profile.lsf file to specify the LSF operating environment. A person who
supports your LSF cluster can provide this file.

HyperLynx® Advanced Solvers User Guide, VX.2.10 413

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Machine Configuration Requirements for HyperLynx Job Distribution

• A cluster leader, which distributes jobs and collects results:

o Can run Windows or Linux.
o If it runs Windows, it has access to a directory mapping file that identifies the folder
root location for project data (PHYS files) to run. For information about creating a
directory mapping file, see “Creating a Directory Mapping File for LSF” on
page 412.

Machine Configuration Requirements for

HyperLynx Job Distribution
HyperLynx job distribution requires each machine to support a set of configuration
requirements.
• You can log into the machine.
• The machine belongs to a network domain.
• Machines are on the same network and can communicate with each other using HTTP or
ping commands.
• You have set up the machine to stay running during long periods of inactivity.
• (Linux) You need Red Hat 7 to use the job distribution GUI.
• (Windows) The WinRM services are running. To start or verify this service, log into the
machine, open (as Administrator) a PowerShell window, then enter the following
command:
winrm quickconfig

• You have installed HyperLynx Advanced Solvers software on the machine.

All machines in a cluster must have the same HyperLynx Advanced Solvers release.
(Linux) You can install the application software on one Linux machine and copy the full
\MentorGraphics\<release> folder to a local network location or to other machines in
the cluster.

Opening the HyperLynx Job Distribution Dialog

Box
There are several ways to open the HyperLynx Job Distribution dialog box.

414 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Job Distribution
Terminology for Job Distribution

Procedure
Open the dialog box:

If you want to open the dialog Do the following...

box...
From a HyperLynx Advanced 1. Open a Project.
Solver tool 2. From Project Browser, right-click a simulation or project,
then choose the Solve > Solve from Job Distribution UI
menu item.
(Windows) Directly 1. From the Windows Start menu, choose the HyperLynx
<release> > HyperLynx Adv Solvers <release> menu
item.
2. From the HyperLynx Advanced Solvers dialog box, select
a license type, select Job Distribution, then click OK.
Or
1. Open, as Administrator, a Command Prompt window or a
Windows PowerShell window.
2. Enter the following command:
...\MentorGraphics\<release>\SDD_HOME\
Scripting\python -m hlclustergui
(Linux) Directly 1. Enter the following Linux command:
.../MentorGraphics/<release>/SDD_HOME/Nimbic/
bin/hlas

2. From the HyperLynx Advanced Solvers dialog box, select

a license type, select Job Distribution, then click OK.

Terminology for Job Distribution

Understanding a few key terms can help you understand the product GUI and documentation.

Term or Phrase Definition

Cluster A group of machines that can run jobs, and consists of a cluster
leader and workers. A cluster requires a network that includes a
domain controller. A cluster can include both Windows and
Linux machines.
Cluster leader A machine that manages job distribution, but does not run jobs.
Machine Another word for computer.
Worker A machine that can run jobs.

HyperLynx® Advanced Solvers User Guide, VX.2.10 415

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Job Distribution
Terminology for Job Distribution

Term or Phrase Definition

Your computer A machine that runs the job distribution GUI or starts a job
distribution script.
This also known as a “local computer”, to distinguish it from
machines that belong to a cluster.

416 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Appendix 12
Technology (TECH) File Format

The Technology (.tech) File is an ASCII file organized in a hierarchical format similar to other
XML files. The content of the file is described using the example below.

Topic Description
Stackup Section Format This is the primary level of data.
Layers Section Format The Layers section consists of several Layers.
The section follows the format below:
Materials Section Format The Materials section consists of several
Materials. The section follows the format
below:
Bond Wires Section Format The Bond Wire Parameters section consists of
several Bond Wire Parameters. The section
follows the format below:
Solder Balls Section Format The Solder Ball Parameters section consists of
several Solder Ball Parameters. The section
follows the format below:
Solder Bumps Section Format The Solder Bump Parameters section consists
of several Solder Bump Parameters. The
section follows the format below:
Background Section Format The Background section consists of a single
Background Material option. The section
follows the format below:
External Reference Section Format The External Reference section consists of a
single External Reference Option. The section
follows the format below:

Stackup Section Format

This is the primary level of data.
It is broken down into the following tags:

<Stackup>: Begin Main Technology Node

<Header : Principal child node describing the technology header

HyperLynx® Advanced Solvers User Guide, VX.2.10 417

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Technology (TECH) File Format
Layers Section Format

• Name: Name of the technology

• LengthUnit : Mils/Meters/Centimeters/Millimeters/Micrometers
• Flipped : If the structure is upside down
• Version: Technology version – use default software version
• ConductivityUnit : mho/m or mho/cm
• InternalPadsOptional: If the internal pads can be omitted
/> : End Header Description

Between the Stackup Begin and End tags, the Layers, Materials, Bond Wires, Solder Balls,
Solder Bumps, Background, and External Reference tags fill Technology Data.

• </Stackup>: End Main Technology Node

Layers Section Format

The Layers section consists of several Layers. The section follows the format below:
<Layers> : Begin principal child node describing all layers

<Layer : Individual layer description

• Name : Layer Display name

• InternalName: Permanent identifier, can be same as layer name, must be unique
• Type : CONDUCTOR or DIELECTRIC
• CondMaterial : Material name for the conductors in layer
• DielMaterial : Material name for the dielectric fill in layer
• Thickness : Layer thickness (in LengthUnit from Stackup Header)
• Color : R G B value for displaying the layer
/> : End description

[Each additional Layer is added here]

• </Layers> : End all layers description

418 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Technology (TECH) File Format
Materials Section Format

Materials Section Format

The Materials section consists of several Materials. The section follows the format below:
<Materials> : Begin principal child node describing all materials

<Material : Individual material description

• Name : Material name

• Type : CONDUCTOR or DIELECTRIC
• Conductivity (For CONDUCTOR type) : Metal Conductivity
• DielConstant (For DIELECTRIC type) : Dielectric relative permittivity
• LossTangent (For DIELECTRIC type) : Dielectric loss tangent
OR

• Conductivity (For DIELECTRIC type) : Dielectric Conductivity

/> : End description

[Each additional Material is added here]

• </Materials>: End material description

Bond Wires Section Format

The Bond Wire Parameters section consists of several Bond Wire Parameters. The section
follows the format below:
<BondWireParams> : Begin principal child node describing all Bond Wire parameters

<BondWireParam : Individual Bond Wire parameter description

• LayerName : Layer Display name

• InternalLayerName: Permanent identifier, can be same as layer name, must be unique
• Direction: Bond-wire orientation - UP or DOWN
• ModelType : Description – JEDEC4 ( 4 Point ) or JEDEC5 ( 5 Point)
• H1: Loop height
• H2 : Die height
• Diameter : Wire diameter
• Alpha : End angle

HyperLynx® Advanced Solvers User Guide, VX.2.10 419

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Technology (TECH) File Format
Solder Balls Section Format

• Beta : Start angle

• SupportLayer : Starting layer name
• TerminationLayer: Ending layer name ( same as LayerName if none)
• CondMaterial : Material
• Color: R G B
• Flipped : If bond-wire is flipped
/> : End description

[Each additional Bond Wire Parameter is added here]

• </BondWireParams> : End all bond-wire parameter description

Solder Balls Section Format

The Solder Ball Parameters section consists of several Solder Ball Parameters. The section
follows the format below:
<SolderBallParams> : Begin principal child node describing all Solder Ball parameters

<SolderBallParam : Individual Solder Ball parameter description

• LayerName: Layer name

• InternalLayerName: Permanent identifier, can be same as layer name, must be unique
• IsCylinder: If modeled as a cylinder
• Height: Solder ball height
• PadSideDia: Start diameter
• CenterDia: Central diameter
• PortSideDia: End diameter
• SupportLayer: Starting layer name
• TerminationLayer: Ending layer name ( same as LayerName if none)
• CondMaterial: Material
• Color: R G B
• Flipped: If solder ball is flipped
/> End description

420 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Technology (TECH) File Format
Solder Bumps Section Format

[Each additional Solder Ball Parameter is added here]

• </SolderBallParams> : End all Solder Ball parameter description

Solder Bumps Section Format

The Solder Bump Parameters section consists of several Solder Bump Parameters. The section
follows the format below:
<SolderBumpParams> : Begin principal child node describing all Solder Bump parameters

• <SolderBumpParam : Individual Solder Bump parameter description

• LayerName: Layer name
• InternalLayerName: Permanent identifier, can be same as layer name, must be unique
• IsCylinder: If modeled as a cylinder
• Height: Solder ball height
• PadSideDia: Start diameter
• CenterDia: Central diameter
• PortSideDia: End diameter
• SupportLayer: Starting layer name
• TerminationLayer: Ending layer name ( same as LayerName if none)
• CondMaterial: Material
• Color: R G B
• Flipped: If solder bump is flipped
/> End description

[Each additional Solder Bump Parameter is added here]

• </SolderBumpParams> End all Solder Bump parameter description

Background Section Format

The Background section consists of a single Background Material option. The section follows
the format below:
<Background> : Begin background description

<BackgroundOptions : Begin background options

HyperLynx® Advanced Solvers User Guide, VX.2.10 421

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Technology (TECH) File Format
External Reference Section Format

• ForceBackground: If background dielectric is forced everywhere

• MaterialName: Background material name
• DielConstant: Background dielectric permittivity
• LossTangent: Background dielectric loss tangent
/> End description

</Background> End background description

External Reference Section Format

The External Reference section consists of a single External Reference Option. The section
follows the format below:
<ExternalReference>: Begin external reference description

<ReferenceOptions : Begin reference options

• PCBPlane: If a plane representing the PCB is present

• PCBPlaneGap: If PCB plane, what is the gap from package bottom
• DIEPlane: If a die-plane is present
• DIEPlaneGap: If die-plane, what is the gap from package top
• BondwireReference: If bond-wires terminate in an external plane
• SolderBallReference: If Solder Balls terminate in an external plane
• SolderBumpReference: If Solder Bumps terminate in an external plane

422 HyperLynx® Advanced Solvers User Guide, VX.2.10

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
 Third-Party Information
Details on open source and third-party software that may be included with this product are available in the
<your_software_installation_location>/legal directory.

Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.
Note - Viewing PDF files within a web browser causes some links not to function. Use HTML for full navigation.