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MC Module Wise Questions

The document contains a series of questions divided into five modules, covering topics related to ARM architecture, including microcontrollers, instruction sets, data processing, exceptions, interrupts, and cache memory. Each module consists of multiple questions that require explanations, diagrams, and examples to illustrate concepts. The questions aim to assess understanding of ARM processor design, programming, and memory management.

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Dhrithi J
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28 views4 pages

MC Module Wise Questions

The document contains a series of questions divided into five modules, covering topics related to ARM architecture, including microcontrollers, instruction sets, data processing, exceptions, interrupts, and cache memory. Each module consists of multiple questions that require explanations, diagrams, and examples to illustrate concepts. The questions aim to assess understanding of ARM processor design, programming, and memory management.

Uploaded by

Dhrithi J
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Module 1 questions

1) Mention the differences between


i) Microcontroller and microprocessor
ii) RISC and CISC
2) Explain the major design rules to implement the RISC philosophy.
3) Discuss the ARM design philosophy.
4) Explain the factors that makes ARM instruction set suitable for
embedded applications.
5) Along with neat diagram of an ARM based embedded device
(Microcontroller), explain the four main hardware components.
6) Discuss ARM bus technology and AMBA bus protocol.
7) Explain ARM core data flow model with a neat diagram.
8) With the help of bit layout diagram explain current program status
register of ARM.

9)Explain the programmer’s model of ARM processors with complete


register sets available.

10)Explain the different processor modes provided by ARM7.

11)What is pipeline in ARM? Illustrate with an example. Show the


pipeline stages of ARM7, ARM9 and ARM10.

12)Briefly describe the concept of exceptions, interrupts and the vector table.

13)Discuss the following with diagram

i) Von Neumann architecture with cache


ii) Harvard architecture with TCMs.
Module 2 questions
1) Explain the different Data processing instructions in ARM.
2) Explain barrel shifter instructions in ARM processor with an
example.
3) Illustrate the different types of branch instructions and write a
program for forward and backward branch by considering an
example.
4) Discuss the load store instructions with respect to:
i) Single Register Transfer
ii) Multiple Register Transfer
5) Explain Swap instruction of ARM processor.
6) Write a note on software interrupt instructions.
7) Discuss in detail the Coprocessor instructions of the ARM with syntax
and example.
8) Explain with examples the following 32-bit instruction of ARM
processor
i) CMN ii) MLA iii) MRS iv) BIC v) LDR
9) Explain the following instructions with syntax and example
i) MOV ii) SWI iii) MSR iv) TST v) STRH
10) Develop an ALP to find the sum of first 10 integer numbers.
11)Develop an ALP to find the largest/smallest number in an array of
32 numbers.
12) Develop an ALP to count the number of ones and Zeros in two
consecutive memory locations.
Module 3 questions

1) Discuss how registers are allocated to optimize the program? Develop


an assembly level program to find the sum of first 10 integer
numbers.
2) How function calling efficiently used by ARM through APCS with an
example program.
3) Explain the following terms with an appropriate example.
i) Pointer Aliasing
ii) Portability issues
4) How compiler handles a “for loop” with variable number of
iterations N and loop Unrolling with an example.
5) Explain the following with example
i) Local variable types
ii) Function Argument Types
iii) Signed versus unsigned types

Module 4 questions

1) With a neat diagram explain ARM processor exceptions and modes.


2) Explain Exception priorities and link register offset.
3) Explain assigning interrupts and interrupt latency.
4) Explain IRQ and FIQ exception, also to enable and disable IRQ and
FIQ interrupts.
5) Briefly explain what happens when an IRQ and FIQ exception is
raised with an ARM processor.
6) List ARM firmware suite features. Explain firmware execution flow
and Red Hat RedBoot.
Module 5 questions

1) Explain the basic architecture of cache memory.


2) Explain process involved in main memory mapping to a cache
memory.
3) Explain with diagram set associative cache. How are efficiency is
measured?
4) Briefly explain cache line replacement policies.
5) Explain the following
i) Write Policy
ii) Allocation Policy on a Cache Miss
iii) Write Buffers
iv) Measuring Cache Efficiency

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