LT1769

Constant-Current/
Constant-Voltage 2A Battery
Charger with Input Current Limiting
U
FEATURES DESCRIPTIO
■ Simple Solution to Charge NiCd, NiMH and Lithium The LT®1769 current mode PWM battery charger is a
Rechargeable Batteries—Charging Current simple, efficient solution to fast charge modern recharge-
Programmed by Resistors or DAC able batteries including lithium-ion (Li-Ion), nickel-metal-
■ Adapter Current Limit Allows Maximum Possible hydride (NiMH) and nickel-cadmium (NiCd) that require
Charging Current During System Use* constant-current and/or constant-voltage charging. The
■ Precision 0.5% Accuracy for Voltage Mode Charging internal switch is capable of delivering 2A** DC current
■ Available in 20-Lead Exposed Pad TSSOP and (3A peak current). Charge current can be programmed by
28-Lead Narrow SSOP Packages resistors or a DAC to within 5%. With 0.5% reference voltage
■ High Efficiency Current Mode PWM with 3A Internal accuracy, the LT1769 meets the critical constant-voltage
Switch charging requirement for Li-Ion cells.
■ 5% Charge Current Accuracy A third control loop is provided to regulate the current
■ Adjustable Undervoltage Lockout drawn from the input AC adapter. This allows simulta-
■ Automatic Shutdown When AC Adapter is Removed neous operation of the equipment and battery charging
■ Low Reverse Battery Drain Current: 3µA without overloading the adapter. Charge current is reduced
■ Current Sensing Can Be at Either Terminal of the Battery to keep the adapter current below specified levels.
■ Charging Current Soft Start
■ Shutdown Control The LT1769 can charge batteries ranging from 1V to 20V.
U Ground sensing of current is not required and the battery’s
APPLICATIO S negative terminal can be tied directly to ground. A saturat-
ing switch running at 200kHz gives high charging effi-
■ Chargers for NiCd, NiMH, Lead-Acid, Lithium ciency and small inductor size. A blocking diode is not
Rechargeable Batteries required between the chip and the battery because the
■ Switching Regulators with Precision Current Limit chip goes into sleep mode and drains only 3µA when the
, LTC and LT are registered trademarks of Linear Technology Corporation.
*US patent number 5,723,970 wall adapter is unplugged.
**See LT1510 for 1.5A charger; see LT1511 for 3A charger

U D3††
R7†
TYPICAL APPLICATIO GND CLP
500Ω
RS4†
SS24
VIN (ADAPTER INPUT)
11V TO 28V
C1 ADAPTER
SW CLN 1µF CURRENT SENSE
C2 TO MAIN
D1†† VCC
0.47µF SYSTEM LOAD
SS24 BOOST
CIN* R5†
L1** 15µF UNDERVOLTAGE
LT1769
22µH LOCKOUT
D2 COMP1 UV
1N4148 R6
2nF PROG
5k
SPIN VC 300Ω
10k RPROG
0.33µF CPROG 4.93k
OVP SENSE BAT
1µF 1%
RS3 RS2
NOTE: COMPLETE LITHIUM-ION CHARGER, 200Ω 200Ω
NO TERMINATION REQUIRED. RS4, R7 1% 1%
AND C1 ARE OPTIONAL FOR IIN LIMITING VBAT
*TOKIN OR UNITED CHEMI-CON/MARCON RS1 R3 + COUT
CERAMIC SURFACE MOUNT 0.05Ω 390k 8.4V
22µF Li-Ion
**22µH SUMIDA CDRH125 BATTERY CURRENT 0.25% TANT
† BATTERY
SEE APPLICATIONS INFORMATION FOR SENSE
INPUT CURRENT LIMIT AND UNDERVOLTAGE LOCKOUT VOLTAGE SENSE 1511 • F01
††
GENERAL SEMICONDUCTOR. FOR TJ LESS THEN 100°C R4
MBRS130LT3 CAN BE USED 162k
0.25%

Figure 1. 2A Lithium-Ion Battery Charger

1769fa

1
LT1769
W W W U
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage Operating Ambient Temperature
(VCC, CLP and CLN Pin Voltage) ......................... 30V Commercial ............................................ 0°C to 70°C
BOOST Pin Voltage with Respect to VCC ................. 25V Industrial ........................................... – 40°C to 85°C
IBAT (Average)........................................................... 2A Storage Temperature Range ................. – 65°C to 150°C
Operating Junction Temperature Range Lead Temperature (Soldering, 10 sec).................. 300°C
Commercial ........................................... 0°C to 125°C
Industrial ......................................... – 40°C to 125°C

U W U
PACKAGE/ORDER INFORMATION
TOP VIEW ORDER PART ORDER PART
GND** 1 28 GND**
NUMBER TOP VIEW
NUMBER
SW 1 20 GND
GND** 2 27 GND**
LT1769CGN BOOST 2 19 VCC1 LT1769CFE
GND** 3 26 GND**
LT1769IGN UV 3 18 VCC2 LT1769IFE
SW 4 25 VCC1*
GND 4 17 VCC3
BOOST 5 24 VCC2*
GND 5 16 PROG
UV 6 23 VCC3*
OVP 6 15 VC
GND** 7 22 GND**
*ALL VCC PINS SHOULD CLN 7 14 GND
GND** 8 21 PROG BE CONNECTED
TOGETHER CLOSE TO CLP 8 13 UVOUT
OVP 9 20 VC THE PINS
** ALL GND PINS ARE COMP1 9 12 BAT
CLP 10 19 UVOUT
FUSED TO INTERNAL DIE SENSE 10 11 SPIN
CLN 11 18 COMP2 ATTACH PADDLE FOR
HEAT SINKING. CONNECT
COMP1 12 17 BAT FE PACKAGE †THE BOTTOM METAL
THESE PINS TO
20-LEAD PLASTIC TSSOP
SENSE 13 16 SPIN EXPANDED PC LANDS PLATE OF THIS PACKAGE
FOR PROPER HEAT TJMAX = 125°C, θJA = 35°C/ W† IS FUSED TO INTERNAL
GND** 14 15 GND** SINKING. 35°C/W GROUND AND IS FOR
EXPOSED PAD IS GROUND
THERMAL RESISTANCE (MUST BE SOLDERED TO PCB) HEAT SINKING. SOLDER
GN PACKAGE ASSUMES AN INTERNAL THE BOTTOM METAL
28-LEAD PLASTIC SSOP GROUND PLANE EXPOSED PAD SIZE: 3.0 × 4.1 PLATE ONTO PCB
DOUBLING AS A HEAT (.188) (.162) GROUND PLANE FOR
TJMAX = 125°C, θJA = 35°C/ W**
SPREADER HEAT SINKING.

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V, RS2 = RS3 = 200Ω (see Block Diagram),
VCLN = VCC. No load on any outputs unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Overall
Supply Current VPROG = 2.7V, VCC ≤ 20V ● 4.5 6.8 mA
VPROG = 2.7V, 20V < VCC ≤ 25V ● 4.6 7.0 mA
Sense Amplifier CA1 Gain and Input Offset Voltage 8V ≤ VCC ≤ 25V , 0V ≤ VBAT ≤ 20V
(With RS2 = 200Ω, RS3 = 200Ω) RPROG = 4.93k ● 93 100 107 mV
(Measured across RS1)(Note 2) RPROG = 49.3k ● 8 10 12 mV
TA < 0°C 7 13 mV
VCC = 28V, VBAT = 20V
RPROG = 4.93k ● 90 110 mV
RPROG = 49.3k ● 7 13 mV
TA < 0°C 6 14 mV
1769fa

2
 LT1769
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V, RS2 = RS3 = 200Ω (see Block Diagram),
VCLN = VCC. No load on any outputs unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Overall
VCC Undervoltage Lockout (Switch OFF) Threshold Measured at UV Pin ● 6 7 8 V
UV Pin Input Current 0.2V ≤ VUV ≤ 8V ● 0.1 5 µA
UV Output Voltage at UVOUT Pin In Undervoltage State, IUVOUT = 70µA ● 0.1 0.5 V
UV Output Leakage Current at UVOUT Pin 8V ≤ VUV, VUVOUT = 5V ● 0.1 3 µA
Reverse Current from Battery (When VCC Is VBAT ≤ 20V, VUV ≤ 0.4V 3 15 µA
Not Connected, VSW Is Floating)
Boost Pin Current VCC = 20V, VBOOST = 0V 0.1 10 µA
VCC = 28V, VBOOST = 0V 0.25 20 µA
2V ≤ VBOOST – VCC < 8V (Switch ON) 6 9 mA
8V ≤ VBOOST – VCC ≤ 25V (Switch ON) 8 12 mA
Switch
Switch ON Resistance 8V ≤ VCC ≤ VMAX, ISW = 2A,
VBOOST – VSW ≥ 2V ● 0.15 0.25 Ω
∆IBOOST/∆ISW During Switch ON VBOOST = 24V, ISW ≤ 2A 25 35 mA/A
Switch OFF Leakage Current VSW = 0V, VCC ≤ 20V ● 2 100 µA
20V < VCC ≤ 28V ● 4 200 µA
Minimum IPROG for Switch ON 2 4 20 µA
Minimum IPROG for Switch OFF ● 1 2.4 mA
Maximum VBAT for Switch ON ● VCC – 2 V
Current Sense Amplifier CA1 Inputs (Sense, BAT)
Input Bias Current ● – 50 – 125 µA
Input Common Mode Low ● – 0.25 V
Input Common Mode High ● VCC – 2 V
SPIN Input Current – 100 – 200 µA
Reference
Reference Voltage (Note 3) RPROG = 4.93k, Measured at OVP with
VA Supplying IPROG and Switch OFF 2.448 2.465 2.477 V
Reference Voltage All Conditions of VCC, TA ≥ 0°C ● 2.441 2.489 V
TA < 0°C (Note 4) ● 2.43 2.489 V
Oscillator
Switching Frequency 180 200 220 kHz
Switching Frequency All Conditions of VCC, TA ≥ 0°C ● 170 200 230 kHz
TA < 0°C ● 160 230 kHz
Maximum Duty Cycle 90 93 %
● 85 %
Current Amplifier CA2
Transconductance VC = 1V, IVC = ±1µA 150 250 550 µmho
Maximum VC for Switch OFF ● 0.6 V
IVC Current (Out of Pin) VC ≥ 0.6V 100 µA
VC < 0.45V 3 mA

1769fa

3
LT1769
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V. No load on any outputs unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Voltage Amplifier VA
Transconductance (Note 3) Output Current from 50µA to 500µA 0.25 0.6 1.3 mho
Output Source Current VOVP = VREF + 10mV, VPROG = VREF + 10mV 1.1 mA
OVP Input Bias Current VA Output Current at 0.5mA ● ±3 ±10 nA
VA Output Current at 0.5mA, TA > 90°C ● –15 25 nA
VA Output Current at 0.5mA, TA < 0°C ±15 nA
Current Limit Amplifier CL1, 8V ≤ Input Common Mode
Turn-On Threshold 0.5mA Output Current 93 100 110 mV
Transconductance Output Current from 50µA to 500µA 0.5 1 2 mho
CLP Input Current 0.5mA Output Current, VUV ≥ 0.4V 0.3 1 µA
CLN Input Current 0.5mA Output Current VUV ≥ 0.4V 0.8 2 mA

Note 1: Absolute Maximum Ratings are those values beyond which the life Note 3: Tested with Test Circuit 2.
of a device may be impaired. Note 4: A linear interpolation can be used for reference voltage
Note 2: Tested with Test Circuit 1. specification between 0°C and – 40°C.

U W
TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency of Figure 1 Circuit ICC vs Duty Cycle ICC vs VCC

100 8 7.0
VIN = 16.5 VCC = 16V MAXIMUM DUTY CYCLE
98 VBAT = 8.4V 7
96 6.5 TJ = 0°C
6
94 TJ = 25°C
EFFICIENCY (%)

92 5 6.0
ICC (mA)

ICC (mA)

CHARGER EFFICIENCY TJ = 0°C

TJ = 125°C TJ = 125°C
90 4
88 TJ = 25°C 5.5
3
86 INCLUDES LOSS 2
84 IN DIODE D3 5.0
82 1

80 0 4.5
0.2 0.6 1.0 1.4 1.8 2.2 0 10 20 30 40 50 60 70 80 0 5 10 15 20 25 30
IBAT (A) DUTY CYCLE (%) VCC (V)
1769 G01 1769 G02 1769 G03

1769fa

4
 LT1769
U W
TYPICAL PERFORMANCE CHARACTERISTICS
VREF Line Regulation IVA vs ∆VOVP (Voltage Amplifier)
0.003 4

0.002
3
0.001
ALL TEMPERATURES

∆VOVP (mV)
∆VREF (V)

0 2
TJ = 125°C
–0.001
1
–0.002 TJ = 25°C

–0.003 0
0 5 10 15 20 25 30 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VCC (V) IVA (mA)
1769 G04 1769 G05

Maximum Duty Cycle VC Pin Characteristics

98 –1.20
–1.08
97
–0.96
96
–0.84
DUTY CYCLE (%)

95 –0.72
IVC (mA)

–0.60
94
–0.48
93 –0.36

92 –0.24
–0.12
91
0
90 0.12
0 20 40 60 80 100 120 140 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
JUNCTION TEMPERATURE (°C) VC (V)
1769 G06 1769 G07

Reference Voltage
PROG Pin Characteristics vs Temperature
6 2.470

2.468
REFERENCE VOLTAGE (V)

TJ = 125°C 2.466
IPROG (mA)

TJ = 25°C
0 2.464

2.462

2.460

–6 2.458
0 1 2 3 4 5 0 25 50 75 100 125 150
VPROG (V) JUNCTION TEMPERATURE
1769 G08 1769 G09

1769fa

5
LT1769
U U U
PIN FUNCTIONS (GN/FE Pin Numbers)

GND (Pins 1 to 3, 7, 8, 14, 15, 22, 26 to 28/Pins 4, 5, 14, this function is not used, the resistor and capacitor on
20): Ground Pins. Must be connected to expanded PC COMP1 pin, shown on the Figure 1 circuit, are not needed.
lands for proper heat sinking. See Applications Informa- SENSE (Pin 13/Pin 10): Current Amplifier CA1 Input.
tion section for details.
Sensing can be at either terminal of the battery.
SW (Pin 4/Pin 1): Switch Output. The Schottky catch
SPIN (Pin 16/Pin 11): This pin is for the current amplifier
diode must be placed with very short lead length in close
CA1 bias. It must be connected to RS1 as shown in the 2A
proximity to SW pin and GND. Lithium Battery Charger (Figure 1).
BOOST (Pin 5/Pin 2): This pin is used to bootstrap and BAT (Pin 17/Pin 12): Current Amplifier CA1 Input.
drive the switch power NPN transistor to a low on-voltage
for low power dissipation. In Figure 1, VBOOST = VCC + VBAT COMP2 (Pin 18): This is also a compensation node for
when switch is on. For lowest IC power dissipation, amplifier CL1. Voltage on this pin rises to 2.8V at input
connect boost diode D1 to a 3V to 6V at 30mA voltage adapter current limit and/or at constant-voltage charging.
source (see Figure 10). UVOUT (Pin 19/Pin 13): This is an open-collector output for
UV (Pin 6/Pin 3): Undervoltage Lockout Input. The rising undervoltage lockout status. It stays low in undervoltage
threshold is at 6.7V with a hysteresis of 0.5V. Switching state. With an external pull-up resistor, it goes high at valid
stops in undervoltage lockout. When the input supply VCC. Note that the base drive of the open-collector NPN
(normally the wall adapter output) to the IC is removed, the comes from CLN pin. UVOUT stays low only when CLN is
UV pin must be pulled down to below 0.7V (a 5k resistor higher than 2V. Pull-up current should be kept under 100µA.
from adapter output to GND is required) otherwise the VC (Pin 20/Pin 15): This is the inner loop control signal for
reverse battery current drained by the IC will be approxi- the current mode PWM. Switching starts at 0.7V. In
mately 200µA instead of 3µA. Do not leave the UV pin normal operation, a higher VC corresponds to higher
floating. When connected to VIN with no resistor divider, charge current. A capacitor of at least 0.33µF to GND
the built-in 6.7V undervoltage lockout will be effective. filters out noise and controls the rate of soft start. To stop
OVP (Pin 9/Pin 6): This is the input to amplifier VA with a switching, pull this pin low. Typical output current is 30µA.
threshold of 2.465V. Typical bias current is about 3nA out PROG (Pin 21/Pin 16): This pin is for programming the
of this pin. For charging lithium-ion batteries, VA monitors charge current and for system loop compensation. During
the battery voltage and reduces charging when battery normal operation, VPROG stays close to 2.465V. If it is
voltage reaches the preset value. If it is not used, the OVP shorted to GND switching will stop. When a microproces-
pin should be grounded. sor controlled DAC is used to program charge current, it
CLP (Pin 10/Pin 8): This is the positive input to the input must be capable of sinking current at a compliance up to
current limit amplifier CL1. The threshold is set at 100mV. 2.465V.
When used to limit supply current, a filter is needed to filter VCC1, VCC2, VCC3 (Pins 23 to 25/Pins 17 to 19): Input
out the 200kHz switching noise. Supply. For good bypass, a low ESR capacitor of 15µF or
CLN (Pin 11/Pin 7): This is the negative input to the input higher is required, with the lead length kept to a minimum.
current limit amplifier CL1. VCC should be between 8V and 28V and at least 3V higher
than VBAT. Undervoltage lockout starts and switching
COMP1 (Pin 12/Pin 9): This is the compensation node for stops when VCC goes below 7V typical. Note that there is
the input current limit amplifier CL1. At input adapter an internal parasitic diode from SW pin to VCC pin. Do not
current limit, this node rises to 1V. By forcing COMP1 low force VCC below SW by more than 0.7V with battery
with an external transistor, amplifier CL1 will be defeated present. All three VCC pins should be shorted together
(no adapter current limit). COMP1 can source 200µA. If close to the pins.

1769fa

6
 LT1769
W
BLOCK DIAGRAM

–
UV UVOUT

+
+
7V

200kHz
+ OSCILLATOR

0.7V SHUTDOWN VCC

+ –
VSW S
BOOST

–
VCC R
R QSW
+ R

+ SLOPE COMPENSATION
SW
1.5V
VCC
SPIN
VBAT –
PWM RS3
SENSE IBAT
C1 B1 +
GND – + + CA1
R2 RS1
RS2
BAT
–
R1 IPROG BAT
R3
1k

+ 0VP
–
VA
VREF
VC CA2 – 2.465V
+ Ω
75k VREF gm = 0.64
100mV
+ CLP
+
CL1

– CLN

COMP1

COMP2

1769 BD
PROG (I )(R )
IBAT = PROG S2
RS1
CPROG IPROG
( )( )
= 2.465V
RS2
RPROG RS1
(RS3 = RS2)
RPROG

1769fa

7
LT1769
TEST CIRCUITS
Test Circuit 1
SPIN
LT1769
RS3
SENSE 200Ω
+
–
VC RS1
CA1 RS2
CA2 100Ω
BAT 200Ω
60k
+ 1k –
0.047µF +
VBAT
VREF PROG

1µF

300Ω RPROG
+
LT1006
1k 1769 TC01

–
+
≈ 0.65V
20k

Test Circuit 2

LT1769 OVP
+
VA

–
PROG VREF
10k
IPROG

10k –

LT1013
+ +
0.47µF RPROG 2.465V

1769 TC02

U
OPERATION
The LT1769 is a current mode PWM step-down (buck) shift resistors R2 and R3, forming the current mode inner
switcher. The battery DC charge current is programmed loop. The BOOST pin drives the switch NPN QSW into
by a resistor RPROG (or a DAC output current) at the PROG saturation and reduces power loss. For batteries like
pin (see Block Diagram). Amplifier CA1 converts the lithium-ion that require both constant-current and con-
charge current through RS1 to a much lower current IPROG stant-voltage charging, the 0.5%, 2.465V reference and
fed into the PROG pin. Amplifier CA2 compares the output the amplifier VA reduce the charge current when battery
of CA1 with the programmed current and drives the PWM voltage reaches the preset level. For NiMH and NiCd, VA
control loop to force them to be equal. High DC accuracy can be used for overvoltage protection. When the input
is achieved with averaging capacitor CPROG. Note that voltage is removed, the VCC pin drops to 0.7V below the
IPROG has both AC and DC components. IPROG goes battery voltage, forcing the charger into a low battery drain
through R1 and generates a ramp signal that is fed to the (3µA typical) sleep mode. To shut down the charger,
PWM control comparator C1 through buffer B1 and level simply pull the VC pin low with a transistor.
1769fa

8
 LT1769
U U W U
APPLICATIONS INFORMATION
Input and Output Capacitors ramping up when VC pin voltage reaches 0.7V and full
current is achieved with VC at 1.1V. With a 0.33µF capaci-
In the 2A Lithium-Ion Battery Charger (Figure 1), the input
tor, the time to reach full charge current is about 10ms and
capacitor (CIN) is assumed to absorb all input switching
it is assumed that input voltage to the charger will reach full
ripple current in the converter, so it must have adequate
value in less than 10ms. The capacitor can be
ripple current rating. Worst-case RMS ripple current will
increased up to 1µF if longer input start-up times are needed.
be equal to one half of the output charge current. Actual
capacitance value is not critical. Solid tantalum capacitors In any switching regulator, conventional time-based soft-
such as the AVX TPS and Sprague 593D series have high starting can be defeated if the input voltage rises much
ripple current rating in a relatively small surface mount slower than the time out period. This happens because the
package, but caution must be used when tantalum capaci- switching regulators in the battery charger and the com-
tors are used for input bypass. High input surge currents puter power supply are typically supplying a fixed amount
are possible when the adapter is hot-plugged to the of power to the load. If the input voltage comes up slowly
charger and solid tantalum capacitors have a known compared to the soft-start time, the regulators will try to
failure mechanism when subjected to very high turn-on deliver full power to the load when the input voltage is still
surge currents. Selecting a high voltage rating on the well below its final value. If the adapter is current limited,
capacitor will minimize problems. Consult with the manu- it cannot deliver full power at reduced output voltages and
facturer before use. Alternatives include new high capacity the possibility exists for a quasi “latch” state where the
ceramic (5µF to 20µF) from Tokin or United Chemi-Con/ adapter output stays in a current limited state at reduced
Marcon, et al. Sanyo OS-CON can also be used. output voltage. For instance, if maximum charger plus
The output capacitor (COUT) is also assumed to absorb computer load power is 25W, a 15V adapter might be
output switching ripple current. The general formula for current limited at 2A. If adapter voltage is less than
capacitor ripple current is: (25W/2A = 12.5V) when full power is drawn, the adapter
voltage will be pulled down by the constant 25W load until

IRMS =
(
V
0.29 (VBAT) 1 – BAT
VCC ) it reaches a lower stable state where the switching regu-
lators can no longer supply full load. This situation can be
prevented by utilizing undervoltage lockout, set higher than
(L1)(f) the minimum adapter voltage where full power can be
For example, VCC = 16V, VBAT = 8.4V, L1 = 20µH, achieved.
and f = 200kHz, IRMS = 0.3A. A fixed undervoltage lockout of 7V is built into the LT1769.
EMI considerations usually make it desirable to minimize This 7V threshold can be increased by adding a resistive
ripple current in the battery leads. Beads or inductors can divider to the UV pin as shown in Figure 2. Internal lockout
be added to increase battery impedance at the 200kHz is performed by clamping the VC pin low. The VC pin is
switching frequency. Switching ripple current splits be- released from its clamped state when the UV pin rises
tween the battery and the output capacitor depending on above 7V and is pulled low when the UV pin drops below
the ESR of the output capacitor and the battery imped- 6.5V (0.5V hysteresis). At the same time UVOUT goes high
ance. If the ESR of COUT is 0.2Ω and the battery impedance with an external pull-up resistor. This signal can be used
is raised to 4Ω with a bead or inductor, only 5% of the to alert the system that charging is about to start. The
ripple current will flow into the battery. charger will start delivering current about 4ms after VC is
released, as set by the 0.33µF capacitor. A resistor divider
Soft-Start and Undervoltage Lockout is used to set the desired VCC lockout voltage as shown in
The LT1769 is soft-started by the 0.33µF capacitor on the Figure 2. A typical value for R6 is 5k and R5 is found from:
VC pin. On start-up, the VC pin voltage will quickly rise to
0.5V, then ramp at a rate set by the internal 45µA pull-up R6(VIN – VUV )
R5 =
current and the external capacitor. Charge current starts VUV
1769fa

9
LT1769
U U W U
APPLICATIONS INFORMATION
VUV = Rising lockout threshold on the UV pin adapter load current remains below the limit. Amplifier
VIN = Charger input voltage that will sustain full load power CL1 in Figure 2 senses the voltage across RS4, connected
between the CLP and CLN pins. When this voltage exceeds
Example: With R6 = 5k, VUV = 6.7V and setting VIN at 12V; 100mV, the amplifier will override the programmed charge
R5 = 5k (12V – 6.7V)/6.7V = 4k current to limit adapter current to 100mV/RS4. A lowpass
filter formed by 500Ω and 1µF is required to eliminate
The resistor divider should be connected directly to the
switching noise. If the input current limit is not used, both
adapter output as shown, not to the VCC pin, to prevent
CLP and CLN pins should be connected to VCC.
battery drain with no adapter voltage. If the UV pin is not
used, connect it to the adapter output (not VCC) and Charge Current Programming
connect a resistor no greater than 5k to ground. Floating
this pin will cause reverse battery current to increase from The basic formula for charge current is (see Block
3µA to 200µA. Diagram):
If connecting the unused UV pin to the adapter output is not
possible, it can be grounded. Although it would seem that
grounding the pin creates a permanent lockout state, the
IBAT = IPROG ( )(
RS2
RS1
=
2.465V
RPROG )( )
RS2
RS1
UV circuitry is arranged for phase reversal with low volt- where RPROG is the total resistance from PROG pin to ground.
ages on the UV pin to allow the grounding technique to work. For the sense amplifier CA1 biasing purpose, RS3 should
have the same value as RS2 and SPIN should be connected
100mV
+ CLP directly to the sense resistor (RS1) as shown in the Block
+ Diagram.
CL1 1µF
CLN 500Ω
– For example, 2A charge current is needed. For low power
AC ADAPTER
OUTPUT dissipation on RS1 and enough signal to drive the amplifier
VCC RS4*
VIN CA1, let RS1 = 100mV/2A = 0.05Ω. This limits RS1 power
+
LT1769 R5
to 0.2W. Let RPROG = 5k, then:
UV
(I )(R )(R )
100mV R6
RS2 = RS3 = BAT PROG S1
*RS4 =
ADAPTER CURRENT LIMIT
2.465V
1769 F02
(2A)(5k)(0.05)
= = 200Ω
Figure 2. Adapter Input Current Limiting 2.465V
Charge current can also be programmed by pulse width
Adapter Current Limiting modulating IPROG with a switch Q1 to RPROG at a frequency
An important feature of the LT1769 is the ability to higher than a few kHz (Figure 3). Charge current will be
automatically adjust charge current to a level which avoids proportional to the duty cycle of the switch with full current
overloading the wall adapter. This allows the product to at 100% duty cycle.
operate at the same time the batteries are being charged
without complex load management algorithms. Addition- Lithium-Ion Charging
ally, batteries will automatically be charged at the maximum The 2A Lithium-Ion Battery Charger (Figure 1) charges at
possible rate of which the adapter is capable. a constant 2A until battery voltage reaches a limit set by R3
This is accomplished by sensing total adapter output and R4. The charger will then automatically go into a
current and adjusting the charge current downward if a constant-voltage mode with current decreasing to near
preset adapter current limit is exceeded. True analog zero over time as the battery reaches full charge. This is the
control is used, with closed-loop feedback ensuring that normal regimen for lithium-ion charging, with the charger
1769fa

10
 LT1769
U U W U
APPLICATIONS INFORMATION
VBAT
LT1769
R3 +
12k 8.4V
PROG 0.25%
300Ω
Q3 VIN
LT1769 VN2222 R5
RPROG CPROG 220k
4.7k 1µF OVP
R4
5V Q1 4.99k
0V VN2222 0.25%
PWM
1769 F04
IBAT = (DC)(2A) 1769 F03

Figure 3. PWM Current Programming Figure 4. Disconnecting Voltage Divider

holding the battery at “float” voltage indefinitely. In this is to use a Zener diode with a breakdown voltage two or three
case no external sensing of full charge is needed. volts higher than battery voltage to clamp the VBAT voltage.

Battery Voltage Sense Resistors Selection Battery manufacturers recommend terminating the con-
stant-voltage float mode after charge current has dropped
To minimize battery drain when the charger is off, current below a specified level (typically around 10% of the full
through the R3/R4 divider is set at 15µA. The input current current) and a further time out period of 30 to 90 minutes
to the OVP pin is 3nA and the error can be neglected. has elapsed. This may extend battery life, so check with the
With divider current set at 15µA, VBAT = 8.4V, R4 = manufacturer for details. The circuit in Figure 5 will detect
2.465/15µA = 162k and, when charge current has dropped below 270mA. This
logic signal is used to initiate a timeout period, after which

R3 =
(R4)(VBAT − 2.465) = 162k (8.4 − 2.465) the LT1769 can be shut down by pulling the VC pin low with
2.465 2.465 an open collector or drain. Some external means must be
= 390k used to detect the need for additional charging or the
IBAT
Li-Ion batteries typically require float voltage accuracy of RS3
1%. Accuracy of the LT1769 OVP voltage is ±0.5% at 200Ω
SENSE
25°C and ±1% over full temperature. This leads to the RS1
LT1769
possibility that very accurate (0.1%) resistors might be 0.05Ω RS2
200Ω
needed for R3 and R4. Actually, the temperature of the BAT

LT1769 will rarely exceed 50°C in float mode because VBAT

ADAPTER
charging currents have tapered off to a low level, so OUTPUT 3.3V OR 5V
0.25% resistors will normally provide the required level of R1* C1 D1
BAT 1.6k 0.1µF 1N4148 R4
overall accuracy. 3 8 470k
–
7 NEGATIVE EDGE
When power is on, there is about 200µA of current flowing LT1011 TO TIMER
2
out of the BAT and SENSE pins. If the battery is removed + 4
R2 1
during charging, and total load including R3 and R4 is less 560k
D2
1N4148
than 200µA, VBAT could float up to VCC even though the
R1(VBAT)
loop has turned switching off. To keep VBAT regulated to R3
430k
* TRIP CURRENT =
(R2 + R3)(RS1)
the battery voltage in this condition, R3 and R4 can be (1.6k)(8.4V)
= ≈ 270mA
chosen to draw 0.5mA and Q3 can be added to disconnect (560k + 430k)(0.05Ω)

them when power is off (Figure 4). R5 isolates the OVP pin 1769 F04

from any high frequency noise on VIN. An alternative method Figure 5. Current Comparator for Initiating Float Time Out
1769fa

11
LT1769
U U W U
APPLICATIONS INFORMATION
charger may be turned on periodically to complete a short is not nearly as pronounced. This makes it more difficult
float-voltage cycle. to use – dV/dt as an indicator of full charge, and an
increase in battery temperature is more often used with a
Current trip level is determined by the battery voltage, R1
temperature sensor in the battery pack. Secondly, con-
through R3 and the sense resistor (RS1). D2 generates
stant trickle charge may not be recommended. Instead, a
hysteresis in the trip level to avoid multiple comparator
moderate level of current is used on a pulse basis (≈ 1%
transitions.
to 5% duty cycle) with the time-averaged value substitut-
Nickel-Cadmium and Nickel-Metal-Hydride Charging ing for a constant low trickle. Please contact the Linear
Technology Applications department about charge termi-
The 2A Lithium-Ion Battery Charger shown in Figure 1 can nation circuits.
be modified to charge NiCd or NiMH batteries. For ex-
ample, if a 2-level charge is needed; 1A when Q1 is on and If overvoltage protection is needed, R3 and R4 can be cal-
100mA when Q1 is off. culated according to the procedure described in Lithium-
Ion Charging section. The OVP pin should be grounded if
LT1769 not used.
PROG When a microprocessor DAC output is used to control
charge current, it must be capable of sinking current at a
R1 R2
300Ω
49.3k 5.49k compliance up to 2.5V if connected directly to the PROG pin.
1µF Q1
Thermal Calculations
1769 F05
If the LT1769 is used for charging currents above 1A, a
Figure 6. 2-Level Charging thermal calculation should be done to ensure that junction
temperature will not exceed 125°C. Power dissipation in
For 1A full current, the current sense resistor (RS1) should the IC is caused by bias and driver current, switch resis-
be increased to 0.1Ω so that enough signal (10mV) will be tance and switch transition losses. The GN package, with
across RS1 at 0.1A trickle charge to keep charging current a thermal resistance of 35°C/W, can provide a full 2A
accurate. charging current in many situations. A graph is shown in
For a 2-level charger, R1 and R2 are found from: the Typical Performance Characteristics section.

R1 =
(2.465)(2000 ) R2 =
(2.465)(2000 ) PBIAS = (3.5mA )(VIN) + 1.5mA(VBAT )
ILOW IHI − ILOW
( VBAT )
2
All battery chargers with fast charge rates require some +
VIN
[7.5mA + (0.012)(IBAT )]
means to detect full charge in the battery and terminate the
high charge current. NiCd batteries are typically charged at
high current until a temperature rise or battery voltage
(IBAT )(VBAT )2  1+ VBAT
30 


PDRIVER =
decrease is detected as an indication of near full charge. 55(VIN)
The charging current is then reduced to a much lower
value and maintained as a constant trickle charge. An PSW =
(IBAT ) (RSW )(VBAT )
2
+ ( tOL)(VIN )(IBAT )( f)
intermediate “top off” current may also be used for a fixed V IN
time period to reduce total charge time.
RSW = Switch ON resistance ≈ 0.16Ω
NiMH batteries are similar in chemistry to NiCd but have tOL = Effective switch overlap time ≈ 10ns
two differences related to charging. First, the inflection f = 200kHz
characteristic in battery voltage as full charge is approached
1769fa

12
 LT1769
U U W U
APPLICATIONS INFORMATION
Example: VIN = 19V, VBAT = 12.6V, IBAT = 2A:
SW
PBIAS = (3.5mA )(19) + 1.5mA(12.6) C2 LT1769

(12.6)
L1 BOOST
2
+
19
[7.5mA + (0.012)(2000mA)] = 0.35W D2
SPIN

(2)(12.6)2  1+ 1230.6  VX

IVX + 1769 F07

PDRIVER = = 0.43W
10µF

55(19)

PSW =
( 2) (0.16)(12.6)
2
+ 10 −9 (19)(2)(200kHz)
Figure 7. Lower VBOOST
19
thermal resistance of the package-board combination is
= 0.42 + 0.08 = 0.5W dominated by the characteristics of the board in the
Total Power in the IC is: 0.35 + 0.43 + 0.5 = 1.3W immediate area of the package. This means both lateral
Temperature rise will be (1.3W)(35°C/W) = 46°C. This thermal resistance across the board and vertical thermal
assumes that the LT1769 is properly heat sunk by con- resistance through the board to other copper layers. Each
necting the eleven fused ground pins to expanded traces layer acts as a thermal heat spreader that increases the
and that the PC board has a backside or internal plane for heat sinking effectiveness of extended areas of the board.
heat spreading. Total board area becomes an important factor when the
The PDRIVER term can be reduced by connecting the boost area of the board drops below about 20 square inches. The
diode D2 (see Figure 7) to a lower system voltage (lower graph in Figure 8 shows thermal resistance vs board area
than VBAT) instead of VBAT. for 2-layer and 4-layer boards with continuous copper
planes. Note that 4-layer boards have significantly lower
(IBAT )(VBAT )(VX ) 1+ V30X  thermal resistance, but both types show a rapid increase
Then PDRIVER =
55(VIN ) for reduced board areas. Figure 9 shows actual measured
lead temperatures for chargers operating at full current.
For example, VX = 3.3V then: Battery voltage and input voltage will affect device power
  dissipation, so the data sheet power calculations must be
(2A)(12.6V)(3.3V) 1+ 330.3V  used to extrapolate these readings to other situations.
= = 0.09 W
55(19V )
PDRIVER Vias should be used to connect board layers together.
Planes under the charger area can be cut away from the
The average IVX required is: rest of the board and connected with vias to form both a
low thermal resistance system and to act as a ground plane
PDRIVER 0.09 W for reduced EMI.
= = 28mA
VX 3.3V Glue-on, chip-mounted heat sinks are effective only in
The previous example shows the dramatic drop in driver moderate power applications where the PC board copper
power dissipation when the boost diode (D2) is connected cannot be used, or where the board size is small. They offer
to an external 3.3V source instead of the 12.6V battery. very little improvement in a properly laid out multilayer
PDRIVER drops from 0.43W to 0.09W resulting in an board of reasonable size.
approximately 12°C drop in junction temperature.
Higher Duty Cycle for the LT1769 Battery Charger
Fused-lead packages conduct most of their heat out the
leads. This makes it very important to provide as much PC Maximum duty cycle for the LT1769 is typically 90%, but
board copper around the leads as is practical. Total this may be too low for some applications. For example, if
1769fa

13
LT1769
U U W U
APPLICATIONS INFORMATION
45 STANDARD CONNECTION HIGH DUTY CYCLE CONNECTION

40 SW SW
C3
THERMAL RESISTANCE (°C/W)

C3
0.47µF 0.47µF
35 BOOST BOOST
D2 LT1769 D2 LT1769
30
SPIN SPIN
2-LAYER BOARD VX
25 SENSE BAT 3V TO 6V SENSE BAT
4-LAYER BOARD CX
20 10µF

MEASURED FROM AIR AMBIENT VBAT VBAT

15 TO DIE USING COPPER LANDS + +
AS SHOWN ON DATA SHEET
10
0 5 10 15 20 25 30 35
BOARD AREA (IN2) 1769 F08 1769 F10

Figure 10. High Duty Cycle

Figure 8. LT1769 Thermal Resistance
HIGH DUTY CYCLE CONNECTION
VIN
70 Q1 +
NOTE: PEAK DIE TEMPERATURE
LEAD TEMPERATURE ON PINS 1, 2, 3 (°C)

WILL BE ABOUT 15°C HIGHER AT

60 2A CHARGE CURRENT Q2
SW VCC
VIN = 19V C2
VBAT = 12.3V 5 IN2 BOARD
D1 0.47µF
50 VBOOST = 5V RX BOOST
2-LAYER BOARD 50k
D2 LT1769
ROOM TEMP = 24°C
40 SPIN
VX
25 IN2 BOARD Q1 = Si4435DY 3V TO 6V SENSE BAT
Q2 = TP0610L CX
30 10µF
VBAT
20 +
0 0.5 1 1.5 2
CHARGE CURRENT (A) 1769 F09

1769 F11

Figure 9. LT1769 Lead Temperature Figure 11. Replacing the Input Diode

an 18V ±3% adapter is used to charge ten NiMH cells, the with its gate connected to the battery causing the FET to
charger must put out approximaly 15V. A total of 1.6V is turn off when the input voltage goes low. The problem is
lost in the input diode, switch resistance, inductor resis- that the gate must be pumped low so that the FET is fully
tance and parasitics, so the required duty cycle is turned on even when the input is only a volt or two above
15/16.4 = 91.4%. The duty cycle can be extended to 93% the battery voltage. Also there is a turn-off speed issue.
by restricting boost voltage to 5V instead of using VBAT as The FET should turn off instantly when the input is dead
is normally done. This lower boost voltage also reduces shorted to avoid large current surges from the battery
power dissipation in the LT1769, so it is a win-win back through the charger into the FET. Gate capacitance
decision. Connect an external source of 3V to 6V at VX slows turn-off, so a small P-channel (Q2) is added to
node in Figure 10 with a 10µF CX bypass capacitor. discharge the gate capacitance quickly in the event of an
input short. The Q2 body diode creates the necessary
Lower Dropout Voltage pumping action to keep the gate of Q1 low during normal
For even lower dropout and/or reducing heat on the board, operation. Note that Q1 and Q2 have a VGS spec limit of
the input diode D3 can be replaced with a FET (see Figure 20V. This restricts VIN to a maximum of 20V. For low
11). Connect a P-channel FET in place of the input diode dropout operation with VIN > 20V consult factory.
1769fa

14
 LT1769
U U W U
APPLICATIONS INFORMATION
Optional Diode Connections Layout Considerations
The typical application in Figure 1 shows a single diode Switch rise and fall times are under 10ns for maximum
(D3) to isolate the VCC pin from the adaptor input and to efficiency. To minimize radiation, the catch diode, SW pin
block reverse input voltage (both steady state and tran- and input bypass capacitor leads should be kept as short
sient). This simple connection may be unacceptable in as possible. A ground plane should be used under the
situations where the system load must be powered from switching circuitry to prevent interplane coupling and to
the battery when the adapter input power is removed. As act as a thermal spreading path. All ground pins should be
shown in Figure 12, a parasitic diode exists from the SW connected to expanded traces for low thermal resistance.
pin to the VCC pin in the LT1769. When the input power is The fast-switching high current ground path, including the
removed, this diode will become forward biased and will switch, catch diode and input capacitor, should be kept
provide a current path from the battery to the system load. very short. Catch diode and input capacitor should be
Because of diode power limitations, it is not recommended close to the chip and terminated to the same point. This
to power the system load through the internal parasitic path contains nanosecond rise and fall times with several
diode. To safely power the system load from the battery, amps of current. The other paths contain only DC and/or
an additional Schottky diode (D4) is needed. For minimum 200kHz tri-wave and are less critical. Figure 13 indicates
losses, D4 could be replaced by a low RDS(ON) MOSFET the high speed, high current switching path. Figure 14
which is turned on when the adapter power is removed. shows critical path layout. Contact Linear Technology for
R7
the LT1769 circuit PCB layout or Gerber file.
D3
500Ω
ADAPTER
CLP IN SWITCH NODE
LT1769 + C1
L1
CLN RS4 VBAT
1µF
SW VCC TO
SYSTEM
+ HIGH
INTERNAL LOAD
CIN FREQUENCY
PARASITIC D4 VIN CIN CIRCULATING
D1 COUT BAT
L1 DIODE PATH
RS1
+
1769 F12a
1769 F13

Figure 12. Modified Diode Connection Figure 13. High Speed Switching Path

GND

D1 CIN
GND GND
GND GND
GND GND
SW VCC1
BOOST VCC2
UV VCC3
GND GND
GND PROG
TO
L1 OVP VC GND
CLP UVOUT
CLN COMP2
TO
GND COMP1 BAT
SENSE SPIN
GND GND

RS1
COUT

GND

NOTE: CONNECT ALL GND PINS TO EXPANDED PC LANDS FOR PROPER HEAT SINKING 1769 F14

Figure 14. Critical Electrical and Thermal Path Layout

1769fa

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1769
U
PACKAGE DESCRIPTION
FE Package
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)

3.86
Exposed Pad Variation CB
(.152)

6.60 ±0.10
2.74
4.50 ±0.10 (.108)
SEE NOTE 4
0.45 ±0.05

1.05 ±0.10
6.40 – 6.60*
0.65 BSC (.252 – .260)
RECOMMENDED SOLDER PAD LAYOUT 3.86
1.20 (.152)
4.30 – 4.50* (.047) 20 1918 17 16 15 14 13 12 11
(.169 – .177) MAX
0° – 8°

0.45 – 0.75 0.65

0.09 – 0.20 (.018 – .030) (.0256) 0.05 – 0.15 2.74 6.40
(.0036 – .0079) BSC (.002 – .006) (.108) BSC
0.195 – 0.30
(.0077 – .0118)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
MILLIMETERS FOR EXPOSED PAD ATTACHMENT
2. DIMENSIONS ARE IN
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH 1 2 3 4 5 6 7 8 9 10 FE20 (CB) TSSOP 0203

3. DRAWING NOT TO SCALE SHALL NOT EXCEED 0.150mm (.006") PER SIDE

GN Package
28-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
0.386 – 0.393*
(9.804 – 9.982) 0.033
0.015 ± 0.004 (0.838)
× 45° 0.053 – 0.069 0.004 – 0.009 28 27 26 25 24 23 22 21 20 19 18 17 1615 REF
(0.38 ± 0.10)
(1.351 – 1.748) (0.102 – 0.249)
0.0075 – 0.0098 0° – 8° TYP
(0.191 – 0.249)

0.016 – 0.050 0.229 – 0.244 0.150 – 0.157**

0.008 – 0.012 0.0250
(0.406 – 1.270) (5.817 – 6.198) (3.810 – 3.988)
(0.203 – 0.305) (0.635)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
GN28 (SSOP) 1098
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 1 2 3 4 5 6 7 8 9 10 11 12 13 14

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1372/LT1377 500kHz/1MHz Step-Up Switching Regulators High Frequency, Small Inductor, High Efficiency Switchers, 1.5A Switch
LT1376 500kHz Step-Down Switching Regulator High Frequency, Small Inductor, High Efficiency Switcher, 1.5A Switch
LT1505 High Current, High Efficiency Battery Charger 94% Efficiency, Synchronous Current Mode PWM
LT1510 Constant-Voltage/Constant-Current Battery Charger Up to 1.5A Charge Current for Lithium-Ion, NiCd and NiMH Batteries
LT1511 Constant-Voltage/Constant-Current Battery Charger Up to 3A Charge Current for Lithium-Ion, NiCd and NiMH Batteries
LT1512/LT1513 SEPIC Battery Chargers VIN Can Be Higher or Lower Than Battery Voltage
LTC1729 Li-Ion Battery Charger Termination Controller Preconditioning If Cell < 2.7V, 3hr Time-Out, C/10 Detection, Temp Sensor
Pin, Charger and Battery Detection
LTC1759 SMBus Smart Battery Charger 94% Efficiency with Input Current Limiting, Up to 8A ICHG
LTC1960 Dual Battery Charger and Selector with SPI Interface ICHARGE Up to 6A, Fast Charge, Longer Battery Life, Crisis Management
1769fa

LT/TP 1101 1.5K REV A • PRINTED IN USA

Linear Technology Corporation
16 1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ●
www.linear.com  LINEAR TECHNOLOGY CORPORATION 1999