Q2DTUSCF0100B7Q

Cisco® Compatible (with select systems)

- 100GBase-ZR QSFP28 Transceiver (SMF, 1528.77nm to 1567.13nm,
80km,
- LC, DOM) -

Product Description
This Cisco® QSFP28 transceiver provides 100GBase-ZR throughput up to 80km over single-mode fiber (SMF)
using a wavelength of 1528.77nm to 1567.13nm via an LC connector. It is guaranteed to be 100% compatible
with the equivalent Cisco® transceiver. This easy to install, hot swappable transceiver has been programmed,
uniquely serialized and data-traffic and application tested to ensure that it will initialize and perform identically.
Digital optical monitoring (DOM) support is also present to allow access to real-time operating parameters. We
stand behind the quality of our products and proudly offer a limited lifetime warranty.

Skylane’s transceivers are RoHS compliant and lead-free.

Features:
• Hot-Pluggable QSFP28 Form Factor
• Transmission reach up to 80km unamplified (loss limited) or up
to 120km amplified (dispersion limited, optionally extendable to
300km)
• IEEE 100G Ethernet (CAUI-4) Compliant Host Interface
• Operating Temperature Range: 0 to 70 Celsius
• Power Dissipation:
• Full C-Band Tunable, 50GHz/100GHz Spacing
• Tuning box is required for operation
• RoHS Compliant and Lead-Free
• Please contact your sales representative for specific system
information

Applications:
• 100GBase Ethernet
• Duplex Mux

For your product safety, please read the following information carefully before any manipulation of the transceiver:

ESD
This transceiver is specified as ESD threshold 1kV for SFI pins and 2kV for all others electrical input pins, tested per MIL-STD-883G, Method
3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module.

LASER SAFETY
This is a Class1 Laser Product according to IEC 60825-1:2007. This product complies with 21 CFR 1040.10 and 1040.11 except for deviations
pursuant to Laser Notice No. 50, dated (June 24, 2007).

The optical ports of the module need to be terminated with an optical connector or with a dust plug in order to avoid contamination.

Skylane Optics Visit www.skylaneoptics.com for more connectivity solutions | Rev. 031325
Absolute Maximum Ratings
Parameter Symbol Min. Typ. Max. Unit Notes

DC Supply Voltage Vcc -0.3 3.6 V

Low-Speed I/O Voltages -0.3 3.6 V
Storage Temperature Tstg -40 85 °C
Operating Case Long-Term Tc 0 70 °C 1
Temperature
Short-Term <96 -5 75 °C
Hours
Operating Relative Humidity RH 5 95 %
Rx Input Power PRx,in 10 dBm
ESD Damage DC Pins 2000 V
Threshold
Human Body Model RF Pins 1000 V
(HBM)

Notes:
1. Central office applications.
2. Stresses in excess of the Absolute Maximum Ratings can cause permanent damage to the device. These
are absolute stress ratings only. Functional operation of the device is not implied at these or any other
conditions in excess of those given in the operational sections of the datasheet. Exposure to Absolute
Maximum Ratings for extended periods of time can adversely affect device reliability. Use of controls or
adjustments or performance of procedures other than those specified herein may result in hazardous
radiation exposure.

Host Interface Modes

Host Interface ID Host Interface Modulation Forward Error Nominal Symbol Supported Line
[18] Description [18] Correction Code Rate (GBd) Interface IDs [18]
65 [8] CAUI-4 C2M NRZ None 25.78125 68, 192, 193
without FEC
66 [8] CAUI-4 C2M with NRZ RS(528,514) 25.78125 68, 192, 193
RS(528,514) FEC
Electrical Characteristics
Parameter Symbol Min. Typ. Max. Unit Notes

Power Supply – General

Power Supply Voltages 3.135 3.3 3.465 V Including ripple, droop, and noise
below 100kHz
Host RMS Noise Output 25 mV 10Hz - 10MHz
Module RMS Noise Output 15 mV 10Hz - 10MHz
Module Supply Noise Tolerance PSNRmod 66 mV 10Hz - 10MHz, peak-to-peak
Module Inrush Tip 50 µs Instantaneous peak duration
Tinit 500 ms Initialization time
Power Supply – Low-Power Mode

Power Dissipation Plp 1.5 W

Power Supply Current Icc,ip,lp 600 mA Instantaneous peak current
Icc,sp,lp 495 mA Sustained peak current
Icc,lp 478 mA 1, Steady state current
Power Supply – Low-Power Mode

Power Dissipation Php 5.5 W

Power Supply Current Icc,ip,hp 2200 mA Instantaneous peak current
Icc,sp,hp 1815 mA Sustained peak current
Icc,hp 1754 mA 1, Steady state current
Low-Speed I/O

Clock Frequency (SCL) fSCL 400 kHz Default

1000 Fast-mode+
Output Voltage (SCL and SDA) VOL 0.0 0.4 Output low
VOH Vcc-0.5 Vcc+0.3 Output high
Input Voltage (SCL and SDA) VIL -0.3 0.3×Vcc V Input low
VIH 0.7×Vcc Vcc+0.5 Input high
Capacitance for SCL and SDA I/O Ci 14 pF
Signal
Total Bus 400kHz Clock Cb 100 pF 2, 3.0kΩ pull-up resistor, maximum
Capacitive Load Rate
200 2, 1.6kΩ pull-up resistor, maximum
for SCL and SDA
Input Voltage/Current, VIL -0.3 0.8 V Input voltage, low
LPMode/TxDis, ResetL, and ModSelL
VIH 2.0 Vcc+0.3 Input voltage, high
Iin -365 125 µA Input current, 0V < VIN < Vcc
Output Voltage, ModPrsL, and VOL 0.0 0.4 V Output low, IOL = 2mA
IntL/RxLOSL
VOH Vcc-0.5 Vcc+0.3 Output high, 10kΩ pull-up resistor to
Host_Vcc

Notes:
1. The module will stay within its advertised power class for all supply voltages.
2. For 1000kHz clock rate.
Optical Characteristics
Parameter Symbol Min. Typ. Max. Unit Notes

Power Supply – General

Symbol Rate Rbaud 27.95 GBd

Modulation Format DP-DQPSK
Channel Frequency Range Vc 191.4 193.7 196.1 THz 100GHz grid
Vc 191.35 193.7 196.1 THz 50GHz grid
Channel Spacing ΔVc 100 GHz 100GHz grid
ΔVc 50 GHz 50GHz grid
Frequency Accuracy δVc -1.8 1.8 GHz
Laser Intrinsic Linewidth LW 500 kHz Calculated based on FM
noise Power Spectral
Density (PSD) measurement
Side-Mode Suppression Ratio SMSR 40 dB No modulation
Relative Intensity Noise RIN -140 dB/Hz Peak over 0.2GHz < f <
10GHz
Transmitter

Tx Output Power PTx,out -8 -4 dBm

Tx Output Power Monitor Range PTx,mon -10 -2 dBm
Tx Output Power Monitor Accuracy δPTx,mon -1.5 1.5 dB Tx optical power monitor
reading relative to actual Tx
output power
Tx Output Power During Tuning or PTx,dark -35 dBm
When Tx is Disabled
Tx Spectral Excursion -15 15 GHz ITU-T G.698.2 §7.2.3 [11]
Tx Output Power Imbalance Between ∆PX/Y 1.5 dB
X and Y Polarizations
Tx XY Skew 6.0 ps
Tx IQ Offset -25 dB
Tx IQ Imbalance 1.0 dB
Tx Quadrature Error -7.0 7.0 °
Tx IQ Skew 1.5 ps
Tx Error Vector Magnitude Mask Ratio 23 % ITU-T G.698.2 §7.2.12 [11],
with 24dB/0.1nm noise
loading
Tx In-Band Optical Signal to Noise OSNRin 40 dB/0.1nm Under modulation,
Ratio |Δf|<60GHz
Tx Out-of-Band Optical Signal to Noise OSNRout 35 dB/0.1nm Under modulation,
Ratio |Δf|>60GHz, excl. side-
mode peaks
Tx Reflectance -20 dB
Receiver

Rx Total Input Power PRx,tot -30 3 dBm Broadband

Rx Signal Input Power (Amplified) PRx,sig -18 1 dBm Full Rx OSNR tolerance
-22 3 dBm 1
 Rx OSNR 100G DQPSK SC 16.5 dB/0.1nm Back-to-back, PRx,sig > -
Tolerance 18dBm
100G DQPSK RS 21.5
CD Tolerance 2.4 ns/nm OSNR penalty < 0.5dB
PMD Tolerance 10 Ps
DGD Tolerance 20 Ps
Tolerance to Change in SOP 50 krad/s
PDL OSNR 1dB PDL 0.5 dB/0.1nm Change in principal state of
Penalty polarization < 1rad/ms
2dB PDL 1.0
4dB PDL 3.0
Rx Signal Input Power Transient -3 3 dB 2
Amplitude
Rx Signal Input Power Transient 100 µs 3
Rise/Fall Time
Rx Signal Input 100G DQPSK SC -30 1 dBm OSNR > 35dB/0.1nm
Power
100G DQPSK RS -24 1
(Unamplified)
Rx Signal Input Power Monitor Range PRx,mon(s) -21 3 dBm
Rx Signal Input Power Monitor Accuracy δPRx,mon(s) -2.5 2.5 dB
Rx Total Input Power Monitor Range PRx,mon(t) -21 6 dBm
Rx Total Input Power Monitor Accuracy δPRx,mon(t) -2.0 2.0 dB
Rx Reflectance -20 dB

Notes:
1. Extended range. Rx signal input power range over which performance can be guaranteed with <1dB
OSNR penalty relative to the Rx OSNR tolerance limit.
2. Peak excursion from steady state, transient within Rx signal input power (amplified) range, and OSNR
penalty <0.5dB.
3. Rise/fall time for the above peak excursion, OSNR penalty <0.5dB.
SFF-8636 Management Interface
Parameter Symbol Min. Max. Unit Conditions Notes

Initialization Time Time from power on or hot plug until the module is
120 s fully functional (assuming LPMode pulled low by 2, 3
the host).
Reset Init Assert Time 10 µs Minimum pulse time on the ResetL signal to initiate
a module reset.
Serial Bus Hardware Ready Time 2 s Time from power on until the module responds to
data transmission over the 2-wire serial bus. 2
Monitor Data Ready Time 2 s Time from power on to Data_Not_Ready, Byte 2 bit
0, cleared to 0, and IntL output pulled low. 2
Reset Assert Time 120 s Time from a rising edge on the ResetL input until 3
the module is fully functional.
LPMode/TxDis Mode Change ms Time to change between LPMode and TxDis modes
Time 100 of the dual-mode signal LPMode/TxDis.
LPMode Assert Time 100 ms Time from when the host releases LPMode to high
until module power consumption reaches Power
Class 1.
LPMode De-Assert Time 120 s Time from when the host pulls LPMode low until 3
the module is fully functional.
IntL/RxLOSL Mode Change Time 100 ms Time to change between IntL and RxLOSL modes of
the dual-mode signal IntL/RxLOSL.
IntL Assert Time 200 ms Time from occurrence of condition triggering an
interrupt until IntL is low.
IntL De-Assert Time 500 µs Time from clear on read operation of associated
flag until module releases IntL to high. This includes
4
the time to clear Rx LOS, Tx Fault, and other flag
bits.
RxLOSL Assert Time 1 ms Time from optical loss of signal to RxLOSL signal
pulled low by the module.
RxLOSL De-Assert Time 3 ms Time from optical signal above the LOS de-assert
threshold to when the module releases the RxLOSL
signal to high.
Tx Fault Assert Time 200 ms Time from Tx Fault state to Tx Fault bit set to 1 and
IntL pulled low by the module.
Flag Assert Time 200 ms Time from condition triggering flag to associated
flag bit set to 1 and IntL pulled low by the module.
Mask Assert Time ms Time from mask bit set to 1 until the module is
100 prevented from pulling IntL low when the 1
associated flag is set high.
Mask De-Assert Time 100 ms Time from mask bit cleared to 0 until module is 1
enabled to pull IntL low when the associated flag is
set high.
I/O Timing for Squelch & Disable

Rx Squelch Assert Time 15 ms Time from loss of Rx input signal until the squelched
output condition is reached.
Rx Squelch De-Assert Time 15 ms Time from resumption of Rx input signals until
normal Rx output condition is reached.
Tx Squelch Assert Time 400 ms Time from loss of Tx input signal until the squelched
output condition is reached.
Tx Squelch De-Assert Time 10 s Time from resumption of Tx input signal until the
normal Tx output condition is reached.
Tx Disable Assert Time 1 ms Time from Tx_Disable bit is set to 1 until optical 1
output falls below 10% of nominal.
Tx Disable De-Assert Time 10 s Time from Tx Disable bit cleared to 0 until optical 1
output rises above 90% of nominal.
 Rx Output Disable Assert Time 100 ms Time from Rx Output Disable bit set (value= 1b) until 1
Rx output falls below 10% of nominal.
Rx Output Disable De-Assert 100 ms Time from Rx Output Disable bit cleared (value= 0b) 1
Time until Rx output rises above 90% of nominal.
Squelch Disable Assert Time 100 ms This applies to Rx and Tx Squelch and is the time 1
from bit set (value = 1b) until squelch functionality
is disabled.
Squelch Disable De-Assert Time 100 ms This applies to Rx and Tx Squelch and is the time 1
from bit cleared (value = 0b) until squelch
functionality is enabled.

Notes:
1. Measured from the rising edge of SDA during STOP sequence of write transaction.
2. “Power On” is defined as the instant when supply voltages reach and remain at or above the minimum
level specified.
3. “Fully Functional” is defined as the module being ready to transmit and receive valid signals and all
management interface data, including monitors, being valid. It is indicated after “Reset” or “Hot Plug” by
the module releasing IntL to “high” after the host has read a 0 from the Data_Not_Ready flag bit. Rx LOS
condition is defined as (a) Rx input power below threshold or (b) DSP loss of signal.
4. Measured from rising edge of the SDA during STOP sequence of read transaction.

Optical Timing Characteristics

Parameter Symbol Min. Max. Unit Conditions Notes

Tx Turn On Time 10 s Warm Start 1

120 s Cold Start
Rx Acquisition Time 30 ms Warm Start
120 s Cold Start
Tx/Rx Channel Tuning Time 30 s

Notes:
1. Assumes the Tx/Rx laser is already tuned to the correct frequency.
Pin Descriptions
Pin Logic Symbol Name/Description Plug Sequence Notes

1 GND Module Ground. 1 1

2 CML-I Tx2- Transmitter Inverted Data Input. 3
3 CML-I Tx2+ Transmitter Non-Inverted Data Input. 3
4 GND Module Ground. 1 1
5 CML-I Tx4- Transmitter Inverted Data Input. 3
6 CML-I Tx4+ Transmitter Non-Inverted Data Input. 3
7 GND Module Ground. 1 1
8 LVTTL-I ModSelL Module Select. 3
9 LVTTL-I ResetL Module Reset. 3
10 VccRx +3.3V Receiver Power Supply. 2 2
11 LVCMOS-I/O SCL 2-Wire Serial Interface Clock. 3
12 LVCMOS-I/O SDA 2-Wire Serial Interface Data. 3
13 GND Module Ground. 1 1
14 CML-O Rx3+ Receiver Non-Inverted Data Output. 3
15 CML-O Rx3- Receiver Inverted Data Output. 3
16 GND Module Ground. 1 1
17 CML-O Rx1+ Receiver Non-Inverted Data Output. 3
18 CML-O Rx1- Receiver Inverted Data Output. 3
19 GND Module Ground. 1 1
20 GND Module Ground. 1 1
21 CML-O Rx2- Receiver Inverted Data Output. 3
22 CML-O Rx2+ Receiver Non-Inverted Data Output. 3
23 GND Module Ground. 1 1
24 CML-O Rx4- Receiver Inverted Data Output. 3
25 CML-O Rx4+ Receiver Non-Inverted Data Output. 3
26 GND Module Ground. 1 1
27 LVTTL-O ModPrsL Module Present. 3
28 LVTTL-O IntL/RxLOSL Interrupt. Optionally configurable as RxLOSL via the 3
management interface (SFF-8636).
29 VccTx +3.3V Transmitter Power Supply. 2 2
30 Vcc1 +3.3V Power Supply. 2 2
31 LVTTL-I LPMode/TxDis Low-Power Mode. Optionally configurable as TxDis via the 3
management interface (SFF-8636).
32 GND Module Ground. 1 1
33 CML-I Tx3+ Transmitter Non-Inverted Data Input. 3
34 CML-I Tx3- Transmitter Inverted Data Input. 3
35 GND Module Ground. 1 1
36 CML-I Tx1+ Transmitter Non-Inverted Data Input. 3
37 CML-I Tx1- Transmitter Inverted Data Input. 3
38 GND Module Ground. 1 1
Notes:
1. GND is the symbol for signal and supply (power) common for the module. All are common within the
module, and all module voltages are referenced to this potential unless otherwise noted. Connect these
directly to the host board signal common ground plane.
2. VccRx, Vcc1, and VccTx are applied concurrently and may be internally connected within the module in
any combination.
3. Plug Sequence specifies the mating sequence of the host connector and module. The sequence is 1, 2,
and 3. See figure below for pad locations.

Electrical Pad Layout

Block Diagram

Mechanical Specifications
About Skylane Optics
Skylane is a leading provider of transceivers for optical communication.
We offer an extensive portfolio for the enterprise, access, datacenter and
metropolitan fiber optical market as well as for smart home applications and
home networks.
We cover the European, South American and North American market with a strong
partner network and have offices in Belgium, Brazil, Sweden and USA.
Our offerings are characterized by high quality and performance. In combination
with our strong technical support, we enable our customers to build cost
optimized network solutions.
We offer an extensive range of high-quality products including transceivers
(Optical and copper), Active Optical Cable (AOC), Direct Attach Cable (DAC),
Mux/Demux, Coding Box.