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Logic Gstes

The document provides an overview of logic gates, including OR, AND, NOT, NOR, and NAND gates, along with their truth tables and basic operations. It also discusses De Morgan's Theorems and various laws related to Boolean algebra. The information is aimed at higher secondary students in a physics course.

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6 views19 pages

Logic Gstes

The document provides an overview of logic gates, including OR, AND, NOT, NOR, and NAND gates, along with their truth tables and basic operations. It also discusses De Morgan's Theorems and various laws related to Boolean algebra. The information is aimed at higher secondary students in a physics course.

Uploaded by

Aritspace computers
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Logic Gate

Lecture 7
(For Higher Secondary Second Year)

Manoj Kr. Das


Associate Professor
Physics Department
J N College, Boko
Logic Gate:
A logic gate is an idealized model of computation or physical
electronic device implementing a Boolean function, a logical
operation performed in one or more binary inputs that
produces a single binary output. The basic logic gates are OR,
AND and NOT gates.
OR gate:
An OR gate has two or more inputs but a single output. The
output of the OR gate is in the state 1 if one or more inputs
assume the state 1. Where A and B are the two inputs and Y is
the output of the OR gate.

Fig 1
Input A Input B Output y
0 0 0

0 1 1

1 0 1

1 1 1

Table 1 . Truth Table of OR Gate


The 𝑇𝑎𝑏𝑙𝑒 1 gives the truth table representing of two input
OR gate, the 0 and 1 in the truth table represent the low or 0
volt and high or 5 volt

Fig 2
Fig 3
AND Gate:
An AND gate possesses two or more inputs and a single
output. The output of an AND gate is in 1 if and only if all the
inputs assume the state 1. Consequently an AND gate is also
referred to as a coincidence circuit. The operation of an AND
can be given in 𝑇𝑎𝑏𝑙𝑒 2. Here 0 volt and 5 volt represent the
states 0 and 1 respectively

Fig 4
Input A Input B Output Y
0 0 0

0 1 0

1 0 0

1 1 1

Table 2: Truth Table of AND Gate


A diode logic configuration of two input AND gate for positive
logic circuit. Here A and B are two inputs and y the output of
AND gate.

Fig 5 Fig 6
NOT Gate:
The NOT circuit has single input and single output. The output
of the NOT circuit is in the state 1 if and only if the input does
not assume the state 1. The output of the circuit is therefore
high when the input is low and vice versa. As the NOT circuit
inverts the sense of the output with respect to the input it is
also referred to as an inverter. The NOT operation is also
known as negation.

Fig 7
Table 3: Truth Table of NOT Gate
A transistor circuit implementing an inverter as shown in
figure. When the input voltage is low the transistor is cut off
and the output voltage is 𝑣0 = 𝑉𝑐𝑐 . Thus output is high.
However if the input voltage is high the transistor saturates
and the output voltage becomes low.

Fig 8
NOR Gate:
The logic circuit where a NOT gate follows an OR gate is
termed as NOT-OR or NOR gate. NOT circuit can be
constructed with transistor where OR gate can be constructed
with diodes or transistors. Therefore NOR gate can be realised
by diode-transistor logic

Fig 9
Input A Input B Output Y

0 0 1

0 1 0

1 0 0

1 1 0

Table 4: Truth Table of NOR Gate


The NOR gate is the basic gate in the resistor-transistor logic
family produced by IC technology. It consist of only resistors
and transistors.

Fig 10
NAND Gate:
The logic circuit in which a NOT gate follows an AND gate is
referred to as a NOT-AND or NAND gate. The Boolean
expression characterising the NAND gate 𝑌 = 𝐴. 𝐵. The NOT
gates can be built with transistors and AND gates can be
constructed with diode or transistors. Consequently NAND
gates can be built with diode-transistor logic.

Fig 11
Input A Input B Output Y

0 0 1

0 1 1

1 0 1

1 1 0

Fig 5: Truth Table of NAND Gate


The NAND gate is the basic gate in DTL or the TTL family by IC.
A positive logic DTL NAND gate consists of the diode AND gate
followed by a transistor NOT gate with some modifications.
The output of the AND gate is coupled to the base of the
transistor of the NOT circuit through two diodes in series.

Fig 12
De Morgan’s Theorem:

First Theorem: 𝐴 + 𝐵 = 𝐴.ҧ 𝐵ത

Second Theorem: 𝐴. 𝐵 = 𝐴ҧ + 𝐵ത

Some Useful Laws:


(A)Communitive Law
𝐴+𝐵 =𝐵+𝐴
𝐴. 𝐵 = 𝐵. 𝐴
(B)Associative Laws

𝐴+ 𝐵+𝐶 = 𝐴+𝐵 +𝐶
𝐴. 𝐵. 𝐶 = 𝐴. 𝐵 . 𝐶
(C)Distributive Laws

𝐴. 𝐵 + 𝐶 = 𝐴. 𝐵 + 𝐴. 𝐶
The basic OR relation are
𝐴+0=𝐴
𝐴+1=1
𝐴+𝐴 =𝐴
𝐴 + 𝐴ҧ = 1
The basic AND relations are
𝐴. 0 = 0
𝐴. 1 = 𝐴
𝐴. 𝐴 = 𝐴
𝐴. 𝐴ҧ = 0
(D)Absorptive Laws:
𝐴 + 𝐴. 𝐵 = 𝐴
𝐴. 𝐴 + 𝐵 = 𝐴
The Boolean Inequalities are

𝐴 𝐴ҧ + 𝐵 = 𝐴. 𝐵

𝐴 + 𝐴.ҧ 𝐵 = 𝐴 + 𝐵
𝐴 + 𝐵. 𝐶 = 𝐴 + 𝐵 . 𝐴 + 𝐶

𝐴ҧ + 𝐵 . 𝐴 + 𝐶 = 𝐴.
ഥ 𝐶 + 𝐴. 𝐵

𝐴 + 𝐵 . 𝐵 + 𝐶 . 𝐶 + 𝐴 = 𝐴. 𝐵 + 𝐵. 𝐶 + 𝐶. 𝐴

𝐴.ҧ 𝐵. 𝐶ҧ + 𝐴.
ഥ 𝐵. 𝐶 + 𝐴. 𝐵. 𝐶 = 𝐵. 𝐴ҧ + 𝐶ҧ

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