COMPLETE QUESTION BANK

Module I [Basic Structure of Computers]

3 Marks Questions
1. With a neat diagram, explain the internal architecture of the CPU.
2. Differentiate between Big-endian and Little-endian assignment for word addressing.
3. Differentiate between big-endian and little-endian byte assignments.
4. What are condition codes? List the different condition codes.
5. Explain one, two and three address instruction with an example for each
6. Write the three-address, two-address and one-address representations of the operation below
with relevant assumptions: C  [A] + [B]
7. Describe auto increment addressing mode with the help of an example.

4 Marks/ 5 Marks Questions

8. Illustrate the basic operational concepts in transferring data between main memory and
processor with neat diagram
9. What is meant by instruction sequencing? Discuss the different types of instruction sequencing
with example.
10. With the help of a diagram, describe the data-path inside the processor.
11. With the help of examples, explain the different addressing modes.
12. Describe any 4 addressing modes with examples.
13. Write notes on three address, two address and one address instructions, giving example
for each.
14. Define Addressing mode and explain Different types of addressing modes with an
example for each.
9 Mark Questions
15. List various addressing modes explain any four with an example for each
16. Illustrate various addressing modes with proper examples. Which is the default
addressing mode selected by assemblers and compilers and why?
 Module II [Basic Processing Unit and Arithmetic Algorithms]
3 Marks Questions
1. Give the relevance of MAR, PC and IR in a typical computer system with neat diagram.
2. Illustrate the advantages of using multiple bus organization over single bus organization with
the help of a sample instruction execution.
3. Enumerate the sequence of actions involved in executing an unconditional branch instruction.
4. Write down the sequence of actions needed to fetch and execute the instruction:
Store R6, X(R8).
5. Give the control sequence for execution of instruction Add[R2],R1 using a single bus
organization
6. Design a 2x2 array multiplier.
7. Design and draw a 3X2 array multiplier.
8. Prove that the worst case delay through an n × n array multiplier is 6(n − 1) −1 gate delays.
9. Divide 25 by 8 using restoring division algorithm.
10. Non-restoring division is faster than restoring division. Justify the statement
11. Why is non-restoring division faster than restoring division?

4 Marks/ 5 Marks Questions

1. Discuss the data path inside the processor with single bus organization with neat diagram
2. Explain single bus organization with the help of a diagram. Specify with examples, how
memory operations are done in the given organization.
3. Compare and contrast single bus and multiple bus organisation of CPU.
4. Write down the control sequence for the execution of the instruction Add (RI), R2 in single bus
organization
5. Draw the diagram of a multi-bus organization with 3 buses. Write the control sequence for the
instruction Add R4, R5, R6 for the above mentioned multi-bus organization
6. Give the sequence of control steps required to perform the operation Add [R3], R1 in a single-
bus organization
7. Register R6 is used in a program to point to the top of a stack containing 32-bit numbers. Write
a sequence of instructions using the Index, Auto increment, and Auto decrement addressing
modes to perform each of the following tasks:
(a) Pop the top two items off the stack, add them, then push the result onto the stack.
(b) Copy the fifth item from the top into register R3.
For each case, assume that the stack contains ten or more elements.
8. Illustrate Booth multiplication with an example
9. Divide (1000)2 by (11)2 using restoring division method
10. Multiply each of the following pairs of signed 2’s-complement numbers using the Booth
algorithm. In each case, assume that A is the multiplicand and B is the multiplier.
i) A = 001011 and B = 011011
ii) A = 000111 and B = 000111
11. Draw the flowchart for decimal multiplication.
12. Explain restoring method of division with the help of a flow chart.

9 Mark Questions
13. Give the flow chart for Booth's Algorithm. Illustrate using an example.
 Module III [I/O Organization]

3 Marks Questions
1. Discuss the different ways of accessing I/O devices of a computer system.
2. Explain the functions of interface circuits.
3. What are vectored interrupts?
4. Explain any two interrupt priority schemes.
5. List and describe the registers in a DMA interface.
6. Compare the two main modes of DMA transfer.
7. Explain the daisy chain method with neat diagram
8. Describe centralized bus arbitration.
9. Give the functions of initiator and target controllers in SCSI bus.

4 Marks/ 5 Marks Questions

1. What is interrupt? Discuss the differences between subroutine and interrupt service routine
2. What are interrupts? List the sequence of steps following an interrupt request.
3. Write notes on interrupt nesting. Explain how simultaneous interrupt requests can be handled
4. Describe the different bus arbitration techniques for DMA data transfer.
5. Differentiate centralized and distributed bus arbitration mechanism used in DMA.
6. Differentiate serial port and parallel port. Draw the diagram of a bidirectional 8-bit parallel
interface and explain its working
7. Explain with the help of timing diagrams, the input and output data transfers in an
asynchronous bus.
8. Discuss the SCSI protocol for a complete disk read operation by listing out the sequence of
events involved in it.
9. With a diagram, explain the PCI bus.
10. Write a note on the packet type formats of USB.
11. Explain the architecture of USB with a diagram. What do you mean by split bus operation in
USB?
12. Explain the architecture of USB with a diagram.

9 Mark Questions
13. Illustrate with an example SCSI bus arbitration and selection
 Module IV [Memory System]

3 Marks Questions
1. Justify the need of memory hierarchy in a computer and discuss the various parameters that are
considered for the formation of memory hierarchy.
2. Discuss about different types of RAMs.
3. Compare synchronous and asynchronous DRAM.
4. Which design feature of SRAM cells helps in value retention without refresh
5. Define temporal locality and spatial locality.
6. What is MFC signal? How is it related to Memory Access Time?
7. What is flash memory?
8. Write notes on flash memory.
9. The cache block size in many computers is in the range of 32 to 128 bytes. What would be the
main advantages and disadvantages of making the size of cache blocks larger?
10. A computer system has a main memory consisting of 1M 16-bit words. It also has a 4K-word
cache organized in the block-set-associative manner, with 4 blocks per set and 64 words per
block. Calculate the number of bits in each of the Tag, Set, and Word fields.
11. Briefly explain the LRU cache replacement algorithm

4 Marks/ 5 Marks Questions

12. Give the structure of a typical static RAM cell and explain its read and write operations.
13. Describe semiconductor RAM memories.
14. Write notes on static memories
15. Explain semiconductor ROM memories
16. Discuss about the different types of Read only memories
17. Design a 64K x 8 memory module using l6K x l static memory chips.
18. Elaborate the various cache mapping techniques with an example for each
19. Differentiate Direct and Associative mapped cache with examples.
20. Differentiate between associative and set associative cache mapping with examples.
21. How do you relate set associative mapped cache with direct mapped and associative mapped
cache mechanisms?

9 Mark Questions
22. With the help of a diagram, examine the internal organisation of bit cells in a memory chip.
23. With the help of an example, explain the different cache mapping function
 Module V [Processor Logic Design and Processor Organization]

4 Marks Questions
1. Write the Register Transfer Logic Format for a conditional control statement. Give an example
and explain the same.
2. Discuss about condition code bits in a 4 bit status register
3. An 8-bit register A has one input x. The register operation is represented symbolically as
P: A7 ← x, Ai ← Ai+1, i = 0,1,2,3 ... 6. What is the function of the register?

6 Marks/ 5 Marks Questions

1. Write short notes on Arithmetic, Logic and shift micro-operations with examples
2. Describe the different ways in which a general-purpose processor unit can be organized.
3. Draw and explain the block diagram for a 4-bit complete accumulator
4. Write notes on status register.
5. Give a simple design for generating status bits for a 8- bit ALU
6. Design a 4bit combinational logic shifter
7. Design a bus system for interconnecting four n bit registers
8. Mention the advantages of using a scratch pad memory. Draw the diagram of a processor that
employs a scratch pad memory and explain the same
9. Design an adder/subtractor circuit with one selection variable s and two inputs A and B. When
s = 0 the circuit performs A + B. When s = I the circuit performs A - B by taking 2's complement
of B.
10. Design a 4-bit combinational logic shifter with 2 control signals H1 and H0 that performs the
following operations (bit values given in parenthesis are the values of control variables H 1 and
H0 respectively):- No shift (00), Shift-right (01), Shift left (10), Transfer 0's to S (11).
11. Draw a labelled block diagram of a processor unit with sever registers R1 to R7, a status
register, ALU with 3- selection variables and Cin, and shifter with 3 selection variables.
12. Design a hard-wired control unit based on the one flip-flop per state method to add/subtract 2
signed numbers represented in the sign-and-magnitude form.

10 Mark Questions
13. Explain the design of status register.
14. Discuss the major operations that can be performed by a parallel adder in the design of
arithmetic circuit.
15. Draw the block diagram for the hardware that implements the following statement
x + yz: AR ← AR + BR where AR and BR are two n-bit registers and x, y, and z are control
variables. Include the logic gates for the control function. (The symbol + designates an OR
operation in a control or Boolean function and an arithmetic plus in a micro operation.)
 Module VI [Control Logic Design and Micro-programmed Control]

6 Marks/ 5 Marks Questions

1. Write notes on conditional control statements.
2. Write notes on micro programmed CPU organisation.
3. Briefly explain, with diagrams, the different methods for control organization
4. Show the block diagram that executes the following conditional control statements
C'T2: F  A
CT2 : F  B where C is the conditional variable and A, B, F are registers.
5. Discuss shift and conditional control micro operations.

10 Mark Questions
6. Describe the steps in control logic design with the help of an example.
(Example can be realised using either hardwired or micro programmed control organization.)
7. What is a control word? With the help of proper illustrations and assumptions, show how a
designer would compose a control word for the processor unit.
8. With a diagram, explain how control signals are generated using hardwired control.
9. Discuss the different methods of control logic design in detail
10. With the help of a flow chart for sign-magnitude addition/subtraction, explain the steps
involved in developing a hardwired control unit.
11. Explain the organization of a micro programmed computer with a block diagram
12. Using a block diagram analyse the design of a micro program control for a processor unit.
13. Draw a neat block diagram of a micro program sequencer and explain its working
14. Explain with the help of a diagram, the working of micro program sequencer.
15. Describe the organization of micro program sequencer with neat diagram. Also provide its
address sequencing capabilities.
16. With the help of a diagram, establish the functioning of micro program sequencer in a micro
program controlled processor.
17. Describe the purpose of micro program sequencing. How is it carried out?
18. Compare vertical and horizontal microinstruction formats, giving examples.
19. Explain the horizontal and vertical microinstructions in micro programmed control.
20. Draw the block diagram of a processor unit with 16 selection variables and discuss the
functions of selection variables. Derive the control word for the micro operation R1  R1 - R2.