Department of Computer Science and Engineering

Course Handout

CourseCode UGCSE214: Computer Systems Organization

CourseTitle UGCSE214: Computer Systems Organization
LTPC 3L+2P+4C
Structure
Course Type B.Tech
Name of Dr. PawanBhambu
Faculty
Designation Associate Professor
Contact 9468842949
Number
Email pawan.bhambu@vgu.ac.in
This course provides an in-depth exploration of the
fundamental Understanding This course will facilitate the
students to learn the fundamentals of computer
organization and its relevance to classical and modern
Course problems of computer design.
Description

Objective This course will facilitate the students to learn the

fundamentals of computer organization and its relevance to
classical and modern problems of computer design.
Scope The scope of Computer Systems Organization typically refers to the
students to learn the fundamentals of computer organization and its
relevance to classical and modern problems of computer design.

ProgramOutcomes(POs)

PO 1: Engineering knowledge: Apply the knowledge of mathematics,

science, engineering fundamentals, and an engineering specialization for
the solution of complex engineering problems.

PO 2: Problem analysis: Identify, formulate, research literature, and

analyses complex engineering problems reaching substantiated conclusions
using first principles of mathematics, natural sciences, and engineering
sciences.
PO 3: Design/Development of Solutions: Design solutions for complex
engineering problems and design system components or processes that
meet the specified needs with appropriate consideration for public health
and safety, and cultural, societal, and environmental considerations.

PO 4: Conduct investigations of complex problems: Use research-based

knowledge and research methods including design of experiments, analysis
and interpretation of data, and synthesis of the information to provide valid
conclusions.

PO 5: Modern tool usage: Create, select, and apply appropriate techniques,

resources, and modern engineering and IT tools including prediction and
modelling to complex engineering activities with an understanding of the
limitations.

PO 6: The engineer and society: Apply reasoning informed by the

contextual knowledge to assess societal, health, safety, legal, and cultural
issues and the consequent responsibilities relevant to the professional
engineering practice.

PO 7: Environment and sustainability: Understand the impact of the

professional engineering solutions in societal and environmental contexts,
and demonstrate the knowledge of, and the need for sustainable
development.

PO 8: Ethics: Apply ethical principles and commit to professional ethics and

responsibilities and norms of the engineering practice.

PO 9: Individual and team work: Function effectively as an individual, and

as a member or leader in diverse teams, and in multidisciplinary settings.

PO 10: Communication: Communicate effectively on complex engineering

activities with the engineering community and with the society at large,
such as being able to comprehend and write effective reports and design
documentation, make effective presentations, and give and receive clear
instructions.

PO 11: Project management and finance: Demonstrate knowledge and

understanding of the engineering and management principles and apply
these to one’s work, as a member and leader in a team, to manage projects
and in multidisciplinary environments.

PO 12: Life-long learning: Recognize the need for, and have the preparation
and ability to engage in independent and life-long learning in the broadest
context of technological change.
Program Specific outcome(PSO) :

PSO1: Core Engineering Skills: Exhibit fundamental concepts of Data

Structures, Databases, Operating Systems, Computer networks, Theory of
Computation, Advanced Programming, and Software Engineering.

PSO2: Standard Software Engineering practices: Demonstrate an ability to

design, develop, test, debug, deploy, analyze, troubleshoot, maintain,
manage and secure software.

PSO3: Future Endeavors: Recognize the need to have knowledge of higher

education institutions/ organizations/ companies related to computer
science & engineering.

SYLLABUS

UGCSE214: Computer Systems Organization

3L+0T+2P+4C

COURSE CONTENT

Module 1: Fundamental of Computer Design (6L)

Basic Structure of Computers: Computer Types; Functional Modules; Bus
structure; Performance- Processor Clock, Basic Performance Equation, Clock
rate; Historical Perspective; Machine Instructions and Programs: Numbers,
Arithmetic Operations and Characters; Memory Location and Addresses;
Memory Operations; Instructions and Instruction Sequencing

Module 2: Instruction set, Assembly language and input/output Organization (8L)

Machine Instructions and Programs: Addressing Mode; Assembly Language;
Basic input and Output Operations; Stacks and Queues; Subroutines;
Encoding of Machine Instructions; Accessing I/O Devices; Interrupts- Interrupt
Hardware; Enabling and Disabling Interrupts; Handling Multiple Devices;
Controlling Device Requests; Exceptions; Direct Memory Access; Standard I/O
Interfaces-PCI Bus, SCSI Bus, USB.
Module 3: The Memory System (8L)
Basic Concepts: Semiconductor RAM Memories, Read only memories, speed,
size, and cost, cache memories- mapping functions, replacement algorithms;
cache performance; cache optimization; Virtual memory; Protection: Virtual
memory and virtual machines.

Module 4: Arithmetic for Computers (8L)

Addition and subtraction of signed numbers, design of fast adders,
multiplication of positive numbers, signed operand multiplication, fast
multiplication, integer division, floating-point numbers and operations.

Module 5: Pipelining and Parallel Processing (6L)

Introduction to Pipelining; Implementation of pipeline; Instruction level
parallelism concepts and challenges: Overcoming data hazards with dynamic
scheduling; hardware-based speculation; Exploiting ILP using multiple issue
and static scheduling; Introduction to multicore architecture.

TEXT BOOKS:
1. John P. Hayes, “Computer Architecture and Organization”, 3rd Edition, McGraw
Hill, 2012
2. M. Morris Mano, “Computer System Architecture”, 3rd Ed, Pearson Education,
2017
3. Carl Hamacher, Zvonko V., Safwatzaky, “Computer Organization”, 5th Edition,
TMH 2011

REFERENCE BOOKS:
1. John L. Hennessey and David A. Patterson, “Computer Architecture, A
Quantitative Approach”, 4thEdition, Morgan Kaufmann;2006
2. Kai Hwang, “Advanced Computer Architecture Parallelism, Scalability,
Programmability”, 2ndEdition, Tata Mc Graw Hill, 2010
L-T-P-C: 3L+0T+2P+4C MM:100

Course Outcomes (CO):

At the end of the course, student shall be able to:

COs Description

CO1 CO1: Understand the hardware components

and concepts related to the control design

CO2 CO2: Familiarize with addressing modes,

different types of instruction formats

CO3 CO3: Learn about various I/O devices and the

I/O interface.

CO4 CO4: Gain the concepts related to the

memory organization.

CO5 CO5: Understand the theoretical concept of

parallel processing and multiprocessing.

Detailed Syllabus:

Unit Unit Details

No.

1 Module1: Basic Structure of Computers: Computer Types; Functional

 Modules; Bus structure; Performance- Processor Clock, Basic
Performance Equation, Clock rate; Historical Perspective; Machine
Instructions and Programs: Numbers, Arithmetic Operations and
Characters; Memory Location and Addresses; Memory Operations;
Instructions and Instruction Sequencing

2 Module 2: Machine Instructions and Programs: Addressing Mode;

Assembly Language; Basic input and Output Operations; Stacks and
Queues; Subroutines; Encoding of Machine Instructions; Accessing I/O
Devices; Interrupts- Interrupt Hardware; Enabling and Disabling
Interrupts; Handling Multiple Devices; Controlling Device Requests;
Exceptions; Direct Memory Access; Standard I/O Interfaces-PCI Bus,
SCSI Bus, USB.

3 Module 3: Basic Concepts: Semiconductor RAM Memories, Read only

memories, speed, size, and cost, cache memories- mapping functions,
replacement algorithms; cache performance; cache optimization;
Virtual memory; Protection: Virtual memory and virtual machines.

4 Module 4: Addition and subtraction of signed numbers, design of fast

adders, multiplication of positive numbers, signed operand
multiplication, fast multiplication, integer division, floating-point
numbers and operations.

5 Module5: Introduction to Pipelining; Implementation of pipeline;

Instruction level parallelism concepts and challenges: Overcoming
data hazards with dynamic scheduling; hardware-based speculation;
Exploiting ILP using multiple issue and static scheduling; Introduction to
multicore architecture.

Text and Reference Books

S. Reference and Text Book Author Publication and Nomenclature

No. Edition
 1 Computer Architecture and John P. Hayes McGraw Hill, 3rd Edition,
Organization 2012

2 Computer System M. Morris Mano Pearson Education, 3rd Ed,

ArchitectureScience, 2017

3 Computer Organization Carl Hamacher, TMH 2011 5th Edition,

Zvonko V., Safwatzaky

Any other suggested Materials:

S. Reference and Text Author Publication and Nomenclature

No Book Edition
.

1 Computer John P. Hayes McGraw Hill, 2012 3rd Edition,

Architecture and
Organization
2 Computer System M. Morris Mano Pearson Education, 3rd Ed,
ArchitectureScience, 2017

3 Computer Organization Carl Hamacher, Zvonko V., TMH 2011 5th Edition,
Safwatzaky

CO-PO Mapping

COs
and PO- PO PO PO PO PO PO1 PO PO
POs PO1 2 PO3 PO4 5 6 7 8 9 0 11 12
CO1 2 ─ ─ ─ ─ 1 - ─ - ─ ─ 1
CO2 2 ─ ─ ─ ─ 1 - ─ 1 ─ ─ ─
CO3 1 2 ─ ─ ─ ─ 1 ─ 1 ─ ─ ─
CO4 2 ─ 1 ─ ─ ─ 1 ─ 1 ─ ─ ─
CO5 2 ─ ─ ─ ─ ─ 1 ─ 1 ─ ─ ─

CO-PSO Mapping

COs and
PSO-1 PSO-2 PSO-3
PSOs
CO-1 2 1 ─
CO-2 2 ─ ─
CO-3 ─ 1 ─
CO-4 2 ─ ─
CO-5 ─ 2 ─
 Lecture Plan

Lecture Title of the Lecture Date Date of Pedag Additio Refere

No. of Implementa ogy nal nce
Planni tion topics
ng to be
discuss
ed
(topics
beyond
the
syllabu
s and
may be
four to
five
topics
against
every
10
lecture
topics)

Module0: Introduction

1 Understand Computer PPT/

C&T
Systems Organization

Module 1: Overview

2 Fundamental of PPT/ R1
Computer Design C&T

3 Basic Structure of PPT/ R1

Computers: Computer C&T
Types; Functional
Modules; Bus structure
4 Performance- Processor PPT/ R1
Clock, Basic C&T
Performance Equation,
Clock rate; Historical
Perspective;
5 Machine Instructions PPT/ R1
and Programs: C&T
Numbers, Arithmetic
Operations and
Characters;
6 Memory Location and PPT/ R1
C&T
Addresses;
7 Mem PPT/ R1
C&T
ory
Oper
ation
s;
Instru
ctions
and
Instru
ction
Sequ
encin
g

8 Mem PPT/ R2
C&T
ory
Oper
ation
s;
Instru
ctions
and
Instru
ction
Sequ
encin
g

9 PPT/
Assignment-1 C&T

Module2: Supervised Learning

10 Instruction set, Assembly PPT/ R2

language and input/output C&T
Organization

11 Machine Instructions and PPT/ R1

Programs: Addressing C&T
Mode; Assembly Language;
Basic input and Output
Operations
12 Stacks and Queues; PPT/ R2
Subroutines; Encoding of C&T
Machine Instructions;
Accessing I/O Devices;

13 Interrupts- Interrupt PPT/ R1

Hardware; Enabling and C&T
Disabling Interrupts;
Handling Multiple
Devices;
14 Controlling Device PPT/ R2
Requests; Exceptions C&T

15 Direct Memory Access; PPT/ R1

Standard I/O Interfaces- C&T
PCI Bus, SCSI Bus, USB
16 Direct Memory Access; PPT/ R2
Standard I/O Interfaces- C&T
PCI Bus, SCSI Bus, USB
17 Assignment-2
PPT/
C&T
18 Quiz-1
PPT/
C&T

Module3: Unsupervised Learning

19 The Memory System PPT/ R2

C&T
20 Basic Concepts: PPT/ R1
Semiconductor RAM C&T
Memories, Read only
memories
21 speed, size, and cost, PPT/ R1
cache memories- C&T
mapping functions,
22 replacement PPT/
algorithms; cache C&T
performance
23 replacement algorithms; PPT/ R1
cache performance C&T

24 cache optimization; PPT/

Virtual memory; C&T

25 Protection: Virtual PPT/ R1

memory and virtual C&T
machines
26 Assignment-3 PPT/
C&T

Module4: Reinforced Learning

27 Arithmetic for PPT/ R2
Computers C&T

28 Addition and PPT/ R2

subtraction of signed C&T
numbers, design of fast
adders
29 multiplication of PPT/
positive numbers C&T

30 signed operand PPT/ R2

multiplication C&T

31 fast multiplication, integer PPT/

division C&T

32 floating-point numbers and PPT/ R2

operations. C&T

33 Assignment-4 PPT/
C&T
34 Quiz- 2 PPT/
C&T

Module5: Deep Reinforcement Learning

35 Pipelining and Parallel PPT/ R2

Processing C&T

36 Introduction to Pipelining; PPT/ R2

Implementation of C&T
pipeline; Instruction level
parallelism
37 concepts and challenges: PPT/
Overcoming data hazards C&T
with dynamic scheduling;
hardware-based

38 speculation; Exploiting ILP PPT/ R2

using multiple issue and C&T
static scheduling;
Introduction

39 speculation; Exploiting ILP PPT/ R2

using multiple issue and C&T
static scheduling;
Introduction

40 Intro PPT/
C&T
ducti
on to
multi
core
archi
 tectu
re.

41 Intro PPT/ R2
C&T
ducti
on to
multi
core
archi
tectu
re.

42 Assignment–5 PPT/
C&T
43 Quiz- 3 PPT/
C&T

R1- https://archive.nptel.ac.in/courses/106/105/106105163/

R2- https://archive.nptel.ac.in/courses/106/106/106106092/

Course Assessment Plan: CAP

COs Description BTL Assignment Mid Term End Term

Weightage Weightage Weightage
CO1 CO1: L1,L2 5 Q1 (5marks) I Mid Q1(10 marks)
Understand Term Q2(10marks)
the
hardware
components
and concepts
related to
the control
design
CO2 CO2: L4 5 Q2&Q3 Q3(10marks)
Familiarize (5marks)
with IMidTerm
addressing
modes,
different
types of
instruction
formats
 CO3 CO3: Learn L5 5 Q4(5marks) Q4(10marks)
about various IMidTerm

I/O devices
and the I/O
interface.

Q1(5marks)
IIMidTerm

CO4 CO4: Gain L3 5 Q2&Q3(5marks)IIMid Q5(10marks)

the Term
concepts
related to
the memory
organizatio
n.

CO5 CO5: L4 5 Q4(5marks) Q6(10marks)

Understand IIMidTerm
the
theoretical
concept of
parallel
processing
and
multiproces
sing.

Evaluation Scheme:

Component Duration Maxim Date& Mode

um Time*
Marks
Mid Term I 01:30 20 Starts in the second -
Examination hrs. week of Feb
Assignment-I - 5 30/01/2025 Through ERP Lx

Assignment-II - 5 31/02/2025 Through ERP Lx

Assignment- - 5 20/03/2025 Through

III ERP Lx
Assignment-IV - 5 21/04/2025 Through ERP

Assignment-V - 5 30/04/2025 Project/

presentation
Quiz-I 1hr. 5 04/02/2025 Through ERP MCQ
 Quiz-II 1hr. 5 31/03/2025 Through
ERP MCQ
Quiz-III 1hr. 5 20/04/2025 Through
ERPMCQ
Mid-term II 01:30 20 Starts in the first Open Note Book
Examination hrs. week of Aprl
End Term 3 60 Starts in the 15th
Examinations hrs. first week of May
May
onwards

Signature

Name of Faculty Member with Designation,

Department: