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Interrupt and Its Types

An interrupt is a signal that prompts the CPU to pause its current task to address a request, enhancing system efficiency. Interrupts are classified into hardware interrupts, which can be maskable or non-maskable, and software interrupts, which include system call and exception interrupts. The CPU handles interrupts through a defined cycle, temporarily storing the current execution state and executing an Interrupt Service Routine (ISR) before resuming normal operations.

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0% found this document useful (0 votes)
4 views4 pages

Interrupt and Its Types

An interrupt is a signal that prompts the CPU to pause its current task to address a request, enhancing system efficiency. Interrupts are classified into hardware interrupts, which can be maskable or non-maskable, and software interrupts, which include system call and exception interrupts. The CPU handles interrupts through a defined cycle, temporarily storing the current execution state and executing an Interrupt Service Routine (ISR) before resuming normal operations.

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nakeshsharma1992
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Interrupt and Its Types

Introduction to Interrupts
An interrupt is a signal sent by hardware or software to the processor, indicating that an
immediate attention or response is needed. Interrupts help manage CPU execution by
temporarily pausing the current process, handling the request, and then resuming execution.
Interrupts improve efficiency in a system by allowing the CPU to handle multiple tasks
simultaneously rather than waiting for slow I/O operations to complete.

Types of Interrupts
Interrupts can be broadly classified into two main categories:
1. Hardware Interrupts
These are generated by external hardware devices, such as keyboards, printers, and network
cards, to get the attention of the CPU. They are further divided into:
a) Maskable Interrupts

● These interrupts can be enabled or disabled by the CPU.

● They have lower priority compared to non-maskable interrupts.

● Example: Interrupt Request (IRQ) signals from peripherals like a sound card or
USB device.
b) Non-Maskable Interrupts (NMI)

● These cannot be disabled by the CPU and must be processed immediately.

● Typically used for critical events such as hardware failures.

● Example: Power failure warning or memory corruption detection.

2. Software Interrupts
These are triggered by software instructions rather than external hardware. They help in
system calls and exception handling.
a) System Call Interrupts

● Used by user programs to request services from the operating system.

● Example: A process requesting file operations (open, read, write) in an OS.

b) Exception Interrupts
● These occur when a program violates certain rules, causing the CPU to take
immediate action.

● Example: Division by zero, invalid memory access, overflow error.

Interrupt Cycle Flowchart


This flowchart represents how a CPU handles interrupts while executing instructions. The
CPU continuously fetches, decodes, and executes instructions. However, if an interrupt
occurs, the CPU temporarily stops executing the current program and transfers control to the
Interrupt Service Routine (ISR) to handle the interrupt.
The flowchart consists of two major cycles:
1. Instruction Cycle (Normal program execution)
2. Interrupt Cycle (Handling an interrupt request)

Step 1: Start of the Cycle (Decision Based on R)

● The CPU checks the status of the Interrupt Flip-Flop (R).


● If R = 0, the CPU follows the normal instruction cycle (fetch-decode-execute).

● If R = 1, the CPU follows the interrupt cycle to handle the interrupt.

Instruction Cycle (R = 0) – Normal Execution


1. Fetch and Decode the Instruction
o The CPU fetches the instruction from memory and decodes it.
2. Execute the Instruction
o The CPU performs the required operation based on the decoded instruction.
3. Check for Interrupt Condition
o The CPU checks if interrupts are enabled (IEN = 1) and if an interrupt request
is set (FGI = 1 or FGO = 1).
o If both conditions are true, the CPU sets R = 1, indicating an interrupt is
pending.
4. If No Interrupt is Detected:
o The next instruction is fetched, and normal execution continues.
5. If an Interrupt is Detected:
o The CPU moves to the Interrupt Cycle (R = 1).

Interrupt Cycle (R = 1) – Handling the Interrupt


Once the CPU detects an interrupt, it follows these steps:
1. Store the Return Address
o The CPU saves the current Program Counter (PC) in memory at location 0.
o This ensures that after handling the interrupt, execution can resume from the
correct point.
2. Branch to the Interrupt Service Routine (ISR)
o The PC is updated to 1, which is the memory location where the ISR starts.
o This ensures that the CPU jumps to the appropriate routine to handle the
interrupt.
3. Disable Further Interrupts
o The Interrupt Enable (IEN) flag is set to 0, meaning no new interrupts will
be processed while handling the current one.
4. Reset the Interrupt Flip-Flop (R = 0)
o The CPU resets R to 0, meaning the interrupt has been acknowledged.
o After completing the ISR, the system will return to normal instruction
execution.

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